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1; RUN: opt %s -mtriple amdgcn-- -passes='print<uniformity>' -disable-output 2>&1 | FileCheck %s2 3define amdgpu_kernel void @cycle_inner_ipd(i32 %n, i32 %a, i32 %b) #0 {4;5; entry6; / \7; E2<------E18; | \ ^^9; | \ / |10; | v/ |11; | A |12; | / |13; | / |14; vv |15; B------->C16; |17; X18;19;20; CHECK-LABEL: BLOCK entry21; CHECK: DIVERGENT: %tid = call i32 @llvm.amdgcn.workitem.id.x()22; CHECK: DIVERGENT: %div.cond = icmp slt i32 %tid, 023; CHECK: END BLOCK24;25; CHECK-LABEL: BLOCK B26; CHECK: DIVERGENT: %div.merge = phi i32 [ 0, %A ], [ %b, %E2 ]27; CHECK: END BLOCK28 29entry:30 %tid = call i32 @llvm.amdgcn.workitem.id.x()31 %div.cond = icmp slt i32 %tid, 032 %uni.cond = icmp slt i32 %a, 033 %uni.cond1 = icmp slt i32 %a, 234 %uni.cond2 = icmp slt i32 %a, 1035 br i1 %uni.cond, label %E2, label %E136 37E1:38 br label %E239 40E2:41 br i1 %uni.cond1, label %A, label %B42 43 44A:45 br i1 %div.cond, label %E1, label %B46 47B:48 %div.merge = phi i32 [ 0, %A ], [ %b, %E2 ]49 br label %C50 51C:52 br i1 %uni.cond2, label %E1, label %X53 54X:55 ret void56}57