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1; RUN: opt -mtriple amdgcn-- -passes='print<uniformity>' -disable-output %s 2>&1 | FileCheck %s2 3; Alpha (div.uni)4; | \5; Entry \6; (div.cond)\7; / \ \8; B0 B3 |9; | | |10; B1 B4<-+11; | |12; B2 B513; / | |14; / | B50115; / | |16; B201->B202 B50217; \ /18; B6 (phi: divergent)19;20;21; CHECK-LABEL: 'test_ctrl_divergence':22; CHECK-LABEL: BLOCK Entry23; CHECK: DIVERGENT: %div.cond = icmp eq i32 %tid, 024; CHECK: DIVERGENT: br i1 %div.cond, label %B3, label %B025;26; CHECK-LABEL: BLOCK B627; CHECK: DIVERGENT: %div_a = phi i32 [ %a0, %B202 ], [ %a1, %B502 ]28; CHECK: DIVERGENT: %div_b = phi i32 [ %b0, %B202 ], [ %b1, %B502 ]29; CHECK: DIVERGENT: %div_c = phi i32 [ %c0, %B202 ], [ %c1, %B502 ]30 31define amdgpu_kernel void @test_ctrl_divergence(i32 %a, i32 %b, i32 %c, i32 %d) {32Alpha:33 %tid = call i32 @llvm.amdgcn.workitem.id.x()34 %div.uni = icmp eq i32 %a, 035 br i1 %div.uni, label %Entry, label %B436 37Entry:38 %div.cond = icmp eq i32 %tid, 039 br i1 %div.cond, label %B3, label %B0 ; divergent branch40 41B0:42 br label %B143 44B1:45 br label %B246 47B2:48 %a0 = add i32 %a, 149 %b0 = add i32 %b, 250 %c0 = add i32 %c, 351 br i1 %div.uni, label %B201, label %B20252 53B201:54 br label %B20255 56B202:57 br label %B658 59B3:60 br label %B461 62B4:63 %a1 = add i32 %a, 1064 %b1 = add i32 %b, 2065 %c1 = add i32 %c, 3066 br i1 %div.uni, label %B5, label %B50167 68B5:69 br label %B50170 71B501:72 br label %B50273 74B502:75 br label %B676 77B6:78 %div_a = phi i32 [%a0, %B202], [%a1, %B502]79 %div_b = phi i32 [%b0, %B202], [%b1, %B502]80 %div_c = phi i32 [%c0, %B202], [%c1, %B502]81 ret void82}83 84 85declare i32 @llvm.amdgcn.workitem.id.x() #086 87attributes #0 = {nounwind readnone }88