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1; RUN: opt %s -passes='print<uniformity>' -disable-output 2>&1 | FileCheck %s2 3; NOTE: The new pass manager does not fall back on legacy divergence4; analysis even when the function contains an irreducible loop. The5; (new) divergence analysis conservatively reports all values as6; divergent. This test does not check for this conservative7; behaviour. Instead, it only checks for the values that are known to8; be divergent according to the legacy analysis.9 10target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"11target triple = "nvptx64-nvidia-cuda"12 13; This test contains an unstructured loop.14; +-------------- entry ----------------+15; | |16; V V17; i1 = phi(0, i3) i2 = phi(0, i3)18; j1 = i1 + 1 ---> i3 = phi(j1, j2) <--- j2 = i2 + 219; ^ | ^20; | V |21; +-------- switch (tid / i3) ----------+22; |23; V24; if (i3 == 5) // divergent25; because sync dependent on (tid / i3).26define ptx_kernel i32 @unstructured_loop(i1 %entry_cond) {27; CHECK-LABEL: for function 'unstructured_loop'28entry:29 %tid = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()30 br i1 %entry_cond, label %loop_entry_1, label %loop_entry_231loop_entry_1:32 %i1 = phi i32 [ 0, %entry ], [ %i3, %loop_latch ]33 %j1 = add i32 %i1, 134 br label %loop_body35loop_entry_2:36 %i2 = phi i32 [ 0, %entry ], [ %i3, %loop_latch ]37 %j2 = add i32 %i2, 238 br label %loop_body39loop_body:40 %i3 = phi i32 [ %j1, %loop_entry_1 ], [ %j2, %loop_entry_2 ]41 br label %loop_latch42loop_latch:43 %div = sdiv i32 %tid, %i344 switch i32 %div, label %branch [ i32 1, label %loop_entry_145 i32 2, label %loop_entry_2 ]46branch:47 %cmp = icmp eq i32 %i3, 548 br i1 %cmp, label %then, label %else49; CHECK: DIVERGENT: %cmp =50; CHECK: DIVERGENT: br i1 %cmp,51then:52 ret i32 053else:54 ret i32 155}56 57declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()58declare i32 @llvm.nvvm.read.ptx.sreg.tid.y()59declare i32 @llvm.nvvm.read.ptx.sreg.tid.z()60declare i32 @llvm.nvvm.read.ptx.sreg.laneid()61 62