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1; RUN: llvm-as < %s | llvm-dis > %t.orig2; RUN: llvm-as < %s | llvm-c-test --echo > %t.echo3; RUN: diff -w %t.orig %t.echo4 5 6define void @fence_instrs() {7 fence acquire8 fence release9 fence acq_rel10 fence seq_cst11 12 fence syncscope("singlethread") acquire13 fence syncscope("singlethread") release14 fence syncscope("singlethread") acq_rel15 fence syncscope("singlethread") seq_cst16 17 ret void18}19 20define void @atomic_load_store(ptr %word) {21 ; Test different atomic loads22 %ld.1 = load atomic i32, ptr %word monotonic, align 423 %ld.2 = load atomic volatile i32, ptr %word acquire, align 424 %ld.3 = load atomic volatile i32, ptr %word seq_cst, align 425 %ld.4 = load atomic volatile i32, ptr %word syncscope("singlethread") acquire, align 426 %ld.5 = load atomic volatile i32, ptr %word syncscope("singlethread") seq_cst, align 427 %ld.6 = load atomic i32, ptr %word syncscope("singlethread") seq_cst, align 428 29 ; Test different atomic stores30 store atomic i32 1, ptr %word monotonic, align 431 store atomic volatile i32 2, ptr %word release, align 432 store atomic volatile i32 3, ptr %word seq_cst, align 433 store atomic volatile i32 4, ptr %word syncscope("singlethread") release, align 434 store atomic volatile i32 5, ptr %word syncscope("singlethread") seq_cst, align 435 store atomic i32 6, ptr %word syncscope("singlethread") seq_cst, align 436 ret void37}38 39define void @atomic_rmw_ops(ptr %p, i32 %i, float %f) {40 ; Test all atomicrmw operations41 %a.xchg = atomicrmw xchg ptr %p, i32 %i acq_rel, align 842 %a.add = atomicrmw add ptr %p, i32 %i acq_rel, align 843 %a.sub = atomicrmw sub ptr %p, i32 %i acq_rel, align 844 %a.and = atomicrmw and ptr %p, i32 %i acq_rel, align 845 %a.nand = atomicrmw nand ptr %p, i32 %i acq_rel, align 846 %a.or = atomicrmw or ptr %p, i32 %i acq_rel, align 847 %a.xor = atomicrmw xor ptr %p, i32 %i acq_rel, align 848 %a.max = atomicrmw max ptr %p, i32 %i acq_rel, align 849 %a.min = atomicrmw min ptr %p, i32 %i acq_rel, align 850 %a.umax = atomicrmw umax ptr %p, i32 %i acq_rel, align 851 %a.umin = atomicrmw umin ptr %p, i32 %i acq_rel, align 852 53 %a.fadd = atomicrmw fadd ptr %p, float %f acq_rel, align 854 %a.fsub = atomicrmw fsub ptr %p, float %f acq_rel, align 855 %a.fmax = atomicrmw fmax ptr %p, float %f acq_rel, align 856 %a.fmin = atomicrmw fmin ptr %p, float %f acq_rel, align 857 %a.fmaximum = atomicrmw fmaximum ptr %p, float %f acq_rel, align 858 %a.fminimum = atomicrmw fminimum ptr %p, float %f acq_rel, align 859 60 %a.uinc_wrap = atomicrmw uinc_wrap ptr %p, i32 %i acq_rel, align 861 %a.udec_wrap = atomicrmw udec_wrap ptr %p, i32 %i acq_rel, align 862 63 %a.usub_sat = atomicrmw usub_sat ptr %p, i32 %i acq_rel, align 864 %a.usub_cond = atomicrmw usub_cond ptr %p, i32 %i acq_rel, align 865 66 ret void67}68 69define i32 @main() {70 %1 = alloca i32, align 471 %2 = cmpxchg ptr %1, i32 2, i32 3 seq_cst acquire72 %3 = extractvalue { i32, i1 } %2, 073 ret i32 %374}75