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1; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err2; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out3; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err4; RUN: not --crash llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN5; This file checks that the fallback path to selection dag works.6; The test is fragile in the sense that it must be updated to expose7; something that fails with global-isel.8; When we cannot produce a test case anymore, that means we can remove9; the fallback path.10 11target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"12target triple = "aarch64--"13 14; BIG-ENDIAN: unable to translate in big endian mode15 16; Make sure we don't mess up metadata arguments.17declare void @llvm.write_register.i64(metadata, i64)18 19; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_WRITE_REGISTER !0, %0:_(s64) (in function: test_write_register_intrin)20; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for test_write_register_intrin21; FALLBACK-WITH-REPORT-LABEL: test_write_register_intrin:22define void @test_write_register_intrin() {23 call void @llvm.write_register.i64(metadata !{!"sp"}, i64 0)24 ret void25}26 27@_ZTIi = external global ptr28declare i32 @__gxx_personality_v0(...)29 30; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: RET_ReallyLR implicit $x0 (in function: strict_align_feature)31; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for strict_align_feature32; FALLBACK-WITH-REPORT-OUT-LABEL: strict_align_feature33define i64 @strict_align_feature(ptr %p) #0 {34 %x = load i64, ptr %p, align 135 ret i64 %x36}37 38attributes #0 = { "target-features"="+strict-align" }39 40; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower function{{.*}}scalable_arg41; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_arg42define <vscale x 16 x i8> @scalable_arg(<vscale x 16 x i1> %pred, ptr %addr) #1 {43 %res = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, ptr %addr)44 ret <vscale x 16 x i8> %res45}46 47; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower function{{.*}}scalable_ret48; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_ret49define <vscale x 16 x i8> @scalable_ret(ptr %addr) #1 {50 %pred = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 0)51 %res = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, ptr %addr)52 ret <vscale x 16 x i8> %res53}54 55; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction{{.*}}scalable_call56; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_call57define i8 @scalable_call(ptr %addr) #1 {58 %pred = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 0)59 %vec = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pred, ptr %addr)60 %res = extractelement <vscale x 16 x i8> %vec, i32 061 ret i8 %res62}63 64; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction{{.*}}scalable_alloca65; FALLBACK-WITH-REPORT-OUT-LABEL: scalable_alloca66define void @scalable_alloca() #1 {67 %local0 = alloca <vscale x 16 x i8>68 load volatile <vscale x 16 x i8>, ptr %local069 ret void70}71 72; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction{{.*}}asm_indirect_output73; FALLBACK-WITH-REPORT-OUT-LABEL: asm_indirect_output74define void @asm_indirect_output() {75entry:76 %ap = alloca ptr, align 877 %0 = load ptr, ptr %ap, align 878 call void asm sideeffect "", "=*r|m,0,~{memory}"(ptr elementtype(ptr) %ap, ptr %0)79 ret void80}81 82%struct.foo = type { [8 x i64] }83 84; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction:{{.*}}ld64b{{.*}}asm_output_ls6485; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for asm_output_ls6486; FALLBACK-WITH-REPORT-OUT-LABEL: asm_output_ls6487define void @asm_output_ls64(ptr %output, ptr %addr) #2 {88entry:89 %val = call i512 asm sideeffect "ld64b $0,[$1]", "=r,r,~{memory}"(ptr %addr)90 store i512 %val, ptr %output, align 891 ret void92}93 94; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction:{{.*}}st64b{{.*}}asm_input_ls6495; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for asm_input_ls6496; FALLBACK-WITH-REPORT-OUT-LABEL: asm_input_ls6497define void @asm_input_ls64(ptr %input, ptr %addr) #2 {98entry:99 %val = load i512, ptr %input, align 8100 call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 %val, ptr %addr)101 ret void102}103 104; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %4:_(s128), %5:_(s1) = G_UMULO %0:_, %6:_ (in function: umul_s128)105; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for umul_s128106; FALLBACK-WITH-REPORT-OUT-LABEL: umul_s128107declare {i128, i1} @llvm.umul.with.overflow.i128(i128, i128) nounwind readnone108define zeroext i1 @umul_s128(i128 %v1, ptr %res) {109entry:110 %t = call {i128, i1} @llvm.umul.with.overflow.i128(i128 %v1, i128 2)111 %val = extractvalue {i128, i1} %t, 0112 %obit = extractvalue {i128, i1} %t, 1113 store i128 %val, ptr %res114 ret i1 %obit115}116 117; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: {{.*}}llvm.experimental.gc.statepoint{{.*}} (in function: gc_intr)118; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for gc_intr119; FALLBACK-WITH-REPORT-OUT-LABEL: gc_intr120 121declare token @llvm.experimental.gc.statepoint.p0(i64 immarg, i32 immarg, ptr, i32 immarg, i32 immarg, ...)122declare i32 @llvm.experimental.gc.result(token)123 124declare i32 @extern_returning_i32()125 126define i32 @gc_intr() gc "statepoint-example" {127 %statepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 2882400000, i32 0, ptr elementtype(i32 ()) @extern_returning_i32, i32 0, i32 0, i32 0, i32 0) [ "deopt"() ]128 %ret = call i32 (token) @llvm.experimental.gc.result(token %statepoint_token)129 ret i32 %ret130}131 132declare void @llvm.assume(i1)133 134; FALLBACK-WITH-REPORT-ERR: <unknown>:0:0: unable to translate instruction: call: ' %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cchi},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)' (in function: inline_asm_with_output_constraint)135; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for inline_asm_with_output_constraint136; FALLBACK-WITH-REPORT-OUT-LABEL: inline_asm_with_output_constraint137define i32 @inline_asm_with_output_constraint(i64 %a) {138entry:139 %0 = tail call { i64, i32 } asm "subs $0, $0, #3", "=r,={@cchi},0,~{dirflag},~{fpsr},~{flags}"(i64 %a)140 %asmresult1 = extractvalue { i64, i32 } %0, 1141 %1 = icmp ult i32 %asmresult1, 2142 tail call void @llvm.assume(i1 %1)143 ret i32 %asmresult1144}145 146attributes #1 = { "target-features"="+sve" }147attributes #2 = { "target-features"="+ls64" }148 149declare <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 %pattern)150declare <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1>, ptr)151