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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2 3# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner --aarch64prelegalizercombiner-only-enable-rule="and_or_disjoint_mask" -global-isel -verify-machineinstrs %s -o - | FileCheck %s4# REQUIRES: asserts5 6...7---8name:            disjoint_masks9tracksRegLiveness: true10machineFunctionInfo: {}11body:             |12  bb.0:13    liveins: $w014    ; CHECK-LABEL: name: disjoint_masks15    ; CHECK: liveins: $w016    ; CHECK-NEXT: {{  $}}17    ; CHECK-NEXT: %x:_(s32) = COPY $w018    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 219    ; CHECK-NEXT: %and:_(s32) = G_AND %x, %two20    ; CHECK-NEXT: $w0 = COPY %and(s32)21    ; CHECK-NEXT: RET_ReallyLR implicit $w022    %x:_(s32) = COPY $w023    %one:_(s32) = G_CONSTANT i32 124    %two:_(s32) = G_CONSTANT i32 225    %or:_(s32) = G_OR %x, %one26    %and:_(s32) = G_AND %or, %two27    $w0 = COPY %and(s32)28    RET_ReallyLR implicit $w029...30---31name:            disjoint_masks_rev32tracksRegLiveness: true33machineFunctionInfo: {}34body:             |35  bb.0:36    liveins: $w037    ; CHECK-LABEL: name: disjoint_masks_rev38    ; CHECK: liveins: $w039    ; CHECK-NEXT: {{  $}}40    ; CHECK-NEXT: %x:_(s32) = COPY $w041    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 242    ; CHECK-NEXT: %and:_(s32) = G_AND %x, %two43    ; CHECK-NEXT: $w0 = COPY %and(s32)44    ; CHECK-NEXT: RET_ReallyLR implicit $w045    %x:_(s32) = COPY $w046    %one:_(s32) = G_CONSTANT i32 147    %two:_(s32) = G_CONSTANT i32 248    %or:_(s32) = G_OR %x, %one49    %and:_(s32) = G_AND %two, %or50    $w0 = COPY %and(s32)51    RET_ReallyLR implicit $w052...53---54name:            intersecting_masks55tracksRegLiveness: true56machineFunctionInfo: {}57body:             |58  bb.0:59    liveins: $w060    ; CHECK-LABEL: name: intersecting_masks61    ; CHECK: liveins: $w062    ; CHECK-NEXT: {{  $}}63    ; CHECK-NEXT: %x:_(s32) = COPY $w064    ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 365    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 266    ; CHECK-NEXT: %or:_(s32) = G_OR %x, %one67    ; CHECK-NEXT: %and:_(s32) = G_AND %or, %two68    ; CHECK-NEXT: $w0 = COPY %and(s32)69    ; CHECK-NEXT: RET_ReallyLR implicit $w070    %x:_(s32) = COPY $w071    %one:_(s32) = G_CONSTANT i32 372    %two:_(s32) = G_CONSTANT i32 273    %or:_(s32) = G_OR %x, %one74    %and:_(s32) = G_AND %or, %two75    $w0 = COPY %and(s32)76    RET_ReallyLR implicit $w077...78---79name:            intersecting_masks_rev80tracksRegLiveness: true81machineFunctionInfo: {}82body:             |83  bb.0:84    liveins: $w085    ; CHECK-LABEL: name: intersecting_masks_rev86    ; CHECK: liveins: $w087    ; CHECK-NEXT: {{  $}}88    ; CHECK-NEXT: %x:_(s32) = COPY $w089    ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 390    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 291    ; CHECK-NEXT: %or:_(s32) = G_OR %x, %one92    ; CHECK-NEXT: %and:_(s32) = G_AND %two, %or93    ; CHECK-NEXT: $w0 = COPY %and(s32)94    ; CHECK-NEXT: RET_ReallyLR implicit $w095    %x:_(s32) = COPY $w096    %one:_(s32) = G_CONSTANT i32 397    %two:_(s32) = G_CONSTANT i32 298    %or:_(s32) = G_OR %x, %one99    %and:_(s32) = G_AND %two, %or100    $w0 = COPY %and(s32)101    RET_ReallyLR implicit $w0102...103---104name:            disjoint_masks_v105tracksRegLiveness: true106machineFunctionInfo: {}107body:             |108  bb.0:109    liveins: $x0110    ; CHECK-LABEL: name: disjoint_masks_v111    ; CHECK: liveins: $x0112    ; CHECK-NEXT: {{  $}}113    ; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0114    ; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1115    ; CHECK-NEXT: %one_v:_(<2 x s32>) = G_DUP %one(s32)116    ; CHECK-NEXT: %two:_(s32) = G_CONSTANT i32 2117    ; CHECK-NEXT: %two_v:_(<2 x s32>) = G_DUP %two(s32)118    ; CHECK-NEXT: %or:_(<2 x s32>) = G_OR %x, %one_v119    ; CHECK-NEXT: %and:_(<2 x s32>) = G_AND %or, %two_v120    ; CHECK-NEXT: $x0 = COPY %and(<2 x s32>)121    ; CHECK-NEXT: RET_ReallyLR implicit $x0122    %x:_(<2 x s32>) = COPY $x0123    %one:_(s32) = G_CONSTANT i32 1124    %one_v:_(<2 x s32>) = G_DUP %one125    %two:_(s32) = G_CONSTANT i32 2126    %two_v:_(<2 x s32>) = G_DUP %two127    %or:_(<2 x s32>) = G_OR %x, %one_v128    %and:_(<2 x s32>) = G_AND %or, %two_v129    $x0 = COPY %and(<2 x s32>)130    RET_ReallyLR implicit $x0131...132