864 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4# Test:5# (X + Y) == X --> Y == 06# (X - Y) == X --> Y == 07# (X ^ Y) == X --> Y == 08# (X + Y) != X --> Y != 09# (X - Y) != X --> Y != 010# (X ^ Y) != X --> Y != 011#12# And all commuted cases.13 14...15---16name: add_scalar_eq17tracksRegLiveness: true18body: |19 bb.0:20 liveins: $w0, $w121 ; CHECK-LABEL: name: add_scalar_eq22 ; CHECK: liveins: $w0, $w123 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: %y:_(s32) = COPY $w125 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 026 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]27 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)28 ; CHECK-NEXT: $w0 = COPY %ext(s32)29 ; CHECK-NEXT: RET_ReallyLR implicit $w030 %x:_(s32) = COPY $w031 %y:_(s32) = COPY $w132 %op:_(s32) = G_ADD %x, %y33 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x34 %ext:_(s32) = G_ZEXT %cmp(s1)35 $w0 = COPY %ext(s32)36 RET_ReallyLR implicit $w037...38---39name: add_vector_eq40tracksRegLiveness: true41body: |42 bb.0:43 liveins: $q0, $q144 ; CHECK-LABEL: name: add_vector_eq45 ; CHECK: liveins: $q0, $q146 ; CHECK-NEXT: {{ $}}47 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q148 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 049 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)50 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]51 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)52 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)53 ; CHECK-NEXT: RET_ReallyLR implicit $d054 %x:_(<4 x s32>) = COPY $q055 %y:_(<4 x s32>) = COPY $q156 %op:_(<4 x s32>) = G_ADD %x, %y57 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x58 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)59 $d0 = COPY %ext(<4 x s16>)60 RET_ReallyLR implicit $d061...62---63name: add_scalar_eq_commuted_in_op64tracksRegLiveness: true65body: |66 bb.0:67 liveins: $w0, $w168 ; CHECK-LABEL: name: add_scalar_eq_commuted_in_op69 ; CHECK: liveins: $w0, $w170 ; CHECK-NEXT: {{ $}}71 ; CHECK-NEXT: %y:_(s32) = COPY $w172 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 073 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]74 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)75 ; CHECK-NEXT: $w0 = COPY %ext(s32)76 ; CHECK-NEXT: RET_ReallyLR implicit $w077 %x:_(s32) = COPY $w078 %y:_(s32) = COPY $w179 %op:_(s32) = G_ADD %y, %x80 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x81 %ext:_(s32) = G_ZEXT %cmp(s1)82 $w0 = COPY %ext(s32)83 RET_ReallyLR implicit $w084...85---86name: add_vector_eq_commuted_in_op87tracksRegLiveness: true88body: |89 bb.0:90 liveins: $q0, $q191 ; CHECK-LABEL: name: add_vector_eq_commuted_in_op92 ; CHECK: liveins: $q0, $q193 ; CHECK-NEXT: {{ $}}94 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q195 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 096 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)97 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]98 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)99 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)100 ; CHECK-NEXT: RET_ReallyLR implicit $d0101 %x:_(<4 x s32>) = COPY $q0102 %y:_(<4 x s32>) = COPY $q1103 %op:_(<4 x s32>) = G_ADD %y, %x104 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x105 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)106 $d0 = COPY %ext(<4 x s16>)107 RET_ReallyLR implicit $d0108...109---110name: add_scalar_eq_commuted_in_cmp111tracksRegLiveness: true112body: |113 bb.0:114 liveins: $w0, $w1115 ; CHECK-LABEL: name: add_scalar_eq_commuted_in_cmp116 ; CHECK: liveins: $w0, $w1117 ; CHECK-NEXT: {{ $}}118 ; CHECK-NEXT: %y:_(s32) = COPY $w1119 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0120 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]121 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)122 ; CHECK-NEXT: $w0 = COPY %ext(s32)123 ; CHECK-NEXT: RET_ReallyLR implicit $w0124 %x:_(s32) = COPY $w0125 %y:_(s32) = COPY $w1126 %op:_(s32) = G_ADD %x, %y127 %cmp:_(s1) = G_ICMP intpred(eq), %x(s32), %op128 %ext:_(s32) = G_ZEXT %cmp(s1)129 $w0 = COPY %ext(s32)130 RET_ReallyLR implicit $w0131...132---133name: add_vector_eq_commuted_in_cmp134tracksRegLiveness: true135body: |136 bb.0:137 liveins: $q0, $q1138 ; CHECK-LABEL: name: add_vector_eq_commuted_in_cmp139 ; CHECK: liveins: $q0, $q1140 ; CHECK-NEXT: {{ $}}141 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1142 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0143 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)144 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]145 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)146 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)147 ; CHECK-NEXT: RET_ReallyLR implicit $d0148 %x:_(<4 x s32>) = COPY $q0149 %y:_(<4 x s32>) = COPY $q1150 %op:_(<4 x s32>) = G_ADD %x, %y151 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %x(<4 x s32>), %op152 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)153 $d0 = COPY %ext(<4 x s16>)154 RET_ReallyLR implicit $d0155...156---157name: xor_scalar_eq158tracksRegLiveness: true159body: |160 bb.0:161 liveins: $w0, $w1162 ; CHECK-LABEL: name: xor_scalar_eq163 ; CHECK: liveins: $w0, $w1164 ; CHECK-NEXT: {{ $}}165 ; CHECK-NEXT: %y:_(s32) = COPY $w1166 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0167 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]168 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)169 ; CHECK-NEXT: $w0 = COPY %ext(s32)170 ; CHECK-NEXT: RET_ReallyLR implicit $w0171 %x:_(s32) = COPY $w0172 %y:_(s32) = COPY $w1173 %op:_(s32) = G_XOR %x, %y174 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x175 %ext:_(s32) = G_ZEXT %cmp(s1)176 $w0 = COPY %ext(s32)177 RET_ReallyLR implicit $w0178...179---180name: xor_vector_eq181tracksRegLiveness: true182body: |183 bb.0:184 liveins: $q0, $q1185 ; CHECK-LABEL: name: xor_vector_eq186 ; CHECK: liveins: $q0, $q1187 ; CHECK-NEXT: {{ $}}188 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1189 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0190 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)191 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]192 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)193 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)194 ; CHECK-NEXT: RET_ReallyLR implicit $d0195 %x:_(<4 x s32>) = COPY $q0196 %y:_(<4 x s32>) = COPY $q1197 %op:_(<4 x s32>) = G_XOR %x, %y198 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x199 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)200 $d0 = COPY %ext(<4 x s16>)201 RET_ReallyLR implicit $d0202...203---204name: xor_scalar_eq_commuted_in_op205tracksRegLiveness: true206body: |207 bb.0:208 liveins: $w0, $w1209 ; CHECK-LABEL: name: xor_scalar_eq_commuted_in_op210 ; CHECK: liveins: $w0, $w1211 ; CHECK-NEXT: {{ $}}212 ; CHECK-NEXT: %y:_(s32) = COPY $w1213 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0214 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]215 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)216 ; CHECK-NEXT: $w0 = COPY %ext(s32)217 ; CHECK-NEXT: RET_ReallyLR implicit $w0218 %x:_(s32) = COPY $w0219 %y:_(s32) = COPY $w1220 %op:_(s32) = G_XOR %y, %x221 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x222 %ext:_(s32) = G_ZEXT %cmp(s1)223 $w0 = COPY %ext(s32)224 RET_ReallyLR implicit $w0225...226---227name: xor_vector_eq_commuted_in_op228tracksRegLiveness: true229body: |230 bb.0:231 liveins: $q0, $q1232 ; CHECK-LABEL: name: xor_vector_eq_commuted_in_op233 ; CHECK: liveins: $q0, $q1234 ; CHECK-NEXT: {{ $}}235 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1236 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0237 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)238 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]239 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)240 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)241 ; CHECK-NEXT: RET_ReallyLR implicit $d0242 %x:_(<4 x s32>) = COPY $q0243 %y:_(<4 x s32>) = COPY $q1244 %op:_(<4 x s32>) = G_XOR %y, %x245 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x246 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)247 $d0 = COPY %ext(<4 x s16>)248 RET_ReallyLR implicit $d0249...250---251name: xor_scalar_eq_commuted_in_cmp252tracksRegLiveness: true253body: |254 bb.0:255 liveins: $w0, $w1256 ; CHECK-LABEL: name: xor_scalar_eq_commuted_in_cmp257 ; CHECK: liveins: $w0, $w1258 ; CHECK-NEXT: {{ $}}259 ; CHECK-NEXT: %y:_(s32) = COPY $w1260 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0261 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]262 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)263 ; CHECK-NEXT: $w0 = COPY %ext(s32)264 ; CHECK-NEXT: RET_ReallyLR implicit $w0265 %x:_(s32) = COPY $w0266 %y:_(s32) = COPY $w1267 %op:_(s32) = G_XOR %x, %y268 %cmp:_(s1) = G_ICMP intpred(eq), %x(s32), %op269 %ext:_(s32) = G_ZEXT %cmp(s1)270 $w0 = COPY %ext(s32)271 RET_ReallyLR implicit $w0272...273---274name: xor_vector_eq_commuted_in_cmp275tracksRegLiveness: true276body: |277 bb.0:278 liveins: $q0, $q1279 ; CHECK-LABEL: name: xor_vector_eq_commuted_in_cmp280 ; CHECK: liveins: $q0, $q1281 ; CHECK-NEXT: {{ $}}282 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1283 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0284 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)285 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]286 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)287 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)288 ; CHECK-NEXT: RET_ReallyLR implicit $d0289 %x:_(<4 x s32>) = COPY $q0290 %y:_(<4 x s32>) = COPY $q1291 %op:_(<4 x s32>) = G_XOR %x, %y292 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %x(<4 x s32>), %op293 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)294 $d0 = COPY %ext(<4 x s16>)295 RET_ReallyLR implicit $d0296...297---298name: sub_scalar_eq299tracksRegLiveness: true300body: |301 bb.0:302 liveins: $w0, $w1303 ; CHECK-LABEL: name: sub_scalar_eq304 ; CHECK: liveins: $w0, $w1305 ; CHECK-NEXT: {{ $}}306 ; CHECK-NEXT: %y:_(s32) = COPY $w1307 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0308 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]309 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)310 ; CHECK-NEXT: $w0 = COPY %ext(s32)311 ; CHECK-NEXT: RET_ReallyLR implicit $w0312 %x:_(s32) = COPY $w0313 %y:_(s32) = COPY $w1314 %op:_(s32) = G_SUB %x, %y315 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x316 %ext:_(s32) = G_ZEXT %cmp(s1)317 $w0 = COPY %ext(s32)318 RET_ReallyLR implicit $w0319...320---321name: sub_vector_eq322tracksRegLiveness: true323body: |324 bb.0:325 liveins: $q0, $q1326 ; CHECK-LABEL: name: sub_vector_eq327 ; CHECK: liveins: $q0, $q1328 ; CHECK-NEXT: {{ $}}329 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1330 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0331 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)332 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]333 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)334 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)335 ; CHECK-NEXT: RET_ReallyLR implicit $d0336 %x:_(<4 x s32>) = COPY $q0337 %y:_(<4 x s32>) = COPY $q1338 %op:_(<4 x s32>) = G_SUB %x, %y339 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x340 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)341 $d0 = COPY %ext(<4 x s16>)342 RET_ReallyLR implicit $d0343...344---345name: sub_scalar_eq_commuted_in_cmp346tracksRegLiveness: true347body: |348 bb.0:349 liveins: $w0, $w1350 ; CHECK-LABEL: name: sub_scalar_eq_commuted_in_cmp351 ; CHECK: liveins: $w0, $w1352 ; CHECK-NEXT: {{ $}}353 ; CHECK-NEXT: %y:_(s32) = COPY $w1354 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0355 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %y(s32), [[C]]356 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)357 ; CHECK-NEXT: $w0 = COPY %ext(s32)358 ; CHECK-NEXT: RET_ReallyLR implicit $w0359 %x:_(s32) = COPY $w0360 %y:_(s32) = COPY $w1361 %op:_(s32) = G_SUB %x, %y362 %cmp:_(s1) = G_ICMP intpred(eq), %x(s32), %op363 %ext:_(s32) = G_ZEXT %cmp(s1)364 $w0 = COPY %ext(s32)365 RET_ReallyLR implicit $w0366...367---368name: sub_vector_eq_commuted_in_cmp369tracksRegLiveness: true370body: |371 bb.0:372 liveins: $q0, $q1373 ; CHECK-LABEL: name: sub_vector_eq_commuted_in_cmp374 ; CHECK: liveins: $q0, $q1375 ; CHECK-NEXT: {{ $}}376 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1377 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0378 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)379 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %y(<4 x s32>), [[BUILD_VECTOR]]380 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)381 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)382 ; CHECK-NEXT: RET_ReallyLR implicit $d0383 %x:_(<4 x s32>) = COPY $q0384 %y:_(<4 x s32>) = COPY $q1385 %op:_(<4 x s32>) = G_SUB %x, %y386 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %x(<4 x s32>), %op387 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)388 $d0 = COPY %ext(<4 x s16>)389 RET_ReallyLR implicit $d0390...391---392name: add_scalar_ne393tracksRegLiveness: true394body: |395 bb.0:396 liveins: $w0, $w1397 ; CHECK-LABEL: name: add_scalar_ne398 ; CHECK: liveins: $w0, $w1399 ; CHECK-NEXT: {{ $}}400 ; CHECK-NEXT: %y:_(s32) = COPY $w1401 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0402 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]403 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)404 ; CHECK-NEXT: $w0 = COPY %ext(s32)405 ; CHECK-NEXT: RET_ReallyLR implicit $w0406 %x:_(s32) = COPY $w0407 %y:_(s32) = COPY $w1408 %op:_(s32) = G_ADD %x, %y409 %cmp:_(s1) = G_ICMP intpred(ne), %op(s32), %x410 %ext:_(s32) = G_ZEXT %cmp(s1)411 $w0 = COPY %ext(s32)412 RET_ReallyLR implicit $w0413...414---415name: add_vector_ne416tracksRegLiveness: true417body: |418 bb.0:419 liveins: $q0, $q1420 ; CHECK-LABEL: name: add_vector_ne421 ; CHECK: liveins: $q0, $q1422 ; CHECK-NEXT: {{ $}}423 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1424 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0425 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)426 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]427 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)428 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)429 ; CHECK-NEXT: RET_ReallyLR implicit $d0430 %x:_(<4 x s32>) = COPY $q0431 %y:_(<4 x s32>) = COPY $q1432 %op:_(<4 x s32>) = G_ADD %x, %y433 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %op(<4 x s32>), %x434 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)435 $d0 = COPY %ext(<4 x s16>)436 RET_ReallyLR implicit $d0437...438---439name: add_scalar_ne_commuted_in_op440tracksRegLiveness: true441body: |442 bb.0:443 liveins: $w0, $w1444 ; CHECK-LABEL: name: add_scalar_ne_commuted_in_op445 ; CHECK: liveins: $w0, $w1446 ; CHECK-NEXT: {{ $}}447 ; CHECK-NEXT: %y:_(s32) = COPY $w1448 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0449 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]450 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)451 ; CHECK-NEXT: $w0 = COPY %ext(s32)452 ; CHECK-NEXT: RET_ReallyLR implicit $w0453 %x:_(s32) = COPY $w0454 %y:_(s32) = COPY $w1455 %op:_(s32) = G_ADD %y, %x456 %cmp:_(s1) = G_ICMP intpred(ne), %op(s32), %x457 %ext:_(s32) = G_ZEXT %cmp(s1)458 $w0 = COPY %ext(s32)459 RET_ReallyLR implicit $w0460...461---462name: add_vector_ne_commuted_in_op463tracksRegLiveness: true464body: |465 bb.0:466 liveins: $q0, $q1467 ; CHECK-LABEL: name: add_vector_ne_commuted_in_op468 ; CHECK: liveins: $q0, $q1469 ; CHECK-NEXT: {{ $}}470 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1471 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0472 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)473 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]474 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)475 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)476 ; CHECK-NEXT: RET_ReallyLR implicit $d0477 %x:_(<4 x s32>) = COPY $q0478 %y:_(<4 x s32>) = COPY $q1479 %op:_(<4 x s32>) = G_ADD %y, %x480 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %op(<4 x s32>), %x481 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)482 $d0 = COPY %ext(<4 x s16>)483 RET_ReallyLR implicit $d0484...485---486name: add_scalar_ne_commuted_in_cmp487tracksRegLiveness: true488body: |489 bb.0:490 liveins: $w0, $w1491 ; CHECK-LABEL: name: add_scalar_ne_commuted_in_cmp492 ; CHECK: liveins: $w0, $w1493 ; CHECK-NEXT: {{ $}}494 ; CHECK-NEXT: %y:_(s32) = COPY $w1495 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0496 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]497 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)498 ; CHECK-NEXT: $w0 = COPY %ext(s32)499 ; CHECK-NEXT: RET_ReallyLR implicit $w0500 %x:_(s32) = COPY $w0501 %y:_(s32) = COPY $w1502 %op:_(s32) = G_ADD %x, %y503 %cmp:_(s1) = G_ICMP intpred(ne), %x(s32), %op504 %ext:_(s32) = G_ZEXT %cmp(s1)505 $w0 = COPY %ext(s32)506 RET_ReallyLR implicit $w0507...508---509name: add_vector_ne_commuted_in_cmp510tracksRegLiveness: true511body: |512 bb.0:513 liveins: $q0, $q1514 ; CHECK-LABEL: name: add_vector_ne_commuted_in_cmp515 ; CHECK: liveins: $q0, $q1516 ; CHECK-NEXT: {{ $}}517 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1518 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0519 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)520 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]521 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)522 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)523 ; CHECK-NEXT: RET_ReallyLR implicit $d0524 %x:_(<4 x s32>) = COPY $q0525 %y:_(<4 x s32>) = COPY $q1526 %op:_(<4 x s32>) = G_ADD %x, %y527 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %x(<4 x s32>), %op528 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)529 $d0 = COPY %ext(<4 x s16>)530 RET_ReallyLR implicit $d0531...532---533name: xor_scalar_ne534tracksRegLiveness: true535body: |536 bb.0:537 liveins: $w0, $w1538 ; CHECK-LABEL: name: xor_scalar_ne539 ; CHECK: liveins: $w0, $w1540 ; CHECK-NEXT: {{ $}}541 ; CHECK-NEXT: %y:_(s32) = COPY $w1542 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0543 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]544 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)545 ; CHECK-NEXT: $w0 = COPY %ext(s32)546 ; CHECK-NEXT: RET_ReallyLR implicit $w0547 %x:_(s32) = COPY $w0548 %y:_(s32) = COPY $w1549 %op:_(s32) = G_XOR %x, %y550 %cmp:_(s1) = G_ICMP intpred(ne), %op(s32), %x551 %ext:_(s32) = G_ZEXT %cmp(s1)552 $w0 = COPY %ext(s32)553 RET_ReallyLR implicit $w0554...555---556name: xor_vector_ne557tracksRegLiveness: true558body: |559 bb.0:560 liveins: $q0, $q1561 ; CHECK-LABEL: name: xor_vector_ne562 ; CHECK: liveins: $q0, $q1563 ; CHECK-NEXT: {{ $}}564 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1565 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0566 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)567 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]568 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)569 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)570 ; CHECK-NEXT: RET_ReallyLR implicit $d0571 %x:_(<4 x s32>) = COPY $q0572 %y:_(<4 x s32>) = COPY $q1573 %op:_(<4 x s32>) = G_XOR %x, %y574 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %op(<4 x s32>), %x575 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)576 $d0 = COPY %ext(<4 x s16>)577 RET_ReallyLR implicit $d0578...579---580name: xor_scalar_ne_commuted_in_op581tracksRegLiveness: true582body: |583 bb.0:584 liveins: $w0, $w1585 ; CHECK-LABEL: name: xor_scalar_ne_commuted_in_op586 ; CHECK: liveins: $w0, $w1587 ; CHECK-NEXT: {{ $}}588 ; CHECK-NEXT: %y:_(s32) = COPY $w1589 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0590 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]591 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)592 ; CHECK-NEXT: $w0 = COPY %ext(s32)593 ; CHECK-NEXT: RET_ReallyLR implicit $w0594 %x:_(s32) = COPY $w0595 %y:_(s32) = COPY $w1596 %op:_(s32) = G_XOR %y, %x597 %cmp:_(s1) = G_ICMP intpred(ne), %op(s32), %x598 %ext:_(s32) = G_ZEXT %cmp(s1)599 $w0 = COPY %ext(s32)600 RET_ReallyLR implicit $w0601...602---603name: xor_vector_ne_commuted_in_op604tracksRegLiveness: true605body: |606 bb.0:607 liveins: $q0, $q1608 ; CHECK-LABEL: name: xor_vector_ne_commuted_in_op609 ; CHECK: liveins: $q0, $q1610 ; CHECK-NEXT: {{ $}}611 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1612 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0613 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)614 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]615 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)616 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)617 ; CHECK-NEXT: RET_ReallyLR implicit $d0618 %x:_(<4 x s32>) = COPY $q0619 %y:_(<4 x s32>) = COPY $q1620 %op:_(<4 x s32>) = G_XOR %y, %x621 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %op(<4 x s32>), %x622 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)623 $d0 = COPY %ext(<4 x s16>)624 RET_ReallyLR implicit $d0625...626---627name: xor_scalar_ne_commuted_in_cmp628tracksRegLiveness: true629body: |630 bb.0:631 liveins: $w0, $w1632 ; CHECK-LABEL: name: xor_scalar_ne_commuted_in_cmp633 ; CHECK: liveins: $w0, $w1634 ; CHECK-NEXT: {{ $}}635 ; CHECK-NEXT: %y:_(s32) = COPY $w1636 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0637 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]638 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)639 ; CHECK-NEXT: $w0 = COPY %ext(s32)640 ; CHECK-NEXT: RET_ReallyLR implicit $w0641 %x:_(s32) = COPY $w0642 %y:_(s32) = COPY $w1643 %op:_(s32) = G_XOR %x, %y644 %cmp:_(s1) = G_ICMP intpred(ne), %x(s32), %op645 %ext:_(s32) = G_ZEXT %cmp(s1)646 $w0 = COPY %ext(s32)647 RET_ReallyLR implicit $w0648...649---650name: xor_vector_ne_commuted_in_cmp651tracksRegLiveness: true652body: |653 bb.0:654 liveins: $q0, $q1655 ; CHECK-LABEL: name: xor_vector_ne_commuted_in_cmp656 ; CHECK: liveins: $q0, $q1657 ; CHECK-NEXT: {{ $}}658 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1659 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0660 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)661 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]662 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)663 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)664 ; CHECK-NEXT: RET_ReallyLR implicit $d0665 %x:_(<4 x s32>) = COPY $q0666 %y:_(<4 x s32>) = COPY $q1667 %op:_(<4 x s32>) = G_XOR %x, %y668 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %x(<4 x s32>), %op669 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)670 $d0 = COPY %ext(<4 x s16>)671 RET_ReallyLR implicit $d0672...673---674name: sub_scalar_ne675tracksRegLiveness: true676body: |677 bb.0:678 liveins: $w0, $w1679 ; CHECK-LABEL: name: sub_scalar_ne680 ; CHECK: liveins: $w0, $w1681 ; CHECK-NEXT: {{ $}}682 ; CHECK-NEXT: %y:_(s32) = COPY $w1683 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0684 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]685 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)686 ; CHECK-NEXT: $w0 = COPY %ext(s32)687 ; CHECK-NEXT: RET_ReallyLR implicit $w0688 %x:_(s32) = COPY $w0689 %y:_(s32) = COPY $w1690 %op:_(s32) = G_SUB %x, %y691 %cmp:_(s1) = G_ICMP intpred(ne), %op(s32), %x692 %ext:_(s32) = G_ZEXT %cmp(s1)693 $w0 = COPY %ext(s32)694 RET_ReallyLR implicit $w0695...696---697name: sub_vector_ne698tracksRegLiveness: true699body: |700 bb.0:701 liveins: $q0, $q1702 ; CHECK-LABEL: name: sub_vector_ne703 ; CHECK: liveins: $q0, $q1704 ; CHECK-NEXT: {{ $}}705 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1706 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0707 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)708 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]709 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)710 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)711 ; CHECK-NEXT: RET_ReallyLR implicit $d0712 %x:_(<4 x s32>) = COPY $q0713 %y:_(<4 x s32>) = COPY $q1714 %op:_(<4 x s32>) = G_SUB %x, %y715 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %op(<4 x s32>), %x716 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)717 $d0 = COPY %ext(<4 x s16>)718 RET_ReallyLR implicit $d0719...720---721name: sub_scalar_ne_commuted_in_cmp722tracksRegLiveness: true723body: |724 bb.0:725 liveins: $w0, $w1726 ; CHECK-LABEL: name: sub_scalar_ne_commuted_in_cmp727 ; CHECK: liveins: $w0, $w1728 ; CHECK-NEXT: {{ $}}729 ; CHECK-NEXT: %y:_(s32) = COPY $w1730 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0731 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(ne), %y(s32), [[C]]732 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)733 ; CHECK-NEXT: $w0 = COPY %ext(s32)734 ; CHECK-NEXT: RET_ReallyLR implicit $w0735 %x:_(s32) = COPY $w0736 %y:_(s32) = COPY $w1737 %op:_(s32) = G_SUB %x, %y738 %cmp:_(s1) = G_ICMP intpred(ne), %x(s32), %op739 %ext:_(s32) = G_ZEXT %cmp(s1)740 $w0 = COPY %ext(s32)741 RET_ReallyLR implicit $w0742...743---744name: sub_vector_ne_commuted_in_cmp745tracksRegLiveness: true746body: |747 bb.0:748 liveins: $q0, $q1749 ; CHECK-LABEL: name: sub_vector_ne_commuted_in_cmp750 ; CHECK: liveins: $q0, $q1751 ; CHECK-NEXT: {{ $}}752 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1753 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0754 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)755 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %y(<4 x s32>), [[BUILD_VECTOR]]756 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)757 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)758 ; CHECK-NEXT: RET_ReallyLR implicit $d0759 %x:_(<4 x s32>) = COPY $q0760 %y:_(<4 x s32>) = COPY $q1761 %op:_(<4 x s32>) = G_SUB %x, %y762 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %x(<4 x s32>), %op763 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)764 $d0 = COPY %ext(<4 x s16>)765 RET_ReallyLR implicit $d0766...767---768name: dont_combine_sub_scalar_eq_commuted_in_op769tracksRegLiveness: true770body: |771 bb.0:772 liveins: $w0, $w1773 ; CHECK-LABEL: name: dont_combine_sub_scalar_eq_commuted_in_op774 ; CHECK: liveins: $w0, $w1775 ; CHECK-NEXT: {{ $}}776 ; CHECK-NEXT: %x:_(s32) = COPY $w0777 ; CHECK-NEXT: %y:_(s32) = COPY $w1778 ; CHECK-NEXT: %op:_(s32) = G_SUB %y, %x779 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x780 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)781 ; CHECK-NEXT: $w0 = COPY %ext(s32)782 ; CHECK-NEXT: RET_ReallyLR implicit $w0783 %x:_(s32) = COPY $w0784 %y:_(s32) = COPY $w1785 %op:_(s32) = G_SUB %y, %x786 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %x787 %ext:_(s32) = G_ZEXT %cmp(s1)788 $w0 = COPY %ext(s32)789 RET_ReallyLR implicit $w0790...791---792name: dont_combine_sub_vector_eq_commuted_in_op793tracksRegLiveness: true794body: |795 bb.0:796 liveins: $q0, $q1797 ; CHECK-LABEL: name: dont_combine_sub_vector_eq_commuted_in_op798 ; CHECK: liveins: $q0, $q1799 ; CHECK-NEXT: {{ $}}800 ; CHECK-NEXT: %x:_(<4 x s32>) = COPY $q0801 ; CHECK-NEXT: %y:_(<4 x s32>) = COPY $q1802 ; CHECK-NEXT: %op:_(<4 x s32>) = G_SUB %y, %x803 ; CHECK-NEXT: %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x804 ; CHECK-NEXT: %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)805 ; CHECK-NEXT: $d0 = COPY %ext(<4 x s16>)806 ; CHECK-NEXT: RET_ReallyLR implicit $d0807 %x:_(<4 x s32>) = COPY $q0808 %y:_(<4 x s32>) = COPY $q1809 %op:_(<4 x s32>) = G_SUB %y, %x810 %cmp:_(<4 x s1>) = G_ICMP intpred(eq), %op(<4 x s32>), %x811 %ext:_(<4 x s16>) = G_ANYEXT %cmp(<4 x s1>)812 $d0 = COPY %ext(<4 x s16>)813 RET_ReallyLR implicit $d0814...815---816name: dont_combine_not_equality817tracksRegLiveness: true818body: |819 bb.0:820 liveins: $w0, $w1821 ; CHECK-LABEL: name: dont_combine_not_equality822 ; CHECK: liveins: $w0, $w1823 ; CHECK-NEXT: {{ $}}824 ; CHECK-NEXT: %x:_(s32) = COPY $w0825 ; CHECK-NEXT: %y:_(s32) = COPY $w1826 ; CHECK-NEXT: %op:_(s32) = G_ADD %x, %y827 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(slt), %op(s32), %x828 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)829 ; CHECK-NEXT: $w0 = COPY %ext(s32)830 ; CHECK-NEXT: RET_ReallyLR implicit $w0831 %x:_(s32) = COPY $w0832 %y:_(s32) = COPY $w1833 %op:_(s32) = G_ADD %x, %y834 %cmp:_(s1) = G_ICMP intpred(slt), %op(s32), %x835 %ext:_(s32) = G_ZEXT %cmp(s1)836 $w0 = COPY %ext(s32)837 RET_ReallyLR implicit $w0838...839---840name: dont_combine_unique_operands841tracksRegLiveness: true842body: |843 bb.0:844 liveins: $w0, $w1, $w2845 ; CHECK-LABEL: name: dont_combine_unique_operands846 ; CHECK: liveins: $w0, $w1, $w2847 ; CHECK-NEXT: {{ $}}848 ; CHECK-NEXT: %x:_(s32) = COPY $w0849 ; CHECK-NEXT: %y:_(s32) = COPY $w1850 ; CHECK-NEXT: %z:_(s32) = COPY $w2851 ; CHECK-NEXT: %op:_(s32) = G_ADD %x, %y852 ; CHECK-NEXT: %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %z853 ; CHECK-NEXT: %ext:_(s32) = G_ZEXT %cmp(s1)854 ; CHECK-NEXT: $w0 = COPY %ext(s32)855 ; CHECK-NEXT: RET_ReallyLR implicit $w0856 %x:_(s32) = COPY $w0857 %y:_(s32) = COPY $w1858 %z:_(s32) = COPY $w2859 %op:_(s32) = G_ADD %x, %y860 %cmp:_(s1) = G_ICMP intpred(eq), %op(s32), %z861 %ext:_(s32) = G_ZEXT %cmp(s1)862 $w0 = COPY %ext(s32)863 RET_ReallyLR implicit $w0864