82 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -o - -mtriple aarch64-- -run-pass=aarch64-prelegalizer-combiner %s | FileCheck %s3---4name: test_combine_neg_and_one_to_sext_inreg_s325body: |6 bb.1:7 liveins: $w08 ; CHECK-LABEL: name: test_combine_neg_and_one_to_sext_inreg_s329 ; CHECK: liveins: $w010 ; CHECK-NEXT: {{ $}}11 ; CHECK-NEXT: %x:_(s32) = COPY $w012 ; CHECK-NEXT: %res:_(s32) = G_SEXT_INREG %x, 113 ; CHECK-NEXT: $w0 = COPY %res(s32)14 %x:_(s32) = COPY $w015 %one:_(s32) = G_CONSTANT i32 116 %zero:_(s32) = G_CONSTANT i32 017 %and:_(s32) = G_AND %x:_, %one:_18 %res:_(s32) = G_SUB %zero:_, %and:_19 $w0 = COPY %res:_(s32)20...21---22name: test_combine_neg_and_one_to_sext_inreg_s6423body: |24 bb.1:25 liveins: $x026 ; CHECK-LABEL: name: test_combine_neg_and_one_to_sext_inreg_s6427 ; CHECK: liveins: $x028 ; CHECK-NEXT: {{ $}}29 ; CHECK-NEXT: %x:_(s64) = COPY $x030 ; CHECK-NEXT: %res:_(s64) = G_SEXT_INREG %x, 131 ; CHECK-NEXT: $x0 = COPY %res(s64)32 %x:_(s64) = COPY $x033 %one:_(s64) = G_CONSTANT i64 134 %zero:_(s64) = G_CONSTANT i64 035 %and:_(s64) = G_AND %x:_, %one:_36 %res:_(s64) = G_SUB %zero:_, %and:_37 $x0 = COPY %res:_(s64)38...39---40name: test_combine_neg_and_one_to_sext_inreg_multiuse_should_not_transform41body: |42 bb.1:43 liveins: $x044 ; CHECK-LABEL: name: test_combine_neg_and_one_to_sext_inreg_multiuse_should_not_transform45 ; CHECK: liveins: $x046 ; CHECK-NEXT: {{ $}}47 ; CHECK-NEXT: %x:_(s64) = COPY $x048 ; CHECK-NEXT: %one:_(s64) = G_CONSTANT i64 149 ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 050 ; CHECK-NEXT: %and:_(s64) = G_AND %x, %one51 ; CHECK-NEXT: %res:_(s64) = G_SUB %zero, %and52 ; CHECK-NEXT: $x0 = COPY %res(s64)53 ; CHECK-NEXT: $x1 = COPY %and(s64)54 %x:_(s64) = COPY $x055 %one:_(s64) = G_CONSTANT i64 156 %zero:_(s64) = G_CONSTANT i64 057 %and:_(s64) = G_AND %x:_, %one:_58 %res:_(s64) = G_SUB %zero:_, %and:_59 $x0 = COPY %res:_(s64)60 $x1 = COPY %and:_(s64)61...62---63name: test_combine_neg_and_one_to_sext_inreg_v2i3264body: |65 bb.1:66 liveins: $d067 ; CHECK-LABEL: name: test_combine_neg_and_one_to_sext_inreg_v2i3268 ; CHECK: liveins: $d069 ; CHECK-NEXT: {{ $}}70 ; CHECK-NEXT: %x:_(<2 x s32>) = COPY $d071 ; CHECK-NEXT: %res:_(<2 x s32>) = G_SEXT_INREG %x, 172 ; CHECK-NEXT: $d0 = COPY %res(<2 x s32>)73 %x:_(<2 x s32>) = COPY $d074 %one:_(s32) = G_CONSTANT i32 175 %ones:_(<2 x s32>) = G_BUILD_VECTOR %one, %one76 %zero:_(s32) = G_CONSTANT i32 077 %zeros:_(<2 x s32>) = G_BUILD_VECTOR %zero, %zero78 %and:_(<2 x s32>) = G_AND %x:_, %ones:_79 %res:_(<2 x s32>) = G_SUB %zeros:_, %and:_80 $d0 = COPY %res:_(<2 x s32>)81...82