26 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s3# Check that we don't miscompile this into G_UDIVREM because of the different4# first operands.5---6name: no_combine_divrem_different_src17body: |8 bb.1:9 liveins: $w010 11 ; CHECK-LABEL: name: no_combine_divrem_different_src112 ; CHECK: liveins: $w013 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w015 ; CHECK-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY]], [[COPY]]16 ; CHECK-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[UREM]], [[COPY]]17 ; CHECK-NEXT: $w0 = COPY [[UDIV]](s32)18 ; CHECK-NEXT: RET_ReallyLR implicit $w019 %0:_(s32) = COPY $w020 %1:_(s32) = G_UREM %0, %021 %2:_(s32) = G_UDIV %1, %022 $w0 = COPY %2(s32)23 RET_ReallyLR implicit $w024 25...26