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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -o - -mtriple=aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s3 4...5---6name: sum_of_vscale7body: |8 bb.1:9 liveins: $x0, $x110 ; CHECK-LABEL: name: sum_of_vscale11 ; CHECK: liveins: $x0, $x112 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: %sum:_(s64) = G_VSCALE i64 2014 ; CHECK-NEXT: $x0 = COPY %sum(s64)15 ; CHECK-NEXT: RET_ReallyLR implicit $x016 %rhs:_(s64) = G_VSCALE i64 1117 %lhs:_(s64) = G_VSCALE i64 918 %sum:_(s64) = nsw G_ADD %lhs(s64), %rhs(s64)19 $x0 = COPY %sum(s64)20 RET_ReallyLR implicit $x021...22---23name: sum_of_vscale_multi_use24body: |25 bb.1:26 liveins: $x0, $x127 ; CHECK-LABEL: name: sum_of_vscale_multi_use28 ; CHECK: liveins: $x0, $x129 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: %rhs:_(s64) = G_VSCALE i64 1131 ; CHECK-NEXT: %lhs:_(s64) = G_VSCALE i64 932 ; CHECK-NEXT: %sum:_(s64) = nsw G_ADD %lhs, %rhs33 ; CHECK-NEXT: $x0 = COPY %sum(s64)34 ; CHECK-NEXT: $x1 = COPY %rhs(s64)35 ; CHECK-NEXT: RET_ReallyLR implicit $x036 %rhs:_(s64) = G_VSCALE i64 1137 %lhs:_(s64) = G_VSCALE i64 938 %sum:_(s64) = nsw G_ADD %lhs(s64), %rhs(s64)39 $x0 = COPY %sum(s64)40 $x1 = COPY %rhs(s64)41 RET_ReallyLR implicit $x042...43---44name: mul_of_vscale45body: |46 bb.1:47 liveins: $x0, $x148 ; CHECK-LABEL: name: mul_of_vscale49 ; CHECK: liveins: $x0, $x150 ; CHECK-NEXT: {{ $}}51 ; CHECK-NEXT: %mul:_(s64) = G_VSCALE i64 9952 ; CHECK-NEXT: $x0 = COPY %mul(s64)53 ; CHECK-NEXT: RET_ReallyLR implicit $x054 %rhs:_(s64) = G_CONSTANT i64 1155 %lhs:_(s64) = G_VSCALE i64 956 %mul:_(s64) = nsw G_MUL %lhs(s64), %rhs(s64)57 $x0 = COPY %mul(s64)58 RET_ReallyLR implicit $x059...60---61name: sub_of_vscale62body: |63 bb.1:64 liveins: $x0, $x165 ; CHECK-LABEL: name: sub_of_vscale66 ; CHECK: liveins: $x0, $x167 ; CHECK-NEXT: {{ $}}68 ; CHECK-NEXT: %x:_(s64) = COPY $x069 ; CHECK-NEXT: [[VSCALE:%[0-9]+]]:_(s64) = G_VSCALE i64 -970 ; CHECK-NEXT: %sub:_(s64) = nsw G_ADD %x, [[VSCALE]]71 ; CHECK-NEXT: $x0 = COPY %sub(s64)72 ; CHECK-NEXT: RET_ReallyLR implicit $x073 %x:_(s64) = COPY $x074 %rhs:_(s64) = G_VSCALE i64 975 %sub:_(s64) = nsw G_SUB %x(s64), %rhs(s64)76 $x0 = COPY %sub(s64)77 RET_ReallyLR implicit $x078...79---80name: shl_of_vscale81body: |82 bb.1:83 liveins: $x0, $x184 ; CHECK-LABEL: name: shl_of_vscale85 ; CHECK: liveins: $x0, $x186 ; CHECK-NEXT: {{ $}}87 ; CHECK-NEXT: %shl:_(s64) = G_VSCALE i64 4488 ; CHECK-NEXT: $x0 = COPY %shl(s64)89 ; CHECK-NEXT: RET_ReallyLR implicit $x090 %rhs:_(s64) = G_CONSTANT i64 291 %lhs:_(s64) = G_VSCALE i64 1192 %shl:_(s64) = nsw G_SHL %lhs(s64), %rhs(s64)93 $x0 = COPY %shl(s64)94 RET_ReallyLR implicit $x095...96---97name: shl_of_vscale_wrong_flag98body: |99 bb.1:100 liveins: $x0, $x1101 ; CHECK-LABEL: name: shl_of_vscale_wrong_flag102 ; CHECK: liveins: $x0, $x1103 ; CHECK-NEXT: {{ $}}104 ; CHECK-NEXT: %rhs:_(s64) = G_CONSTANT i64 2105 ; CHECK-NEXT: %lhs:_(s64) = G_VSCALE i64 11106 ; CHECK-NEXT: %shl:_(s64) = nuw G_SHL %lhs, %rhs(s64)107 ; CHECK-NEXT: $x0 = COPY %shl(s64)108 ; CHECK-NEXT: RET_ReallyLR implicit $x0109 %rhs:_(s64) = G_CONSTANT i64 2110 %lhs:_(s64) = G_VSCALE i64 11111 %shl:_(s64) = nuw G_SHL %lhs(s64), %rhs(s64)112 $x0 = COPY %shl(s64)113 RET_ReallyLR implicit $x0114