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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4# Check that we can fold a G_SEXT_INREG fed by a G_ASHR/G_LSHR into a G_SBFX.5 6...7---8name: sextinreg_ashr_to_sbfx9tracksRegLiveness: true10legalized: true11body: |12 bb.0:13 liveins: $w014 ; CHECK-LABEL: name: sextinreg_ashr_to_sbfx15 ; CHECK: liveins: $w016 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: %x:_(s32) = COPY $w018 ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 519 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1020 ; CHECK-NEXT: %sext_inreg:_(s32) = G_SBFX %x, %lsb(s32), [[C]]21 ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)22 ; CHECK-NEXT: RET_ReallyLR implicit $w023 %x:_(s32) = COPY $w024 %lsb:_(s32) = G_CONSTANT i32 525 %shift:_(s32) = G_ASHR %x, %lsb26 %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1027 $w0 = COPY %sext_inreg28 RET_ReallyLR implicit $w029 30...31---32name: sextinreg_lshr_to_sbfx33tracksRegLiveness: true34legalized: true35body: |36 bb.0:37 liveins: $w038 ; CHECK-LABEL: name: sextinreg_lshr_to_sbfx39 ; CHECK: liveins: $w040 ; CHECK-NEXT: {{ $}}41 ; CHECK-NEXT: %x:_(s32) = COPY $w042 ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 543 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1044 ; CHECK-NEXT: %sext_inreg:_(s32) = G_SBFX %x, %lsb(s32), [[C]]45 ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)46 ; CHECK-NEXT: RET_ReallyLR implicit $w047 %x:_(s32) = COPY $w048 %lsb:_(s32) = G_CONSTANT i32 549 %shift:_(s32) = G_LSHR %x, %lsb50 %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1051 $w0 = COPY %sext_inreg52 RET_ReallyLR implicit $w053 54 55...56---57name: dont_apply_no_constant58tracksRegLiveness: true59legalized: true60body: |61 bb.0:62 liveins: $w063 ; AArch64 needs a constant on the shift for this combine.64 65 ; CHECK-LABEL: name: dont_apply_no_constant66 ; CHECK: liveins: $w067 ; CHECK-NEXT: {{ $}}68 ; CHECK-NEXT: %x:_(s32) = COPY $w069 ; CHECK-NEXT: %y:_(s32) = COPY $w070 ; CHECK-NEXT: %shift:_(s32) = G_LSHR %x, %y(s32)71 ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1072 ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)73 ; CHECK-NEXT: RET_ReallyLR implicit $w074 %x:_(s32) = COPY $w075 %y:_(s32) = COPY $w076 %shift:_(s32) = G_LSHR %x, %y77 %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1078 $w0 = COPY %sext_inreg79 RET_ReallyLR implicit $w080 81...82---83name: dont_apply_shift_imm_too_large84tracksRegLiveness: true85legalized: true86body: |87 bb.0:88 liveins: $w089 90 ; LSB must be in 0-31.91 92 ; CHECK-LABEL: name: dont_apply_shift_imm_too_large93 ; CHECK: liveins: $w094 ; CHECK-NEXT: {{ $}}95 ; CHECK-NEXT: %x:_(s32) = COPY $w096 ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 3297 ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)98 ; CHECK-NEXT: $w0 = COPY %shift(s32)99 ; CHECK-NEXT: RET_ReallyLR implicit $w0100 %x:_(s32) = COPY $w0101 %lsb:_(s32) = G_CONSTANT i32 32102 %shift:_(s32) = G_ASHR %x, %lsb103 %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1104 $w0 = COPY %sext_inreg105 RET_ReallyLR implicit $w0106 107...108---109name: dont_apply_negative_shift_imm110tracksRegLiveness: true111legalized: true112body: |113 bb.0:114 liveins: $w0115 116 ; LSB must be in 0-31.117 118 ; CHECK-LABEL: name: dont_apply_negative_shift_imm119 ; CHECK: liveins: $w0120 ; CHECK-NEXT: {{ $}}121 ; CHECK-NEXT: %x:_(s32) = COPY $w0122 ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 -1123 ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)124 ; CHECK-NEXT: $w0 = COPY %shift(s32)125 ; CHECK-NEXT: RET_ReallyLR implicit $w0126 %x:_(s32) = COPY $w0127 %lsb:_(s32) = G_CONSTANT i32 -1128 %shift:_(s32) = G_ASHR %x, %lsb129 %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1130 $w0 = COPY %sext_inreg131 RET_ReallyLR implicit $w0132 133...134---135name: dont_apply_more_than_one_use136tracksRegLiveness: true137legalized: true138body: |139 bb.0:140 liveins: $w0141 ; CHECK-LABEL: name: dont_apply_more_than_one_use142 ; CHECK: liveins: $w0143 ; CHECK-NEXT: {{ $}}144 ; CHECK-NEXT: %x:_(s32) = COPY $w0145 ; CHECK-NEXT: %lsb:_(s32) = G_CONSTANT i32 1146 ; CHECK-NEXT: %shift:_(s32) = G_ASHR %x, %lsb(s32)147 ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1148 ; CHECK-NEXT: %mul:_(s32) = G_MUL %shift, %sext_inreg149 ; CHECK-NEXT: $w0 = COPY %mul(s32)150 ; CHECK-NEXT: RET_ReallyLR implicit $w0151 %x:_(s32) = COPY $w0152 %lsb:_(s32) = G_CONSTANT i32 1153 %shift:_(s32) = G_ASHR %x, %lsb154 %sext_inreg:_(s32) = G_SEXT_INREG %shift, 1155 %mul:_(s32) = G_MUL %shift, %sext_inreg156 $w0 = COPY %mul157 RET_ReallyLR implicit $w0158