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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -O0 -mtriple=aarch64-linux-gnu -mattr=+sve -global-isel -aarch64-enable-gisel-sve=1 -stop-after=irtranslator %s -o - | FileCheck %s3 4define <vscale x 2 x i64> @call_step_vector_i64() {5 ; CHECK-LABEL: name: call_step_vector_i646 ; CHECK: bb.1.entry:7 ; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_STEP_VECTOR i64 18 ; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 2 x s64>)9 ; CHECK-NEXT: RET_ReallyLR implicit $z010entry:11 %steps = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()12 ret <vscale x 2 x i64> %steps13}14 15define <vscale x 4 x i32> @call_step_vector_i32() {16 ; CHECK-LABEL: name: call_step_vector_i3217 ; CHECK: bb.1.entry:18 ; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_STEP_VECTOR i32 119 ; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 4 x s32>)20 ; CHECK-NEXT: RET_ReallyLR implicit $z021entry:22 %steps = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32()23 ret <vscale x 4 x i32> %steps24}25 26define <vscale x 8 x i16> @call_step_vector_i16() {27 ; CHECK-LABEL: name: call_step_vector_i1628 ; CHECK: bb.1.entry:29 ; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_STEP_VECTOR i16 130 ; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 8 x s16>)31 ; CHECK-NEXT: RET_ReallyLR implicit $z032entry:33 %steps = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()34 ret <vscale x 8 x i16> %steps35}36 37define <vscale x 16 x i8> @call_step_vector_i8() {38 ; CHECK-LABEL: name: call_step_vector_i839 ; CHECK: bb.1.entry:40 ; CHECK-NEXT: [[STEP_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_STEP_VECTOR i8 141 ; CHECK-NEXT: $z0 = COPY [[STEP_VECTOR]](<vscale x 16 x s8>)42 ; CHECK-NEXT: RET_ReallyLR implicit $z043entry:44 %steps = call <vscale x 16 x i8> @llvm.stepvector.nxv16i8()45 ret <vscale x 16 x i8> %steps46}47