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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -mtriple=aarch64-- -mcpu=falkor -O0 -aarch64-enable-atomic-cfg-tidy=0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - | FileCheck %s3 4define void @store_nontemporal(ptr dereferenceable(4) %ptr) {5 ; CHECK-LABEL: name: store_nontemporal6 ; CHECK: bb.1 (%ir-block.0):7 ; CHECK-NEXT: liveins: $x08 ; CHECK-NEXT: {{ $}}9 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x010 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 011 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (non-temporal store (s32) into %ir.ptr)12 ; CHECK-NEXT: RET_ReallyLR13 store i32 0, ptr %ptr, align 4, !nontemporal !014 ret void15}16 17define void @store_dereferenceable(ptr dereferenceable(4) %ptr) {18 ; CHECK-LABEL: name: store_dereferenceable19 ; CHECK: bb.1 (%ir-block.0):20 ; CHECK-NEXT: liveins: $x021 ; CHECK-NEXT: {{ $}}22 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x023 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 024 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32) into %ir.ptr)25 ; CHECK-NEXT: RET_ReallyLR26 store i32 0, ptr %ptr, align 427 ret void28}29 30define void @store_volatile_dereferenceable(ptr dereferenceable(4) %ptr) {31 ; CHECK-LABEL: name: store_volatile_dereferenceable32 ; CHECK: bb.1 (%ir-block.0):33 ; CHECK-NEXT: liveins: $x034 ; CHECK-NEXT: {{ $}}35 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x036 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 037 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (volatile store (s32) into %ir.ptr)38 ; CHECK-NEXT: RET_ReallyLR39 store volatile i32 0, ptr %ptr, align 440 ret void41}42 43define void @store_falkor_strided_access(ptr %ptr) {44 ; CHECK-LABEL: name: store_falkor_strided_access45 ; CHECK: bb.1 (%ir-block.0):46 ; CHECK-NEXT: liveins: $x047 ; CHECK-NEXT: {{ $}}48 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x049 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 050 ; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: ("aarch64-strided-access" store (s32) into %ir.ptr)51 ; CHECK-NEXT: RET_ReallyLR52 store i32 0, ptr %ptr, align 4, !falkor.strided.access !053 ret void54}55 56!0 = !{}57