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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s3---4name: test_icmp5body: |6 bb.0.entry:7 ; CHECK-LABEL: name: test_icmp8 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x09 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x010 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sge), [[COPY]](s64), [[COPY1]]11 ; CHECK-NEXT: $w0 = COPY [[ICMP]](s32)12 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)13 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25514 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]15 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)16 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]]17 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[AND1]]18 ; CHECK-NEXT: $w0 = COPY [[ICMP1]](s32)19 ; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)20 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[INTTOPTR]](p0), [[INTTOPTR]]21 ; CHECK-NEXT: $w0 = COPY [[ICMP2]](s32)22 %0:_(s64) = COPY $x023 %1:_(s64) = COPY $x024 %2:_(s8) = G_TRUNC %0(s64)25 %3:_(s8) = G_TRUNC %1(s64)26 %4:_(s1) = G_ICMP intpred(sge), %0(s64), %127 %11:_(s32) = G_ANYEXT %4(s1)28 $w0 = COPY %11(s32)29 %8:_(s1) = G_ICMP intpred(ult), %2(s8), %330 %12:_(s32) = G_ANYEXT %8(s1)31 $w0 = COPY %12(s32)32 %9:_(p0) = G_INTTOPTR %0(s64)33 %10:_(s1) = G_ICMP intpred(eq), %9(p0), %934 %14:_(s32) = G_ANYEXT %10(s1)35 $w0 = COPY %14(s32)36 37...38---39name: test_s12840alignment: 441tracksRegLiveness: true42body: |43 ; CHECK-LABEL: name: test_s12844 ; CHECK: bb.0:45 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)46 ; CHECK-NEXT: {{ $}}47 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF48 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 049 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 429496729650 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[DEF]](s64), [[C]]51 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[DEF]](s64), [[C1]]52 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[DEF]](s64), [[C1]]53 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[ICMP]], [[ICMP1]]54 ; CHECK-NEXT: G_BRCOND [[SELECT]](s32), %bb.155 ; CHECK-NEXT: G_BR %bb.256 ; CHECK-NEXT: {{ $}}57 ; CHECK-NEXT: bb.1:58 ; CHECK-NEXT: successors:59 ; CHECK-NEXT: {{ $}}60 ; CHECK-NEXT: bb.2:61 ; CHECK-NEXT: RET_ReallyLR62 bb.1:63 %0:_(s128) = G_IMPLICIT_DEF64 %1:_(s128) = G_CONSTANT i128 7922816251426433759354395033665 %3:_(s1) = G_CONSTANT i1 true66 %2:_(s1) = G_ICMP intpred(ult), %0(s128), %167 G_BRCOND %2(s1), %bb.268 G_BR %bb.369 70 bb.2:71 successors:72 73 74 bb.3:75 RET_ReallyLR76 77...78---79name: test_s128_eq80tracksRegLiveness: true81body: |82 ; CHECK-LABEL: name: test_s128_eq83 ; CHECK: bb.0:84 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)85 ; CHECK-NEXT: {{ $}}86 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF87 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 088 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]89 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]90 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]91 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C]]92 ; CHECK-NEXT: G_BRCOND [[ICMP]](s32), %bb.193 ; CHECK-NEXT: G_BR %bb.294 ; CHECK-NEXT: {{ $}}95 ; CHECK-NEXT: bb.1:96 ; CHECK-NEXT: successors:97 ; CHECK-NEXT: {{ $}}98 ; CHECK-NEXT: bb.2:99 ; CHECK-NEXT: RET_ReallyLR100 bb.1:101 %lhs:_(s128) = G_IMPLICIT_DEF102 %rhs:_(s128) = G_IMPLICIT_DEF103 %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s128), %rhs104 G_BRCOND %cmp(s1), %bb.2105 G_BR %bb.3106 bb.2:107 successors:108 bb.3:109 RET_ReallyLR110 111...112---113name: test_s88_eq114tracksRegLiveness: true115body: |116 ; CHECK-LABEL: name: test_s88_eq117 ; CHECK: bb.0:118 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)119 ; CHECK-NEXT: {{ $}}120 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF121 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1122 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16777215123 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]124 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]125 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]126 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]127 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0128 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]129 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]130 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]131 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C2]]132 ; CHECK-NEXT: G_BRCOND [[ICMP]](s32), %bb.1133 ; CHECK-NEXT: G_BR %bb.2134 ; CHECK-NEXT: {{ $}}135 ; CHECK-NEXT: bb.1:136 ; CHECK-NEXT: successors:137 ; CHECK-NEXT: {{ $}}138 ; CHECK-NEXT: bb.2:139 ; CHECK-NEXT: RET_ReallyLR140 bb.1:141 %lhs:_(s88) = G_IMPLICIT_DEF142 %rhs:_(s88) = G_IMPLICIT_DEF143 %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s88), %rhs144 G_BRCOND %cmp(s1), %bb.2145 G_BR %bb.3146 bb.2:147 successors:148 bb.3:149 RET_ReallyLR150 151...152---153name: test_s88_ne154tracksRegLiveness: true155body: |156 ; CHECK-LABEL: name: test_s88_ne157 ; CHECK: bb.0:158 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)159 ; CHECK-NEXT: {{ $}}160 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF161 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1162 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16777215163 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]164 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]165 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]166 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]167 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0168 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]169 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]170 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]171 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s64), [[C2]]172 ; CHECK-NEXT: G_BRCOND [[ICMP]](s32), %bb.1173 ; CHECK-NEXT: G_BR %bb.2174 ; CHECK-NEXT: {{ $}}175 ; CHECK-NEXT: bb.1:176 ; CHECK-NEXT: successors:177 ; CHECK-NEXT: {{ $}}178 ; CHECK-NEXT: bb.2:179 ; CHECK-NEXT: RET_ReallyLR180 bb.1:181 %lhs:_(s88) = G_IMPLICIT_DEF182 %rhs:_(s88) = G_IMPLICIT_DEF183 %cmp:_(s1) = G_ICMP intpred(ne), %lhs(s88), %rhs184 G_BRCOND %cmp(s1), %bb.2185 G_BR %bb.3186 bb.2:187 successors:188 bb.3:189 RET_ReallyLR190 191...192---193name: test_s96_eq194tracksRegLiveness: true195body: |196 ; CHECK-LABEL: name: test_s96_eq197 ; CHECK: bb.0:198 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)199 ; CHECK-NEXT: {{ $}}200 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF201 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1202 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295203 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]204 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]205 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]206 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]207 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0208 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND2]]209 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND3]]210 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]211 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s64), [[C2]]212 ; CHECK-NEXT: G_BRCOND [[ICMP]](s32), %bb.1213 ; CHECK-NEXT: G_BR %bb.2214 ; CHECK-NEXT: {{ $}}215 ; CHECK-NEXT: bb.1:216 ; CHECK-NEXT: successors:217 ; CHECK-NEXT: {{ $}}218 ; CHECK-NEXT: bb.2:219 ; CHECK-NEXT: RET_ReallyLR220 bb.1:221 %lhs:_(s96) = G_IMPLICIT_DEF222 %rhs:_(s96) = G_IMPLICIT_DEF223 %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s96), %rhs224 G_BRCOND %cmp(s1), %bb.2225 G_BR %bb.3226 bb.2:227 successors:228 bb.3:229 RET_ReallyLR230...231---232name: test_s318_eq233tracksRegLiveness: true234body: |235 ; CHECK-LABEL: name: test_s318_eq236 ; CHECK: bb.0:237 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)238 ; CHECK-NEXT: {{ $}}239 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF240 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1241 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903242 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0243 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]244 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]245 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]246 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]247 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]248 ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]249 ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]250 ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]251 ; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]252 ; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]253 ; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]254 ; CHECK-NEXT: [[AND11:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]255 ; CHECK-NEXT: [[AND12:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]256 ; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]257 ; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]258 ; CHECK-NEXT: [[AND15:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]259 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND8]]260 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND9]]261 ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND10]]262 ; CHECK-NEXT: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND11]]263 ; CHECK-NEXT: [[XOR4:%[0-9]+]]:_(s64) = G_XOR [[AND4]], [[AND12]]264 ; CHECK-NEXT: [[XOR5:%[0-9]+]]:_(s64) = G_XOR [[AND5]], [[AND13]]265 ; CHECK-NEXT: [[XOR6:%[0-9]+]]:_(s64) = G_XOR [[AND6]], [[AND14]]266 ; CHECK-NEXT: [[XOR7:%[0-9]+]]:_(s64) = G_XOR [[AND7]], [[AND15]]267 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]268 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]269 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]270 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s64) = G_OR [[OR2]], [[XOR4]]271 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s64) = G_OR [[OR3]], [[XOR5]]272 ; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s64) = G_OR [[OR4]], [[XOR6]]273 ; CHECK-NEXT: [[OR6:%[0-9]+]]:_(s64) = G_OR [[OR5]], [[XOR7]]274 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR6]](s64), [[C2]]275 ; CHECK-NEXT: G_BRCOND [[ICMP]](s32), %bb.1276 ; CHECK-NEXT: G_BR %bb.2277 ; CHECK-NEXT: {{ $}}278 ; CHECK-NEXT: bb.1:279 ; CHECK-NEXT: successors:280 ; CHECK-NEXT: {{ $}}281 ; CHECK-NEXT: bb.2:282 ; CHECK-NEXT: RET_ReallyLR283 bb.1:284 %lhs:_(s318) = G_IMPLICIT_DEF285 %rhs:_(s318) = G_IMPLICIT_DEF286 %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s318), %rhs287 G_BRCOND %cmp(s1), %bb.2288 G_BR %bb.3289 bb.2:290 successors:291 bb.3:292 RET_ReallyLR293...294---295name: test_s158_eq296tracksRegLiveness: true297body: |298 ; CHECK-LABEL: name: test_s158_eq299 ; CHECK: bb.0:300 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)301 ; CHECK-NEXT: {{ $}}302 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF303 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1304 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823305 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0306 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]307 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]308 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]309 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]310 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]311 ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]312 ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]313 ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]314 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND4]]315 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND5]]316 ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND6]]317 ; CHECK-NEXT: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND7]]318 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]319 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]320 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]321 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR2]](s64), [[C2]]322 ; CHECK-NEXT: G_BRCOND [[ICMP]](s32), %bb.1323 ; CHECK-NEXT: G_BR %bb.2324 ; CHECK-NEXT: {{ $}}325 ; CHECK-NEXT: bb.1:326 ; CHECK-NEXT: successors:327 ; CHECK-NEXT: {{ $}}328 ; CHECK-NEXT: bb.2:329 ; CHECK-NEXT: RET_ReallyLR330 bb.1:331 %lhs:_(s158) = G_IMPLICIT_DEF332 %rhs:_(s158) = G_IMPLICIT_DEF333 %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s158), %rhs334 G_BRCOND %cmp(s1), %bb.2335 G_BR %bb.3336 bb.2:337 successors:338 bb.3:339 RET_ReallyLR340...341---342name: test_3xs32_eq_pr_78181343tracksRegLiveness: true344body: |345 bb.1:346 liveins: $x0347 ; CHECK-LABEL: name: test_3xs32_eq_pr_78181348 ; CHECK: liveins: $x0349 ; CHECK-NEXT: {{ $}}350 ; CHECK-NEXT: %const:_(s32) = G_IMPLICIT_DEF351 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)352 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)353 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<4 x s32>), [[BUILD_VECTOR1]]354 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1355 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[ICMP]](<4 x s32>), [[C]](s64)356 ; CHECK-NEXT: $w0 = COPY [[EVEC]](s32)357 ; CHECK-NEXT: RET_ReallyLR358 %const:_(s32) = G_IMPLICIT_DEF359 %rhs:_(<3 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32)360 %lhs:_(<3 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32)361 %cmp:_(<3 x s32>) = G_ICMP intpred(eq), %lhs(<3 x s32>), %rhs362 %1:_(s64) = G_CONSTANT i64 1363 %2:_(s32) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s32>), %1(s64)364 $w0 = COPY %2(s32)365 RET_ReallyLR366...367---368name: test_3xs16_eq_pr_78181369tracksRegLiveness: true370body: |371 bb.1:372 liveins: $x0373 ; CHECK-LABEL: name: test_3xs16_eq_pr_78181374 ; CHECK: liveins: $x0375 ; CHECK-NEXT: {{ $}}376 ; CHECK-NEXT: %const:_(s16) = G_IMPLICIT_DEF377 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16)378 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16)379 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<4 x s16>), [[BUILD_VECTOR1]]380 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[ICMP]](<4 x s16>)381 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1382 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)383 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)384 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)385 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF386 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[DEF]](s32)387 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR2]](<4 x s32>), [[C]](s64)388 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535389 ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C1]]390 ; CHECK-NEXT: $w0 = COPY %zext(s32)391 ; CHECK-NEXT: RET_ReallyLR392 %const:_(s16) = G_IMPLICIT_DEF393 %rhs:_(<3 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16)394 %lhs:_(<3 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16)395 %cmp:_(<3 x s16>) = G_ICMP intpred(eq), %lhs(<3 x s16>), %rhs396 %1:_(s64) = G_CONSTANT i64 1397 %2:_(s16) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s16>), %1(s64)398 %zext:_(s32) = G_ZEXT %2(s16)399 $w0 = COPY %zext(s32)400 RET_ReallyLR401...402---403name: test_3xs8_eq_pr_78181404tracksRegLiveness: true405body: |406 bb.1:407 liveins: $x0408 ; CHECK-LABEL: name: test_3xs8_eq_pr_78181409 ; CHECK: liveins: $x0410 ; CHECK-NEXT: {{ $}}411 ; CHECK-NEXT: %const:_(s8) = G_IMPLICIT_DEF412 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)413 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)414 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<8 x s8>), [[BUILD_VECTOR1]]415 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s8), [[UV1:%[0-9]+]]:_(s8), [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8), [[UV6:%[0-9]+]]:_(s8), [[UV7:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[ICMP]](<8 x s8>)416 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1417 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s8)418 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s8)419 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s8)420 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF421 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[ANYEXT]](s32), [[ANYEXT1]](s32), [[ANYEXT2]](s32), [[DEF]](s32)422 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR2]](<4 x s32>), [[C]](s64)423 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255424 ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C1]]425 ; CHECK-NEXT: $w0 = COPY %zext(s32)426 ; CHECK-NEXT: RET_ReallyLR427 %const:_(s8) = G_IMPLICIT_DEF428 %rhs:_(<3 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8)429 %lhs:_(<3 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8)430 %cmp:_(<3 x s8>) = G_ICMP intpred(eq), %lhs(<3 x s8>), %rhs431 %1:_(s64) = G_CONSTANT i64 1432 %2:_(s8) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s8>), %1(s64)433 %zext:_(s32) = G_ZEXT %2(s8)434 $w0 = COPY %zext(s32)435 RET_ReallyLR436...437---438name: test_3xs64_eq_clamp439tracksRegLiveness: true440body: |441 bb.1:442 liveins: $x0443 ; CHECK-LABEL: name: test_3xs64_eq_clamp444 ; CHECK: liveins: $x0445 ; CHECK-NEXT: {{ $}}446 ; CHECK-NEXT: %const:_(s64) = G_IMPLICIT_DEF447 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64)448 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64)449 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<2 x s64>), [[BUILD_VECTOR1]]450 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1451 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[ICMP]](<2 x s64>), [[C]](s64)452 ; CHECK-NEXT: $x0 = COPY [[EVEC]](s64)453 ; CHECK-NEXT: RET_ReallyLR454 %const:_(s64) = G_IMPLICIT_DEF455 %rhs:_(<3 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64), %const(s64)456 %lhs:_(<3 x s64>) = G_BUILD_VECTOR %const(s64), %const(s64), %const(s64)457 %cmp:_(<3 x s64>) = G_ICMP intpred(eq), %lhs(<3 x s64>), %rhs458 %1:_(s64) = G_CONSTANT i64 1459 %2:_(s64) = G_EXTRACT_VECTOR_ELT %cmp(<3 x s64>), %1(s64)460 $x0 = COPY %2(s64)461 RET_ReallyLR462...463---464name: test_5xs32_eq_clamp465tracksRegLiveness: true466body: |467 bb.1:468 liveins: $x0469 ; CHECK-LABEL: name: test_5xs32_eq_clamp470 ; CHECK: liveins: $x0471 ; CHECK-NEXT: {{ $}}472 ; CHECK-NEXT: %const:_(s32) = G_IMPLICIT_DEF473 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)474 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32)475 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<4 x s32>), [[BUILD_VECTOR1]]476 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1477 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[ICMP]](<4 x s32>), [[C]](s64)478 ; CHECK-NEXT: $w0 = COPY [[EVEC]](s32)479 ; CHECK-NEXT: RET_ReallyLR480 %const:_(s32) = G_IMPLICIT_DEF481 %rhs:_(<5 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32), %const(s32)482 %lhs:_(<5 x s32>) = G_BUILD_VECTOR %const(s32), %const(s32), %const(s32), %const(s32), %const(s32)483 %cmp:_(<5 x s32>) = G_ICMP intpred(eq), %lhs(<5 x s32>), %rhs484 %1:_(s64) = G_CONSTANT i64 1485 %2:_(s32) = G_EXTRACT_VECTOR_ELT %cmp(<5 x s32>), %1(s64)486 $w0 = COPY %2(s32)487 RET_ReallyLR488...489---490name: test_7xs16_eq_clamp491tracksRegLiveness: true492body: |493 bb.1:494 liveins: $x0495 ; CHECK-LABEL: name: test_7xs16_eq_clamp496 ; CHECK: liveins: $x0497 ; CHECK-NEXT: {{ $}}498 ; CHECK-NEXT: %const:_(s16) = G_IMPLICIT_DEF499 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)500 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)501 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s16>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<8 x s16>), [[BUILD_VECTOR1]]502 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1503 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[ICMP]](<8 x s16>), [[C]](s64)504 ; CHECK-NEXT: %zext:_(s32) = G_ZEXT [[EVEC]](s16)505 ; CHECK-NEXT: $w0 = COPY %zext(s32)506 ; CHECK-NEXT: RET_ReallyLR507 %const:_(s16) = G_IMPLICIT_DEF508 %rhs:_(<7 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)509 %lhs:_(<7 x s16>) = G_BUILD_VECTOR %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16), %const(s16)510 %cmp:_(<7 x s16>) = G_ICMP intpred(eq), %lhs(<7 x s16>), %rhs511 %1:_(s64) = G_CONSTANT i64 1512 %2:_(s16) = G_EXTRACT_VECTOR_ELT %cmp(<7 x s16>), %1(s64)513 %zext:_(s32) = G_ZEXT %2(s16)514 $w0 = COPY %zext(s32)515 RET_ReallyLR516...517---518name: test_9xs8_eq_clamp519tracksRegLiveness: true520body: |521 bb.1:522 liveins: $x0523 ; CHECK-LABEL: name: test_9xs8_eq_clamp524 ; CHECK: liveins: $x0525 ; CHECK-NEXT: {{ $}}526 ; CHECK-NEXT: %const:_(s8) = G_IMPLICIT_DEF527 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)528 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)529 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[BUILD_VECTOR]](<16 x s8>), [[BUILD_VECTOR1]]530 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1531 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s8) = G_EXTRACT_VECTOR_ELT [[ICMP]](<16 x s8>), [[C]](s64)532 ; CHECK-NEXT: %zext:_(s32) = G_ZEXT [[EVEC]](s8)533 ; CHECK-NEXT: $w0 = COPY %zext(s32)534 ; CHECK-NEXT: RET_ReallyLR535 %const:_(s8) = G_IMPLICIT_DEF536 %rhs:_(<9 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)537 %lhs:_(<9 x s8>) = G_BUILD_VECTOR %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8), %const(s8)538 %cmp:_(<9 x s8>) = G_ICMP intpred(eq), %lhs(<9 x s8>), %rhs539 %1:_(s64) = G_CONSTANT i64 1540 %2:_(s8) = G_EXTRACT_VECTOR_ELT %cmp(<9 x s8>), %1(s64)541 %zext:_(s32) = G_ZEXT %2(s8)542 $w0 = COPY %zext(s32)543 RET_ReallyLR544...545---546name: test_4xs64_ne547tracksRegLiveness: true548body: |549 bb.1:550 liveins:551 ; CHECK-LABEL: name: test_4xs64_ne552 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF553 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x s64>), [[DEF]]554 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1555 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)556 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR]]557 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x s64>), [[DEF]]558 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)559 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP1]], [[BUILD_VECTOR1]]560 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1561 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR]](<2 x s64>)562 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR1]](<2 x s64>)563 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)564 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<4 x s32>), [[C1]](s64)565 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1566 ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C2]]567 ; CHECK-NEXT: $w0 = COPY %zext(s32)568 ; CHECK-NEXT: RET_ReallyLR569 %vec:_(<4 x s64>) = G_IMPLICIT_DEF570 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %vec(<4 x s64>), %vec571 %1:_(s64) = G_CONSTANT i64 1572 %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<4 x s1>), %1573 %zext:_(s32) = G_ZEXT %elt(s1)574 $w0 = COPY %zext(s32)575 RET_ReallyLR576...577---578name: test_4xp0_ne579tracksRegLiveness: true580body: |581 bb.1:582 liveins:583 ; CHECK-LABEL: name: test_4xp0_ne584 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x p0>) = G_IMPLICIT_DEF585 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x p0>), [[DEF]]586 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1587 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)588 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR]]589 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x p0>), [[DEF]]590 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)591 ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP1]], [[BUILD_VECTOR1]]592 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1593 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR]](<2 x s64>)594 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR1]](<2 x s64>)595 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)596 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<4 x s32>), [[C1]](s64)597 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1598 ; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C2]]599 ; CHECK-NEXT: $w0 = COPY %zext(s32)600 ; CHECK-NEXT: RET_ReallyLR601 %vec:_(<4 x p0>) = G_IMPLICIT_DEF602 %cmp:_(<4 x s1>) = G_ICMP intpred(ne), %vec(<4 x p0>), %vec603 %1:_(s64) = G_CONSTANT i64 1604 %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<4 x s1>), %1605 %zext:_(s32) = G_ZEXT %elt(s1)606 $w0 = COPY %zext(s32)607 RET_ReallyLR608...609