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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 -O0 %s -o - | FileCheck %s3---4name: test_freeze_s645body: |6 bb.0.entry:7 liveins: $x08 9 ; CHECK-LABEL: name: test_freeze_s6410 ; CHECK: liveins: $x011 ; CHECK-NEXT: {{ $}}12 ; CHECK-NEXT: %x0:_(s64) = COPY $x013 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE %x014 ; CHECK-NEXT: $x0 = COPY [[FREEZE]](s64)15 %x0:_(s64) = COPY $x016 %1:_(s64) = G_FREEZE %x017 $x0 = COPY %1(s64)18...19---20name: test_freeze_v4s3221body: |22 bb.0:23 liveins: $q024 25 ; CHECK-LABEL: name: test_freeze_v4s3226 ; CHECK: liveins: $q027 ; CHECK-NEXT: {{ $}}28 ; CHECK-NEXT: %q0:_(<4 x s32>) = COPY $q029 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<4 x s32>) = G_FREEZE %q030 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[FREEZE]](<4 x s32>)31 ; CHECK-NEXT: $x0 = COPY [[UV]](<2 x s32>)32 ; CHECK-NEXT: $x1 = COPY [[UV1]](<2 x s32>)33 %q0:_(<4 x s32>) = COPY $q034 %0:_(<4 x s32>) = G_FREEZE %q035 %1:_(<2 x s32> ), %2:_(<2 x s32>) = G_UNMERGE_VALUES %036 $x0 = COPY %137 $x1 = COPY %238...39---40name: test_freeze_v4s6441body: |42 bb.0:43 44 ; CHECK-LABEL: name: test_freeze_v4s6445 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF46 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<2 x s64>) = G_FREEZE [[DEF]]47 ; CHECK-NEXT: [[FREEZE1:%[0-9]+]]:_(<2 x s64>) = G_FREEZE [[DEF]]48 ; CHECK-NEXT: $q0 = COPY [[FREEZE]](<2 x s64>)49 ; CHECK-NEXT: $q1 = COPY [[FREEZE1]](<2 x s64>)50 %undef:_(<4 x s64>) = G_IMPLICIT_DEF51 %0:_(<4 x s64>) = G_FREEZE %undef52 %1:_(<2 x s64> ), %2:_(<2 x s64>) = G_UNMERGE_VALUES %053 $q0 = COPY %154 $q1 = COPY %255...56---57name: test_freeze_v2s3258body: |59 bb.0:60 liveins: $d061 62 ; CHECK-LABEL: name: test_freeze_v2s3263 ; CHECK: liveins: $d064 ; CHECK-NEXT: {{ $}}65 ; CHECK-NEXT: %d0:_(<2 x s32>) = COPY $d066 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<2 x s32>) = G_FREEZE %d067 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[FREEZE]](<2 x s32>)68 ; CHECK-NEXT: $w0 = COPY [[UV]](s32)69 ; CHECK-NEXT: $w1 = COPY [[UV1]](s32)70 %d0:_(<2 x s32>) = COPY $d071 %0:_(<2 x s32>) = G_FREEZE %d072 %1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %073 $w0 = COPY %174 $w1 = COPY %275...76---77name: test_freeze_v8s878body: |79 bb.0:80 liveins: $d081 82 ; CHECK-LABEL: name: test_freeze_v8s883 ; CHECK: liveins: $d084 ; CHECK-NEXT: {{ $}}85 ; CHECK-NEXT: %d0:_(<8 x s8>) = COPY $d086 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<8 x s8>) = G_FREEZE %d087 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x s8>), [[UV1:%[0-9]+]]:_(<4 x s8>) = G_UNMERGE_VALUES [[FREEZE]](<8 x s8>)88 ; CHECK-NEXT: $w0 = COPY [[UV]](<4 x s8>)89 ; CHECK-NEXT: $w1 = COPY [[UV1]](<4 x s8>)90 %d0:_(<8 x s8>) = COPY $d091 %0:_(<8 x s8>) = G_FREEZE %d092 %1:_(<4 x s8>), %2:_(<4 x s8>) = G_UNMERGE_VALUES %093 $w0 = COPY %194 $w1 = COPY %295...96---97name: test_freeze_s198body: |99 bb.0.entry:100 liveins: $x0101 ; CHECK-LABEL: name: test_freeze_s1102 ; CHECK: liveins: $x0103 ; CHECK-NEXT: {{ $}}104 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF105 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s8) = G_FREEZE [[DEF]]106 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[FREEZE]](s8)107 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1108 ; CHECK-NEXT: %ext:_(s64) = G_AND [[ANYEXT]], [[C]]109 ; CHECK-NEXT: $x0 = COPY %ext(s64)110 %x:_(s1) = G_IMPLICIT_DEF111 %freeze:_(s1) = G_FREEZE %x112 %ext:_(s64) = G_ZEXT %freeze113 $x0 = COPY %ext(s64)114...115---116name: test_freeze_s2117body: |118 bb.0.entry:119 liveins: $x0120 ; CHECK-LABEL: name: test_freeze_s2121 ; CHECK: liveins: $x0122 ; CHECK-NEXT: {{ $}}123 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF124 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s8) = G_FREEZE [[DEF]]125 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[FREEZE]](s8)126 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3127 ; CHECK-NEXT: %ext:_(s64) = G_AND [[ANYEXT]], [[C]]128 ; CHECK-NEXT: $x0 = COPY %ext(s64)129 %x:_(s2) = G_IMPLICIT_DEF130 %freeze:_(s2) = G_FREEZE %x131 %ext:_(s64) = G_ZEXT %freeze132 $x0 = COPY %ext(s64)133...134---135name: test_freeze_v4s1136body: |137 bb.0.entry:138 liveins: $q0139 ; CHECK-LABEL: name: test_freeze_v4s1140 ; CHECK: liveins: $q0141 ; CHECK-NEXT: {{ $}}142 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF143 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<4 x s16>) = G_FREEZE [[DEF]]144 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[FREEZE]](<4 x s16>)145 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1146 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)147 ; CHECK-NEXT: %ext:_(<4 x s32>) = G_AND [[ANYEXT]], [[BUILD_VECTOR]]148 ; CHECK-NEXT: $q0 = COPY %ext(<4 x s32>)149 %x:_(<4 x s1>) = G_IMPLICIT_DEF150 %freeze:_(<4 x s1>) = G_FREEZE %x151 %ext:_(<4 x s32>) = G_ZEXT %freeze152 $q0 = COPY %ext(<4 x s32>)153...154---155name: test_freeze_v3s8156body: |157 bb.0.entry:158 liveins: $q0159 ; CHECK-LABEL: name: test_freeze_v3s8160 ; CHECK: liveins: $q0161 ; CHECK-NEXT: {{ $}}162 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF163 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s16>) = G_BUILD_VECTOR [[DEF]](s16), [[DEF]](s16), [[DEF]](s16), [[DEF]](s16), [[DEF]](s16), [[DEF]](s16), [[DEF]](s16), [[DEF]](s16)164 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s8>) = G_TRUNC [[BUILD_VECTOR]](<8 x s16>)165 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<4 x s8>), [[UV1:%[0-9]+]]:_(<4 x s8>) = G_UNMERGE_VALUES [[TRUNC]](<8 x s8>)166 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<4 x s8>) = G_FREEZE [[UV]]167 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s8), [[UV3:%[0-9]+]]:_(s8), [[UV4:%[0-9]+]]:_(s8), [[UV5:%[0-9]+]]:_(s8) = G_UNMERGE_VALUES [[FREEZE]](<4 x s8>)168 ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF169 ; CHECK-NEXT: %ext0:_(s32) = G_ZEXT [[UV2]](s8)170 ; CHECK-NEXT: %ext1:_(s32) = G_ZEXT [[UV3]](s8)171 ; CHECK-NEXT: %ext2:_(s32) = G_ZEXT [[UV4]](s8)172 ; CHECK-NEXT: %res:_(<4 x s32>) = G_BUILD_VECTOR %ext0(s32), %ext1(s32), %ext2(s32), %undef(s32)173 ; CHECK-NEXT: $q0 = COPY %res(<4 x s32>)174 %x:_(<3 x s8>) = G_IMPLICIT_DEF175 %freeze:_(<3 x s8>) = G_FREEZE %x176 %ext:_(<3 x s32>) = G_ZEXT %freeze177 %undef:_(s32) = G_IMPLICIT_DEF178 %ext0:_(s32), %ext1:_(s32), %ext2:_(s32) = G_UNMERGE_VALUES %ext179 %res:_(<4 x s32>) = G_BUILD_VECTOR %ext0, %ext1, %ext2, %undef180 $q0 = COPY %res(<4 x s32>)181...182---183name: test_freeze_v4s1_select184body: |185 bb.0.entry:186 liveins: $q0, $q1187 ; CHECK-LABEL: name: test_freeze_v4s1_select188 ; CHECK: liveins: $q0, $q1189 ; CHECK-NEXT: {{ $}}190 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0191 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1192 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0193 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)194 ; CHECK-NEXT: [[FCMP:%[0-9]+]]:_(<4 x s32>) = nnan ninf nsz arcp contract afn reassoc G_FCMP floatpred(olt), [[COPY]](<4 x s32>), [[BUILD_VECTOR]]195 ; CHECK-NEXT: [[FCMP1:%[0-9]+]]:_(<4 x s32>) = nnan ninf nsz arcp contract afn reassoc G_FCMP floatpred(ogt), [[COPY1]](<4 x s32>), [[COPY]]196 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[FCMP1]](<4 x s32>)197 ; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<4 x s16>) = G_FREEZE [[TRUNC]]198 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[FCMP]](<4 x s32>)199 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[TRUNC1]], [[FREEZE]]200 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[AND]](<4 x s16>)201 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1202 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)203 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<4 x s32>) = G_AND [[ANYEXT]], [[BUILD_VECTOR1]]204 ; CHECK-NEXT: $q0 = COPY [[AND1]](<4 x s32>)205 %1:_(<4 x s32>) = COPY $q0206 %2:_(<4 x s32>) = COPY $q1207 %3:_(s32) = G_CONSTANT i32 0208 %4:_(<4 x s32>) = G_BUILD_VECTOR %3, %3, %3, %3209 %5:_(s1) = G_CONSTANT i1 false210 %6:_(<4 x s1>) = nnan ninf nsz arcp contract afn reassoc G_FCMP floatpred(olt), %1:_(<4 x s32>), %4:_211 %7:_(<4 x s1>) = nnan ninf nsz arcp contract afn reassoc G_FCMP floatpred(ogt), %2:_(<4 x s32>), %1:_212 %8:_(<4 x s1>) = G_FREEZE %7213 %9:_(<4 x s1>) = G_AND %6, %8214 %10:_(<4 x s32>) = G_ZEXT %9215 $q0 = COPY %10216