556 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 22# RUN: llc -O0 -mtriple=arm64-unknown-unknown -global-isel -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s3 4---5name: fshr_i86alignment: 47tracksRegLiveness: true8body: |9 bb.0:10 liveins: $w0, $w1, $w211 12 ; CHECK-LABEL: name: fshr_i813 ; CHECK: liveins: $w0, $w1, $w214 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w016 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w117 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w218 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 719 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]20 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -121 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[C1]]22 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)23 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[COPY3]]24 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 125 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C2]](s64)26 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[SHL]], [[AND1]](s32)27 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 25528 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]]29 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[AND]](s32)30 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL1]], [[LSHR]]31 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)32 ; CHECK-NEXT: RET_ReallyLR implicit $w033 %3:_(s32) = COPY $w034 %0:_(s8) = G_TRUNC %3(s32)35 %4:_(s32) = COPY $w136 %1:_(s8) = G_TRUNC %4(s32)37 %5:_(s32) = COPY $w238 %2:_(s8) = G_TRUNC %5(s32)39 %6:_(s8) = G_FSHR %0, %1, %2(s8)40 %7:_(s32) = G_ANYEXT %6(s8)41 $w0 = COPY %7(s32)42 RET_ReallyLR implicit $w043 44...45 46---47name: fshr_i1648alignment: 449tracksRegLiveness: true50body: |51 bb.0:52 liveins: $w0, $w1, $w253 54 ; CHECK-LABEL: name: fshr_i1655 ; CHECK: liveins: $w0, $w1, $w256 ; CHECK-NEXT: {{ $}}57 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w058 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w159 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w260 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1561 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]62 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -163 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[C1]]64 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)65 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[COPY3]]66 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 167 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C2]](s64)68 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[SHL]], [[AND1]](s32)69 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 6553570 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]]71 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[AND]](s32)72 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL1]], [[LSHR]]73 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)74 ; CHECK-NEXT: RET_ReallyLR implicit $w075 %3:_(s32) = COPY $w076 %0:_(s16) = G_TRUNC %3(s32)77 %4:_(s32) = COPY $w178 %1:_(s16) = G_TRUNC %4(s32)79 %5:_(s32) = COPY $w280 %2:_(s16) = G_TRUNC %5(s32)81 %6:_(s16) = G_FSHR %0, %1, %2(s16)82 %7:_(s32) = G_ANYEXT %6(s16)83 $w0 = COPY %7(s32)84 RET_ReallyLR implicit $w085 86...87 88---89name: fshr_i3290alignment: 491tracksRegLiveness: true92body: |93 bb.0:94 liveins: $w0, $w1, $w295 96 ; CHECK-LABEL: name: fshr_i3297 ; CHECK: liveins: $w0, $w1, $w298 ; CHECK-NEXT: {{ $}}99 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0100 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1101 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2102 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31103 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]104 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1105 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[C1]]106 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[C]]107 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1108 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C2]](s64)109 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[SHL]], [[AND1]](s32)110 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[AND]](s32)111 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL1]], [[LSHR]]112 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)113 ; CHECK-NEXT: RET_ReallyLR implicit $w0114 %0:_(s32) = COPY $w0115 %1:_(s32) = COPY $w1116 %2:_(s32) = COPY $w2117 %3:_(s32) = G_FSHR %0, %1, %2(s32)118 $w0 = COPY %3(s32)119 RET_ReallyLR implicit $w0120 121...122 123---124name: fshr_i64125alignment: 4126tracksRegLiveness: true127body: |128 bb.0:129 liveins: $x0, $x1, $x2130 131 ; CHECK-LABEL: name: fshr_i64132 ; CHECK: liveins: $x0, $x1, $x2133 ; CHECK-NEXT: {{ $}}134 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0135 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1136 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2137 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63138 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C]]139 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1140 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY2]], [[C1]]141 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C]]142 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1143 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C2]](s64)144 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[SHL]], [[AND1]](s64)145 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[AND]](s64)146 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = disjoint G_OR [[SHL1]], [[LSHR]]147 ; CHECK-NEXT: $x0 = COPY [[OR]](s64)148 ; CHECK-NEXT: RET_ReallyLR implicit $x0149 %0:_(s64) = COPY $x0150 %1:_(s64) = COPY $x1151 %2:_(s64) = COPY $x2152 %3:_(s64) = G_FSHR %0, %1, %2(s64)153 $x0 = COPY %3(s64)154 RET_ReallyLR implicit $x0155 156...157 158 159---160name: fshr_i8_const_shift161alignment: 4162tracksRegLiveness: true163body: |164 bb.0:165 liveins: $w0, $w1166 167 ; CHECK-LABEL: name: fshr_i8_const_shift168 ; CHECK: liveins: $w0, $w1169 ; CHECK-NEXT: {{ $}}170 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0171 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1172 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1173 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s64)174 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255175 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]176 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 7177 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s64)178 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL]], [[LSHR]]179 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)180 ; CHECK-NEXT: RET_ReallyLR implicit $w0181 %2:_(s32) = COPY $w0182 %0:_(s8) = G_TRUNC %2(s32)183 %3:_(s32) = COPY $w1184 %1:_(s8) = G_TRUNC %3(s32)185 %7:_(s8) = G_CONSTANT i8 7186 %5:_(s8) = G_FSHR %0, %1, %7(s8)187 %6:_(s32) = G_ANYEXT %5(s8)188 $w0 = COPY %6(s32)189 RET_ReallyLR implicit $w0190 191...192 193---194name: fshr_i8_const_overshift195alignment: 4196tracksRegLiveness: true197body: |198 bb.0:199 liveins: $w0, $w1200 201 ; CHECK-LABEL: name: fshr_i8_const_overshift202 ; CHECK: liveins: $w0, $w1203 ; CHECK-NEXT: {{ $}}204 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0205 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1206 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 6207 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s64)208 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 255209 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]210 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2211 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s64)212 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL]], [[LSHR]]213 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)214 ; CHECK-NEXT: RET_ReallyLR implicit $w0215 %2:_(s32) = COPY $w0216 %0:_(s8) = G_TRUNC %2(s32)217 %3:_(s32) = COPY $w1218 %1:_(s8) = G_TRUNC %3(s32)219 %7:_(s8) = G_CONSTANT i8 10220 %5:_(s8) = G_FSHR %0, %1, %7(s8)221 %6:_(s32) = G_ANYEXT %5(s8)222 $w0 = COPY %6(s32)223 RET_ReallyLR implicit $w0224 225...226 227---228name: fshr_i8_shift_by_bandwidth229alignment: 4230tracksRegLiveness: true231body: |232 bb.0:233 liveins: $w0, $w1234 235 ; CHECK-LABEL: name: fshr_i8_shift_by_bandwidth236 ; CHECK: liveins: $w0, $w1237 ; CHECK-NEXT: {{ $}}238 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0239 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1240 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1241 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s64)242 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 7243 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[SHL]], [[C1]](s64)244 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255245 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]246 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0247 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C3]](s64)248 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL1]], [[LSHR]]249 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)250 ; CHECK-NEXT: RET_ReallyLR implicit $w0251 %2:_(s32) = COPY $w0252 %0:_(s8) = G_TRUNC %2(s32)253 %3:_(s32) = COPY $w1254 %1:_(s8) = G_TRUNC %3(s32)255 %7:_(s8) = G_CONSTANT i8 8256 %5:_(s8) = G_FSHR %0, %1, %7(s8)257 %6:_(s32) = G_ANYEXT %5(s8)258 $w0 = COPY %6(s32)259 RET_ReallyLR implicit $w0260 261...262 263---264name: fshr_i16_const_shift265alignment: 4266tracksRegLiveness: true267body: |268 bb.0:269 liveins: $w0, $w1270 271 ; CHECK-LABEL: name: fshr_i16_const_shift272 ; CHECK: liveins: $w0, $w1273 ; CHECK-NEXT: {{ $}}274 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0275 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1276 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 11277 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s64)278 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535279 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]280 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 5281 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s64)282 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL]], [[LSHR]]283 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)284 ; CHECK-NEXT: RET_ReallyLR implicit $w0285 %2:_(s32) = COPY $w0286 %0:_(s16) = G_TRUNC %2(s32)287 %3:_(s32) = COPY $w1288 %1:_(s16) = G_TRUNC %3(s32)289 %4:_(s16) = G_CONSTANT i16 5290 %5:_(s16) = G_FSHR %0, %1, %4(s16)291 %6:_(s32) = G_ANYEXT %5(s16)292 $w0 = COPY %6(s32)293 RET_ReallyLR implicit $w0294 295...296 297---298name: fshr_i16_const_overshift299alignment: 4300tracksRegLiveness: true301body: |302 bb.0:303 liveins: $w0, $w1304 305 ; CHECK-LABEL: name: fshr_i16_const_overshift306 ; CHECK: liveins: $w0, $w1307 ; CHECK-NEXT: {{ $}}308 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0309 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1310 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12311 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s64)312 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535313 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]314 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4315 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s64)316 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL]], [[LSHR]]317 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)318 ; CHECK-NEXT: RET_ReallyLR implicit $w0319 %2:_(s32) = COPY $w0320 %0:_(s16) = G_TRUNC %2(s32)321 %3:_(s32) = COPY $w1322 %1:_(s16) = G_TRUNC %3(s32)323 %4:_(s16) = G_CONSTANT i16 20324 %5:_(s16) = G_FSHR %0, %1, %4(s16)325 %6:_(s32) = G_ANYEXT %5(s16)326 $w0 = COPY %6(s32)327 RET_ReallyLR implicit $w0328 329...330 331---332name: fshr_i16_shift_by_bandwidth333alignment: 4334tracksRegLiveness: true335body: |336 bb.0:337 liveins: $w0, $w1338 339 ; CHECK-LABEL: name: fshr_i16_shift_by_bandwidth340 ; CHECK: liveins: $w0, $w1341 ; CHECK-NEXT: {{ $}}342 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0343 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1344 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1345 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s64)346 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15347 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[SHL]], [[C1]](s64)348 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535349 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]350 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0351 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C3]](s64)352 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = disjoint G_OR [[SHL1]], [[LSHR]]353 ; CHECK-NEXT: $w0 = COPY [[OR]](s32)354 ; CHECK-NEXT: RET_ReallyLR implicit $w0355 %2:_(s32) = COPY $w0356 %0:_(s16) = G_TRUNC %2(s32)357 %3:_(s32) = COPY $w1358 %1:_(s16) = G_TRUNC %3(s32)359 %4:_(s16) = G_CONSTANT i16 16360 %5:_(s16) = G_FSHR %0, %1, %4(s16)361 %6:_(s32) = G_ANYEXT %5(s16)362 $w0 = COPY %6(s32)363 RET_ReallyLR implicit $w0364 365...366 367---368name: fshr_i32_const_shift369alignment: 4370tracksRegLiveness: true371body: |372 bb.0:373 liveins: $w0, $w1374 375 ; CHECK-LABEL: name: fshr_i32_const_shift376 ; CHECK: liveins: $w0, $w1377 ; CHECK-NEXT: {{ $}}378 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0379 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1380 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 9381 ; CHECK-NEXT: [[FSHR:%[0-9]+]]:_(s32) = G_FSHR [[COPY]], [[COPY1]], [[C]](s64)382 ; CHECK-NEXT: $w0 = COPY [[FSHR]](s32)383 ; CHECK-NEXT: RET_ReallyLR implicit $w0384 %0:_(s32) = COPY $w0385 %1:_(s32) = COPY $w1386 %2:_(s32) = G_CONSTANT i32 9387 %3:_(s32) = G_FSHR %0, %1, %2(s32)388 $w0 = COPY %3(s32)389 RET_ReallyLR implicit $w0390 391...392 393---394name: fshr_i32_const_overshift395alignment: 4396tracksRegLiveness: true397body: |398 bb.0:399 liveins: $w0, $w1400 401 ; CHECK-LABEL: name: fshr_i32_const_overshift402 ; CHECK: liveins: $w0, $w1403 ; CHECK-NEXT: {{ $}}404 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0405 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1406 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 10407 ; CHECK-NEXT: [[FSHR:%[0-9]+]]:_(s32) = G_FSHR [[COPY]], [[COPY1]], [[C]](s64)408 ; CHECK-NEXT: $w0 = COPY [[FSHR]](s32)409 ; CHECK-NEXT: RET_ReallyLR implicit $w0410 %0:_(s32) = COPY $w0411 %1:_(s32) = COPY $w1412 %4:_(s32) = G_CONSTANT i32 42413 %3:_(s32) = G_FSHR %0, %1, %4(s32)414 $w0 = COPY %3(s32)415 RET_ReallyLR implicit $w0416 417...418 419---420name: fshr_i32_shift_by_bitwidth421alignment: 4422tracksRegLiveness: true423body: |424 bb.0:425 liveins: $w0, $w1426 427 ; CHECK-LABEL: name: fshr_i32_shift_by_bitwidth428 ; CHECK: liveins: $w0, $w1429 ; CHECK-NEXT: {{ $}}430 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w1431 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)432 ; CHECK-NEXT: RET_ReallyLR implicit $w0433 %1:_(s32) = COPY $w1434 $w0 = COPY %1(s32)435 RET_ReallyLR implicit $w0436 437...438 439---440name: fshr_i64_const_shift441alignment: 4442tracksRegLiveness: true443body: |444 bb.0:445 liveins: $x0, $x1446 447 ; CHECK-LABEL: name: fshr_i64_const_shift448 ; CHECK: liveins: $x0, $x1449 ; CHECK-NEXT: {{ $}}450 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0451 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1452 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 41453 ; CHECK-NEXT: [[FSHR:%[0-9]+]]:_(s64) = G_FSHR [[COPY]], [[COPY1]], [[C]](s64)454 ; CHECK-NEXT: $x0 = COPY [[FSHR]](s64)455 ; CHECK-NEXT: RET_ReallyLR implicit $x0456 %0:_(s64) = COPY $x0457 %1:_(s64) = COPY $x1458 %4:_(s64) = G_CONSTANT i64 41459 %3:_(s64) = G_FSHR %0, %1, %4(s64)460 $x0 = COPY %3(s64)461 RET_ReallyLR implicit $x0462 463...464 465---466name: fshr_i64_const_overshift467alignment: 4468tracksRegLiveness: true469body: |470 bb.0:471 liveins: $x0, $x1472 473 ; CHECK-LABEL: name: fshr_i64_const_overshift474 ; CHECK: liveins: $x0, $x1475 ; CHECK-NEXT: {{ $}}476 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0477 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1478 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8479 ; CHECK-NEXT: [[FSHR:%[0-9]+]]:_(s64) = G_FSHR [[COPY]], [[COPY1]], [[C]](s64)480 ; CHECK-NEXT: $x0 = COPY [[FSHR]](s64)481 ; CHECK-NEXT: RET_ReallyLR implicit $x0482 %0:_(s64) = COPY $x0483 %1:_(s64) = COPY $x1484 %4:_(s64) = G_CONSTANT i64 72485 %3:_(s64) = G_FSHR %0, %1, %4(s64)486 $x0 = COPY %3(s64)487 RET_ReallyLR implicit $x0488 489...490 491---492name: fshr_i64_shift_by_bandwidth493alignment: 4494tracksRegLiveness: true495body: |496 bb.0:497 liveins: $x0, $x1498 499 ; CHECK-LABEL: name: fshr_i64_shift_by_bandwidth500 ; CHECK: liveins: $x0, $x1501 ; CHECK-NEXT: {{ $}}502 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0503 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1504 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63505 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0506 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1507 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C2]](s64)508 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[SHL]], [[C]](s64)509 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY1]], [[C1]](s64)510 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = disjoint G_OR [[SHL1]], [[LSHR]]511 ; CHECK-NEXT: $x0 = COPY [[OR]](s64)512 ; CHECK-NEXT: RET_ReallyLR implicit $x0513 %0:_(s64) = COPY $x0514 %1:_(s64) = COPY $x1515 %4:_(s64) = G_CONSTANT i64 64516 %3:_(s64) = G_FSHR %0, %1, %4(s64)517 $x0 = COPY %3(s64)518 RET_ReallyLR implicit $x0519 520...521 522---523name: fshr_v4i32_shift_by_bitwidth524alignment: 4525tracksRegLiveness: true526body: |527 bb.0:528 liveins: $q0, $q1529 530 ; CHECK-LABEL: name: fshr_v4i32_shift_by_bitwidth531 ; CHECK: liveins: $q0, $q1532 ; CHECK-NEXT: {{ $}}533 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0534 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31536 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0537 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)538 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)539 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1540 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C2]](s32), [[C2]](s32), [[C2]](s32), [[C2]](s32)541 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(<4 x s32>) = G_SHL [[COPY]], [[BUILD_VECTOR2]](<4 x s32>)542 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(<4 x s32>) = G_SHL [[SHL]], [[BUILD_VECTOR1]](<4 x s32>)543 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(<4 x s32>) = G_LSHR [[COPY1]], [[BUILD_VECTOR]](<4 x s32>)544 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<4 x s32>) = disjoint G_OR [[SHL1]], [[LSHR]]545 ; CHECK-NEXT: $q0 = COPY [[OR]](<4 x s32>)546 ; CHECK-NEXT: RET_ReallyLR implicit $q0547 %0:_(<4 x s32>) = COPY $q0548 %1:_(<4 x s32>) = COPY $q1549 %3:_(s32) = G_CONSTANT i32 32550 %2:_(<4 x s32>) = G_BUILD_VECTOR %3(s32), %3(s32), %3(s32), %3(s32)551 %4:_(<4 x s32>) = G_FSHR %0, %1, %2(<4 x s32>)552 $q0 = COPY %4(<4 x s32>)553 RET_ReallyLR implicit $q0554 555...556