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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2 3# RUN:llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=-fullfp16 -o - | FileCheck %s --check-prefix=NO-FP164# RUN:llc %s -verify-machineinstrs -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -o - | FileCheck %s --check-prefix=FP165 6...7---8name: test_f16.round9alignment: 410tracksRegLiveness: true11machineFunctionInfo: {}12body: |13 bb.0:14 liveins: $h015 16 ; NO-FP16-LABEL: name: test_f16.round17 ; NO-FP16: liveins: $h018 ; NO-FP16-NEXT: {{ $}}19 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h020 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)21 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[FPEXT]]22 ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INTRINSIC_ROUND]](s32)23 ; NO-FP16-NEXT: $h0 = COPY [[FPTRUNC]](s16)24 ; NO-FP16-NEXT: RET_ReallyLR implicit $h025 ;26 ; FP16-LABEL: name: test_f16.round27 ; FP16: liveins: $h028 ; FP16-NEXT: {{ $}}29 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h030 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s16) = G_INTRINSIC_ROUND [[COPY]]31 ; FP16-NEXT: $h0 = COPY [[INTRINSIC_ROUND]](s16)32 ; FP16-NEXT: RET_ReallyLR implicit $h033 %0:_(s16) = COPY $h034 %1:_(s16) = G_INTRINSIC_ROUND %035 $h0 = COPY %1(s16)36 RET_ReallyLR implicit $h037 38...39---40name: test_f32.round41alignment: 442tracksRegLiveness: true43machineFunctionInfo: {}44body: |45 bb.0:46 liveins: $s047 48 ; NO-FP16-LABEL: name: test_f32.round49 ; NO-FP16: liveins: $s050 ; NO-FP16-NEXT: {{ $}}51 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s052 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]]53 ; NO-FP16-NEXT: $s0 = COPY [[INTRINSIC_ROUND]](s32)54 ; NO-FP16-NEXT: RET_ReallyLR implicit $s055 ;56 ; FP16-LABEL: name: test_f32.round57 ; FP16: liveins: $s058 ; FP16-NEXT: {{ $}}59 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s060 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s32) = G_INTRINSIC_ROUND [[COPY]]61 ; FP16-NEXT: $s0 = COPY [[INTRINSIC_ROUND]](s32)62 ; FP16-NEXT: RET_ReallyLR implicit $s063 %0:_(s32) = COPY $s064 %1:_(s32) = G_INTRINSIC_ROUND %065 $s0 = COPY %1(s32)66 RET_ReallyLR implicit $s067 68...69---70name: test_f64.round71alignment: 472tracksRegLiveness: true73machineFunctionInfo: {}74body: |75 bb.0:76 liveins: $d077 78 ; NO-FP16-LABEL: name: test_f64.round79 ; NO-FP16: liveins: $d080 ; NO-FP16-NEXT: {{ $}}81 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d082 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]]83 ; NO-FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](s64)84 ; NO-FP16-NEXT: RET_ReallyLR implicit $d085 ;86 ; FP16-LABEL: name: test_f64.round87 ; FP16: liveins: $d088 ; FP16-NEXT: {{ $}}89 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d090 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(s64) = G_INTRINSIC_ROUND [[COPY]]91 ; FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](s64)92 ; FP16-NEXT: RET_ReallyLR implicit $d093 %0:_(s64) = COPY $d094 %1:_(s64) = G_INTRINSIC_ROUND %095 $d0 = COPY %1(s64)96 RET_ReallyLR implicit $d097 98...99---100name: test_v8f16.round101alignment: 4102tracksRegLiveness: true103machineFunctionInfo: {}104body: |105 bb.0:106 liveins: $q0107 108 ; NO-FP16-LABEL: name: test_v8f16.round109 ; NO-FP16: liveins: $q0110 ; NO-FP16-NEXT: {{ $}}111 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0112 ; NO-FP16-NEXT: [[UV:%[0-9]+]]:_(<4 x s16>), [[UV1:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES [[COPY]](<8 x s16>)113 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[UV]](<4 x s16>)114 ; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[UV1]](<4 x s16>)115 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[FPEXT]]116 ; NO-FP16-NEXT: [[INTRINSIC_ROUND1:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[FPEXT1]]117 ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(<4 x s16>) = G_FPTRUNC [[INTRINSIC_ROUND]](<4 x s32>)118 ; NO-FP16-NEXT: [[FPTRUNC1:%[0-9]+]]:_(<4 x s16>) = G_FPTRUNC [[INTRINSIC_ROUND1]](<4 x s32>)119 ; NO-FP16-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[FPTRUNC]](<4 x s16>), [[FPTRUNC1]](<4 x s16>)120 ; NO-FP16-NEXT: $q0 = COPY [[CONCAT_VECTORS]](<8 x s16>)121 ; NO-FP16-NEXT: RET_ReallyLR implicit $q0122 ;123 ; FP16-LABEL: name: test_v8f16.round124 ; FP16: liveins: $q0125 ; FP16-NEXT: {{ $}}126 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0127 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<8 x s16>) = G_INTRINSIC_ROUND [[COPY]]128 ; FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<8 x s16>)129 ; FP16-NEXT: RET_ReallyLR implicit $q0130 %0:_(<8 x s16>) = COPY $q0131 %1:_(<8 x s16>) = G_INTRINSIC_ROUND %0132 $q0 = COPY %1(<8 x s16>)133 RET_ReallyLR implicit $q0134 135...136---137name: test_v4f16.round138alignment: 4139tracksRegLiveness: true140registers:141 - { id: 0, class: _ }142 - { id: 1, class: _ }143machineFunctionInfo: {}144body: |145 bb.0:146 liveins: $d0147 148 ; NO-FP16-LABEL: name: test_v4f16.round149 ; NO-FP16: liveins: $d0150 ; NO-FP16-NEXT: {{ $}}151 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0152 ; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(<4 x s32>) = G_FPEXT [[COPY]](<4 x s16>)153 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[FPEXT]]154 ; NO-FP16-NEXT: [[FPTRUNC:%[0-9]+]]:_(<4 x s16>) = G_FPTRUNC [[INTRINSIC_ROUND]](<4 x s32>)155 ; NO-FP16-NEXT: $d0 = COPY [[FPTRUNC]](<4 x s16>)156 ; NO-FP16-NEXT: RET_ReallyLR implicit $d0157 ;158 ; FP16-LABEL: name: test_v4f16.round159 ; FP16: liveins: $d0160 ; FP16-NEXT: {{ $}}161 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0162 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s16>) = G_INTRINSIC_ROUND [[COPY]]163 ; FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](<4 x s16>)164 ; FP16-NEXT: RET_ReallyLR implicit $d0165 %0:_(<4 x s16>) = COPY $d0166 %1:_(<4 x s16>) = G_INTRINSIC_ROUND %0167 $d0 = COPY %1(<4 x s16>)168 RET_ReallyLR implicit $d0169 170...171---172name: test_v2f32.round173alignment: 4174tracksRegLiveness: true175registers:176 - { id: 0, class: _ }177 - { id: 1, class: _ }178machineFunctionInfo: {}179body: |180 bb.0:181 liveins: $d0182 183 ; NO-FP16-LABEL: name: test_v2f32.round184 ; NO-FP16: liveins: $d0185 ; NO-FP16-NEXT: {{ $}}186 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0187 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]]188 ; NO-FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>)189 ; NO-FP16-NEXT: RET_ReallyLR implicit $d0190 ;191 ; FP16-LABEL: name: test_v2f32.round192 ; FP16: liveins: $d0193 ; FP16-NEXT: {{ $}}194 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0195 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s32>) = G_INTRINSIC_ROUND [[COPY]]196 ; FP16-NEXT: $d0 = COPY [[INTRINSIC_ROUND]](<2 x s32>)197 ; FP16-NEXT: RET_ReallyLR implicit $d0198 %0:_(<2 x s32>) = COPY $d0199 %1:_(<2 x s32>) = G_INTRINSIC_ROUND %0200 $d0 = COPY %1(<2 x s32>)201 RET_ReallyLR implicit $d0202 203...204---205name: test_v4f32.round206alignment: 4207tracksRegLiveness: true208registers:209 - { id: 0, class: _ }210 - { id: 1, class: _ }211machineFunctionInfo: {}212body: |213 bb.0:214 liveins: $q0215 216 ; NO-FP16-LABEL: name: test_v4f32.round217 ; NO-FP16: liveins: $q0218 ; NO-FP16-NEXT: {{ $}}219 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0220 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]]221 ; NO-FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>)222 ; NO-FP16-NEXT: RET_ReallyLR implicit $q0223 ;224 ; FP16-LABEL: name: test_v4f32.round225 ; FP16: liveins: $q0226 ; FP16-NEXT: {{ $}}227 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0228 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<4 x s32>) = G_INTRINSIC_ROUND [[COPY]]229 ; FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<4 x s32>)230 ; FP16-NEXT: RET_ReallyLR implicit $q0231 %0:_(<4 x s32>) = COPY $q0232 %1:_(<4 x s32>) = G_INTRINSIC_ROUND %0233 $q0 = COPY %1(<4 x s32>)234 RET_ReallyLR implicit $q0235 236...237---238name: test_v2f64.round239alignment: 4240tracksRegLiveness: true241registers:242 - { id: 0, class: _ }243 - { id: 1, class: _ }244machineFunctionInfo: {}245body: |246 bb.0:247 liveins: $q0248 249 ; NO-FP16-LABEL: name: test_v2f64.round250 ; NO-FP16: liveins: $q0251 ; NO-FP16-NEXT: {{ $}}252 ; NO-FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0253 ; NO-FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]]254 ; NO-FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>)255 ; NO-FP16-NEXT: RET_ReallyLR implicit $q0256 ;257 ; FP16-LABEL: name: test_v2f64.round258 ; FP16: liveins: $q0259 ; FP16-NEXT: {{ $}}260 ; FP16-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0261 ; FP16-NEXT: [[INTRINSIC_ROUND:%[0-9]+]]:_(<2 x s64>) = G_INTRINSIC_ROUND [[COPY]]262 ; FP16-NEXT: $q0 = COPY [[INTRINSIC_ROUND]](<2 x s64>)263 ; FP16-NEXT: RET_ReallyLR implicit $q0264 %0:_(<2 x s64>) = COPY $q0265 %1:_(<2 x s64>) = G_INTRINSIC_ROUND %0266 $q0 = COPY %1(<2 x s64>)267 RET_ReallyLR implicit $q0268