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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -O0 -mtriple=aarch64 -verify-machineinstrs -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel.*' -o - %s 2> %t.err | FileCheck %s3# RUN: FileCheck -check-prefix=ERR %s < %t.err4 5# ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %{{[0-9]+}}:_(<8 x s9>), %{{[0-9]+}}:_(p0) :: (store (<8 x s9>), align 16) (in function: store-narrow-non-byte-sized)6# ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %{{[0-9]+}}:_(<8 x s9>) = G_LOAD %{{[0-9]+}}:_(p0) :: (load (<8 x s9>), align 16) (in function: load-narrow-non-byte-sized)7# ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %{{[0-9]+}}:_(s128) = G_LOAD %{{[0-9]+}}:_(p0) :: (load (<2 x s63>)) (in function: load-narrow-scalar-high-bits)8 9# FIXME: Non-byte-sized vector elements cause fallback in LegalizerHelper::reduceLoadStoreWidth10---11name: store-narrow-non-byte-sized12tracksRegLiveness: true13body: |14 bb.1:15 liveins: $x816 ; CHECK-LABEL: name: store-narrow-non-byte-sized17 ; CHECK: liveins: $x818 ; CHECK-NEXT: {{ $}}19 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x820 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s9) = G_CONSTANT i9 -25621 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s9) = G_CONSTANT i9 -25522 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s9>) = G_BUILD_VECTOR [[C]](s9), [[C1]](s9), [[C]](s9), [[C1]](s9), [[C]](s9), [[C1]](s9), [[C]](s9), [[C1]](s9)23 ; CHECK-NEXT: G_STORE [[BUILD_VECTOR]](<8 x s9>), [[COPY]](p0) :: (store (<8 x s9>), align 16)24 ; CHECK-NEXT: RET_ReallyLR25 %0:_(p0) = COPY $x826 %1:_(s9) = G_CONSTANT i9 25627 %2:_(s9) = G_CONSTANT i9 25728 %3:_(<8 x s9>) = G_BUILD_VECTOR %1(s9), %2(s9), %1(s9), %2(s9), %1(s9), %2(s9), %1(s9), %2(s9)29 G_STORE %3(<8 x s9>), %0(p0) :: (store (<8 x s9>), align 16)30 RET_ReallyLR31...32 33# FIXME: Vector stores only sometimes act as per-lane truncating stores (see e.g. PR#121169).34---35name: store-narrow-per-lane-trunc36tracksRegLiveness: true37body: |38 bb.1:39 liveins: $x840 ; CHECK-LABEL: name: store-narrow-per-lane-trunc41 ; CHECK: liveins: $x842 ; CHECK-NEXT: {{ $}}43 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x844 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4245 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)46 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)47 ; CHECK-NEXT: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>))48 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1649 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](s64)50 ; CHECK-NEXT: G_STORE [[BUILD_VECTOR1]](<2 x s64>), [[PTR_ADD]](p0) :: (store (<2 x s64>) into unknown-address + 16)51 ; CHECK-NEXT: RET_ReallyLR52 %0:_(p0) = COPY $x853 %1:_(s64) = G_CONSTANT i64 4254 %2:_(<4 x s64>) = G_BUILD_VECTOR %1(s64), %1(s64), %1(s64), %1(s64)55 G_STORE %2(<4 x s64>), %0(p0) :: (store (<4 x s63>), align 16)56 RET_ReallyLR57...58 59# FIXME: Clarify behavior of stores between scalar and vector types in documentation. Should we consider this malformed?60---61name: store-narrow-vector-high-bits62tracksRegLiveness: true63body: |64 bb.1:65 liveins: $x866 ; CHECK-LABEL: name: store-narrow-vector-high-bits67 ; CHECK: liveins: $x868 ; CHECK-NEXT: {{ $}}69 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x870 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4271 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)72 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)73 ; CHECK-NEXT: G_STORE [[BUILD_VECTOR]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>))74 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1675 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C1]](s64)76 ; CHECK-NEXT: G_STORE [[BUILD_VECTOR1]](<2 x s64>), [[PTR_ADD]](p0) :: (store (<2 x s64>) into unknown-address + 16)77 ; CHECK-NEXT: RET_ReallyLR78 %0:_(p0) = COPY $x879 %1:_(s64) = G_CONSTANT i64 4280 %2:_(<4 x s64>) = G_BUILD_VECTOR %1(s64), %1(s64), %1(s64), %1(s64)81 G_STORE %2(<4 x s64>), %0(p0) :: (store (s252), align 16)82 RET_ReallyLR83...84---85name: store-narrow-scalar-high-bits86tracksRegLiveness: true87body: |88 bb.1:89 liveins: $x890 ; CHECK-LABEL: name: store-narrow-scalar-high-bits91 ; CHECK: liveins: $x892 ; CHECK-NEXT: {{ $}}93 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x894 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4295 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 096 ; CHECK-NEXT: G_STORE [[C]](s64), [[COPY]](p0) :: (store (s64), align 16)97 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 898 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C2]](s64)99 ; CHECK-NEXT: G_STORE [[C1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)100 ; CHECK-NEXT: RET_ReallyLR101 %0:_(p0) = COPY $x8102 %1:_(s128) = G_CONSTANT i128 42103 G_STORE %1(s128), %0(p0) :: (store (<2 x s63>), align 16)104 RET_ReallyLR105...106 107 108# FIXME: Non-byte-sized vector elements cause fallback in LegalizerHelper::reduceLoadStoreWidth109---110name: load-narrow-non-byte-sized111tracksRegLiveness: true112body: |113 bb.1:114 liveins: $x8115 ; CHECK-LABEL: name: load-narrow-non-byte-sized116 ; CHECK: liveins: $x8117 ; CHECK-NEXT: {{ $}}118 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8119 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<8 x s9>) = G_LOAD [[COPY]](p0) :: (load (<8 x s9>), align 16)120 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(<8 x s16>) = G_ZEXT [[LOAD]](<8 x s9>)121 ; CHECK-NEXT: $q0 = COPY [[ZEXT]](<8 x s16>)122 ; CHECK-NEXT: RET_ReallyLR implicit $q0123 %0:_(p0) = COPY $x8124 %2:_(<8 x s9>) = G_LOAD %0(p0) :: (load (<8 x s9>), align 16)125 %3:_(<8 x s16>) = G_ZEXT %2(<8 x s9>)126 $q0 = COPY %3(<8 x s16>)127 RET_ReallyLR implicit $q0128...129 130# FIXME: Vector stores sometimes act as per-lane truncating stores (see PR#121169). If we want to keep these semantics we should change the semantics of G_LOAD to behave as a per-lane extending load.131---132name: load-narrow-per-lane-ext133tracksRegLiveness: true134body: |135 bb.1:136 liveins: $x8137 ; CHECK-LABEL: name: load-narrow-per-lane-ext138 ; CHECK: liveins: $x8139 ; CHECK-NEXT: {{ $}}140 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8141 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>))142 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16143 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](s64)144 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p0) :: (load (<2 x s64>) from unknown-address + 16)145 ; CHECK-NEXT: $q0 = COPY [[LOAD]](<2 x s64>)146 ; CHECK-NEXT: $q1 = COPY [[LOAD1]](<2 x s64>)147 ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1148 %0:_(p0) = COPY $x8149 %2:_(<4 x s64>) = G_LOAD %0(p0) :: (load (<4 x s63>), align 16)150 %3:_(<2 x s64>), %4:_(<2 x s64>) = G_UNMERGE_VALUES %2(<4 x s64>)151 $q0 = COPY %3(<2 x s64>)152 $q1 = COPY %4(<2 x s64>)153 RET_ReallyLR implicit $q0, implicit $q1154...155 156# FIXME: Clarify behavior of loads between scalar and vector types in documentation. Should we consider this malformed?157---158name: load-narrow-vector-high-bits159tracksRegLiveness: true160body: |161 bb.1:162 liveins: $x8163 ; CHECK-LABEL: name: load-narrow-vector-high-bits164 ; CHECK: liveins: $x8165 ; CHECK-NEXT: {{ $}}166 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8167 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>))168 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16169 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C]](s64)170 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[PTR_ADD]](p0) :: (load (<2 x s64>) from unknown-address + 16)171 ; CHECK-NEXT: $q0 = COPY [[LOAD]](<2 x s64>)172 ; CHECK-NEXT: $q1 = COPY [[LOAD1]](<2 x s64>)173 ; CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1174 %0:_(p0) = COPY $x8175 %2:_(<4 x s64>) = G_LOAD %0(p0) :: (load (s252), align 16)176 %3:_(<2 x s64>), %4:_(<2 x s64>) = G_UNMERGE_VALUES %2(<4 x s64>)177 $q0 = COPY %3(<2 x s64>)178 $q1 = COPY %4(<2 x s64>)179 RET_ReallyLR implicit $q0, implicit $q1180...181---182name: load-narrow-scalar-high-bits183tracksRegLiveness: true184body: |185 bb.1:186 liveins: $x8187 ; CHECK-LABEL: name: load-narrow-scalar-high-bits188 ; CHECK: liveins: $x8189 ; CHECK-NEXT: {{ $}}190 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8191 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p0) :: (load (<2 x s63>))192 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[LOAD]](s128)193 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)194 ; CHECK-NEXT: $x1 = COPY [[UV1]](s64)195 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1196 %0:_(p0) = COPY $x8197 %2:_(s128) = G_LOAD %0(p0) :: (load (<2 x s63>), align 16)198 %3:_(s64), %4:_(s64) = G_UNMERGE_VALUES %2(s128)199 $x0 = COPY %3(s64)200 $x1 = COPY %4(s64)201 RET_ReallyLR implicit $x0, implicit $x1202...203