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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: test_scalar_or_small6body: |7 bb.0:8 liveins: $x0, $x1, $x2, $x39 ; CHECK-LABEL: name: test_scalar_or_small10 ; CHECK: liveins: $x0, $x1, $x2, $x311 ; CHECK-NEXT: {{ $}}12 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x013 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x114 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)15 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)16 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[TRUNC]], [[TRUNC1]]17 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[OR]](s32)18 ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)19 %0:_(s64) = COPY $x020 %1:_(s64) = COPY $x121 %2:_(s8) = G_TRUNC %022 %3:_(s8) = G_TRUNC %123 %4:_(s8) = G_OR %2, %324 %5:_(s64) = G_ANYEXT %425 $x0 = COPY %526...27 28---29name: test_big_scalar_power_of_230body: |31 bb.0:32 liveins: $x0, $x1, $x2, $x333 ; We have a temporary G_MERGE_VALUES in the legalizer that gets34 ; cleaned up with the G_UNMERGE_VALUES, so we end up directly35 ; copying the results of the G_OR ops.36 37 ; CHECK-LABEL: name: test_big_scalar_power_of_238 ; CHECK: liveins: $x0, $x1, $x2, $x339 ; CHECK-NEXT: {{ $}}40 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x041 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x142 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x243 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x344 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY2]]45 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[COPY1]], [[COPY3]]46 ; CHECK-NEXT: $x0 = COPY [[OR]](s64)47 ; CHECK-NEXT: $x1 = COPY [[OR1]](s64)48 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x149 %0:_(s64) = COPY $x050 %1:_(s64) = COPY $x151 %2:_(s64) = COPY $x252 %3:_(s64) = COPY $x353 %4:_(s128) = G_MERGE_VALUES %0, %154 %5:_(s128) = G_MERGE_VALUES %2, %355 %6:_(s128) = G_OR %4, %556 %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %657 $x0 = COPY %758 $x1 = COPY %859 RET_ReallyLR implicit $x0, implicit $x160...61---62name: test_s318_or63tracksRegLiveness: true64body: |65 bb.0:66 liveins: $x067 68 ; CHECK-LABEL: name: test_s318_or69 ; CHECK: liveins: $x070 ; CHECK-NEXT: {{ $}}71 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF72 ; CHECK-NEXT: %ptr:_(p0) = COPY $x073 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[DEF]], [[DEF]]74 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[DEF]], [[DEF]]75 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[DEF]], [[DEF]]76 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s64) = G_OR [[DEF]], [[DEF]]77 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s64) = G_OR [[DEF]], [[DEF]]78 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -179 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 461168601842738790380 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[OR]], [[C]]81 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[OR1]], [[C]]82 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[OR2]], [[C]]83 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[OR3]], [[C]]84 ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[OR4]], [[C1]]85 ; CHECK-NEXT: G_STORE [[AND]](s64), %ptr(p0) :: (store (s64), align 64)86 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 887 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD %ptr, [[C2]](s64)88 ; CHECK-NEXT: G_STORE [[AND1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)89 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1690 ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD %ptr, [[C3]](s64)91 ; CHECK-NEXT: G_STORE [[AND2]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16, align 16)92 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2493 ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD %ptr, [[C4]](s64)94 ; CHECK-NEXT: G_STORE [[AND3]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24)95 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 3296 ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD %ptr, [[C5]](s64)97 ; CHECK-NEXT: G_STORE [[AND4]](s64), [[PTR_ADD3]](p0) :: (store (s64) into unknown-address + 32, align 32)98 ; CHECK-NEXT: RET_ReallyLR implicit $x099 %a:_(s318) = G_IMPLICIT_DEF100 %b:_(s318) = G_IMPLICIT_DEF101 %ptr:_(p0) = COPY $x0102 %or:_(s318) = G_OR %a, %b103 G_STORE %or(s318), %ptr(p0) :: (store (s318))104 RET_ReallyLR implicit $x0105 106...107---108name: test_vector_or_v16s16109body: |110 bb.0.entry:111 ; CHECK-LABEL: name: test_vector_or_v16s16112 ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0113 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $q1114 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<8 x s16>) = G_OR [[COPY]], [[COPY]]115 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(<8 x s16>) = G_OR [[COPY1]], [[COPY1]]116 ; CHECK-NEXT: $q0 = COPY [[OR]](<8 x s16>)117 ; CHECK-NEXT: $q1 = COPY [[OR1]](<8 x s16>)118 %1:_(<8 x s16>) = COPY $q0119 %2:_(<8 x s16>) = COPY $q1120 %0:_(<16 x s16>) = G_CONCAT_VECTORS %1(<8 x s16>), %2(<8 x s16>)121 %3:_(<16 x s16>) = G_OR %0, %0122 %4:_(<8 x s16>), %5:_(<8 x s16>) = G_UNMERGE_VALUES %3(<16 x s16>)123 $q0 = COPY %4(<8 x s16>)124 $q1 = COPY %5(<8 x s16>)125 126...127---128name: test_vector_or_v32s8129body: |130 bb.0.entry:131 ; CHECK-LABEL: name: test_vector_or_v32s8132 ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0133 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1134 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<16 x s8>) = G_OR [[COPY]], [[COPY]]135 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(<16 x s8>) = G_OR [[COPY1]], [[COPY1]]136 ; CHECK-NEXT: $q0 = COPY [[OR]](<16 x s8>)137 ; CHECK-NEXT: $q1 = COPY [[OR1]](<16 x s8>)138 %0:_(<16 x s8>) = COPY $q0139 %1:_(<16 x s8>) = COPY $q1140 %2:_(<32 x s8>) = G_CONCAT_VECTORS %0, %1141 %3:_(<32 x s8>) = G_OR %2, %2142 %7:_(<16 x s8>), %8:_(<16 x s8>) = G_UNMERGE_VALUES %3(<32 x s8>)143 $q0 = COPY %7(<16 x s8>)144 $q1 = COPY %8(<16 x s8>)145 146...147---148name: or_v2s1149tracksRegLiveness: true150body: |151 bb.1:152 liveins: $d0, $d1, $d2, $d3153 154 ; CHECK-LABEL: name: or_v2s1155 ; CHECK: liveins: $d0, $d1, $d2, $d3156 ; CHECK-NEXT: {{ $}}157 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0158 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1159 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $d2160 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<2 x s32>) = COPY $d3161 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(eq), [[COPY]](<2 x s32>), [[COPY1]]162 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(eq), [[COPY2]](<2 x s32>), [[COPY3]]163 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[ICMP]], [[ICMP1]]164 ; CHECK-NEXT: $d0 = COPY [[OR]](<2 x s32>)165 ; CHECK-NEXT: RET_ReallyLR implicit $d0166 %0:_(<2 x s32>) = COPY $d0167 %1:_(<2 x s32>) = COPY $d1168 %2:_(<2 x s32>) = COPY $d2169 %3:_(<2 x s32>) = COPY $d3170 %4:_(<2 x s1>) = G_ICMP intpred(eq), %0(<2 x s32>), %1171 %5:_(<2 x s1>) = G_ICMP intpred(eq), %2(<2 x s32>), %3172 %6:_(<2 x s1>) = G_OR %4, %5173 %7:_(<2 x s32>) = G_ANYEXT %6174 $d0 = COPY %7:_(<2 x s32>)175 RET_ReallyLR implicit $d0176...177---178name: or_v3s1179tracksRegLiveness: true180body: |181 bb.1:182 liveins: $b0, $b1, $b2183 184 ; CHECK-LABEL: name: or_v3s1185 ; CHECK: liveins: $b0, $b1, $b2186 ; CHECK-NEXT: {{ $}}187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $b0188 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s8) = COPY $b1189 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s8) = COPY $b2190 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8)191 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY1]](s8)192 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY2]](s8)193 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF194 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[ANYEXT]](s16), [[ANYEXT1]](s16), [[ANYEXT2]](s16), [[DEF]](s16)195 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8)196 ; CHECK-NEXT: [[ANYEXT4:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY1]](s8)197 ; CHECK-NEXT: [[ANYEXT5:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY2]](s8)198 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[ANYEXT3]](s16), [[ANYEXT4]](s16), [[ANYEXT5]](s16), [[DEF]](s16)199 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<4 x s16>) = G_OR [[BUILD_VECTOR]], [[BUILD_VECTOR1]]200 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[OR]](<4 x s16>)201 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[UV]](s16)202 ; CHECK-NEXT: $b0 = COPY [[TRUNC]](s8)203 ; CHECK-NEXT: RET_ReallyLR implicit $b0204 %1:_(s8) = COPY $b0205 %2:_(s8) = COPY $b1206 %3:_(s8) = COPY $b2207 %4:_(<3 x s8>) = G_BUILD_VECTOR %1(s8), %2(s8), %3(s8)208 %0:_(<3 x s1>) = G_TRUNC %4(<3 x s8>)209 %5:_(<3 x s1>) = G_OR %0, %0210 %7:_(<3 x s8>) = G_ANYEXT %5(<3 x s1>)211 %8:_(s8), %9:_(s8), %10:_(s8) = G_UNMERGE_VALUES %7(<3 x s8>)212 $b0 = COPY %8:_(s8)213 RET_ReallyLR implicit $b0214...215---216name: or_v4s1217tracksRegLiveness: true218body: |219 bb.1:220 liveins: $d0, $d1, $d2, $d3221 222 ; CHECK-LABEL: name: or_v4s1223 ; CHECK: liveins: $d0, $d1, $d2, $d3224 ; CHECK-NEXT: {{ $}}225 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0226 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1227 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<4 x s16>) = COPY $d2228 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<4 x s16>) = COPY $d3229 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[COPY]](<4 x s16>), [[COPY1]]230 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[COPY2]](<4 x s16>), [[COPY3]]231 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<4 x s16>) = G_OR [[ICMP]], [[ICMP1]]232 ; CHECK-NEXT: $d0 = COPY [[OR]](<4 x s16>)233 ; CHECK-NEXT: RET_ReallyLR implicit $d0234 %0:_(<4 x s16>) = COPY $d0235 %1:_(<4 x s16>) = COPY $d1236 %2:_(<4 x s16>) = COPY $d2237 %3:_(<4 x s16>) = COPY $d3238 %4:_(<4 x s1>) = G_ICMP intpred(eq), %0(<4 x s16>), %1239 %5:_(<4 x s1>) = G_ICMP intpred(eq), %2(<4 x s16>), %3240 %6:_(<4 x s1>) = G_OR %4, %5241 %7:_(<4 x s16>) = G_ANYEXT %6242 $d0 = COPY %7:_(<4 x s16>)243 RET_ReallyLR implicit $d0244...245---246name: or_v8s1247tracksRegLiveness: true248body: |249 bb.1:250 liveins: $d0, $d1, $d2, $d3251 252 ; CHECK-LABEL: name: or_v8s1253 ; CHECK: liveins: $d0, $d1, $d2, $d3254 ; CHECK-NEXT: {{ $}}255 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0256 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1257 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<8 x s8>) = COPY $d2258 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<8 x s8>) = COPY $d3259 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[COPY]](<8 x s8>), [[COPY1]]260 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[COPY2]](<8 x s8>), [[COPY3]]261 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<8 x s8>) = G_OR [[ICMP]], [[ICMP1]]262 ; CHECK-NEXT: $d0 = COPY [[OR]](<8 x s8>)263 ; CHECK-NEXT: RET_ReallyLR implicit $d0264 %0:_(<8 x s8>) = COPY $d0265 %1:_(<8 x s8>) = COPY $d1266 %2:_(<8 x s8>) = COPY $d2267 %3:_(<8 x s8>) = COPY $d3268 %4:_(<8 x s1>) = G_ICMP intpred(eq), %0(<8 x s8>), %1269 %5:_(<8 x s1>) = G_ICMP intpred(eq), %2(<8 x s8>), %3270 %6:_(<8 x s1>) = G_OR %4, %5271 %7:_(<8 x s8>) = G_ANYEXT %6272 $d0 = COPY %7:_(<8 x s8>)273 RET_ReallyLR implicit $d0274...275---276name: or_v16s1277tracksRegLiveness: true278body: |279 bb.1:280 liveins: $q0, $q1, $q2, $q3281 282 ; CHECK-LABEL: name: or_v16s1283 ; CHECK: liveins: $q0, $q1, $q2, $q3284 ; CHECK-NEXT: {{ $}}285 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0286 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1287 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<16 x s8>) = COPY $q2288 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<16 x s8>) = COPY $q3289 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[COPY]](<16 x s8>), [[COPY1]]290 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[COPY2]](<16 x s8>), [[COPY3]]291 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<16 x s8>) = G_OR [[ICMP]], [[ICMP1]]292 ; CHECK-NEXT: $q0 = COPY [[OR]](<16 x s8>)293 ; CHECK-NEXT: RET_ReallyLR implicit $q0294 %0:_(<16 x s8>) = COPY $q0295 %1:_(<16 x s8>) = COPY $q1296 %2:_(<16 x s8>) = COPY $q2297 %3:_(<16 x s8>) = COPY $q3298 %4:_(<16 x s1>) = G_ICMP intpred(eq), %0(<16 x s8>), %1299 %5:_(<16 x s1>) = G_ICMP intpred(eq), %2(<16 x s8>), %3300 %6:_(<16 x s1>) = G_OR %4, %5301 %7:_(<16 x s8>) = G_ANYEXT %6302 $q0 = COPY %7:_(<16 x s8>)303 RET_ReallyLR implicit $q0304...305