77 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s3 4---5name: fadd_v2s326tracksRegLiveness: true7body: |8 bb.1:9 liveins: $d010 11 ; CHECK-LABEL: name: fadd_v2s3212 ; CHECK: liveins: $d013 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d015 ; CHECK-NEXT: [[VECREDUCE_FADD:%[0-9]+]]:_(s32) = G_VECREDUCE_FADD [[COPY]](<2 x s32>)16 ; CHECK-NEXT: $w0 = COPY [[VECREDUCE_FADD]](s32)17 ; CHECK-NEXT: RET_ReallyLR implicit $w018 %0:_(<2 x s32>) = COPY $d019 %1:_(s32) = G_VECREDUCE_FADD %0(<2 x s32>)20 $w0 = COPY %1(s32)21 RET_ReallyLR implicit $w022 23...24---25name: fadd_v2s6426tracksRegLiveness: true27body: |28 bb.1:29 liveins: $q030 31 ; CHECK-LABEL: name: fadd_v2s6432 ; CHECK: liveins: $q033 ; CHECK-NEXT: {{ $}}34 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q035 ; CHECK-NEXT: [[VECREDUCE_FADD:%[0-9]+]]:_(s64) = G_VECREDUCE_FADD [[COPY]](<2 x s64>)36 ; CHECK-NEXT: $x0 = COPY [[VECREDUCE_FADD]](s64)37 ; CHECK-NEXT: RET_ReallyLR implicit $x038 %0:_(<2 x s64>) = COPY $q039 %2:_(s64) = G_VECREDUCE_FADD %0(<2 x s64>)40 $x0 = COPY %2(s64)41 RET_ReallyLR implicit $x042 43...44---45name: fadd_v8s6446alignment: 447tracksRegLiveness: true48body: |49 bb.1:50 liveins: $q0, $q1, $q2, $q351 ; This is a power-of-2 legalization, so use a tree reduction.52 ; CHECK-LABEL: name: fadd_v8s6453 ; CHECK: liveins: $q0, $q1, $q2, $q354 ; CHECK-NEXT: {{ $}}55 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q056 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q157 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s64>) = COPY $q258 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<2 x s64>) = COPY $q359 ; CHECK-NEXT: [[FADD:%[0-9]+]]:_(<2 x s64>) = G_FADD [[COPY]], [[COPY1]]60 ; CHECK-NEXT: [[FADD1:%[0-9]+]]:_(<2 x s64>) = G_FADD [[COPY2]], [[COPY3]]61 ; CHECK-NEXT: [[FADD2:%[0-9]+]]:_(<2 x s64>) = G_FADD [[FADD]], [[FADD1]]62 ; CHECK-NEXT: [[VECREDUCE_FADD:%[0-9]+]]:_(s64) = G_VECREDUCE_FADD [[FADD2]](<2 x s64>)63 ; CHECK-NEXT: $x0 = COPY [[VECREDUCE_FADD]](s64)64 ; CHECK-NEXT: RET_ReallyLR implicit $x065 %0:_(<2 x s64>) = COPY $q066 %1:_(<2 x s64>) = COPY $q167 %2:_(<2 x s64>) = COPY $q268 %3:_(<2 x s64>) = COPY $q369 %4:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>)70 %5:_(<4 x s64>) = G_CONCAT_VECTORS %2(<2 x s64>), %3(<2 x s64>)71 %6:_(<8 x s64>) = G_CONCAT_VECTORS %4(<4 x s64>), %5(<4 x s64>)72 %7:_(s64) = G_VECREDUCE_FADD %6(<8 x s64>)73 $x0 = COPY %7(s64)74 RET_ReallyLR implicit $x075 76...77