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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc %s -verify-machineinstrs -O0 -run-pass=legalizer -mtriple aarch64-unknown-unknown -o - | FileCheck %s3...4---5name: v2s646alignment: 47tracksRegLiveness: true8body: |9 bb.0:10 liveins: $q0, $q111 12 ; CHECK-LABEL: name: v2s6413 ; CHECK: liveins: $q0, $q114 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q016 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q117 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 018 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)19 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(sgt), [[COPY]](<2 x s64>), [[BUILD_VECTOR]]20 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -121 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C1]](s64), [[C1]](s64)22 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR1]]23 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s64>) = G_AND [[COPY1]], [[ICMP]]24 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<2 x s64>) = G_AND [[COPY]], [[XOR]]25 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s64>) = G_OR [[AND]], [[AND1]]26 ; CHECK-NEXT: $q0 = COPY [[OR]](<2 x s64>)27 ; CHECK-NEXT: RET_ReallyLR implicit $q028 %0:_(<2 x s64>) = COPY $q029 %1:_(<2 x s64>) = COPY $q130 %3:_(s64) = G_CONSTANT i64 031 %2:_(<2 x s64>) = G_BUILD_VECTOR %3(s64), %3(s64)32 %4:_(<2 x s1>) = G_ICMP intpred(sgt), %0(<2 x s64>), %233 %5:_(<2 x s64>) = G_SELECT %4(<2 x s1>), %1, %034 $q0 = COPY %5(<2 x s64>)35 RET_ReallyLR implicit $q036 37...38---39name: v2s3240alignment: 441tracksRegLiveness: true42body: |43 bb.0:44 liveins: $d0, $d145 46 ; CHECK-LABEL: name: v2s3247 ; CHECK: liveins: $d0, $d148 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d050 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d151 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 052 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)53 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(sgt), [[COPY]](<2 x s32>), [[BUILD_VECTOR]]54 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -155 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32)56 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s32>) = G_XOR [[ICMP]], [[BUILD_VECTOR1]]57 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY1]], [[ICMP]]58 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<2 x s32>) = G_AND [[COPY]], [[XOR]]59 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR [[AND]], [[AND1]]60 ; CHECK-NEXT: $d0 = COPY [[OR]](<2 x s32>)61 ; CHECK-NEXT: RET_ReallyLR implicit $d062 %0:_(<2 x s32>) = COPY $d063 %1:_(<2 x s32>) = COPY $d164 %3:_(s32) = G_CONSTANT i32 065 %2:_(<2 x s32>) = G_BUILD_VECTOR %3(s32), %3(s32)66 %4:_(<2 x s1>) = G_ICMP intpred(sgt), %0(<2 x s32>), %267 %5:_(<2 x s32>) = G_SELECT %4(<2 x s1>), %1, %068 $d0 = COPY %5(<2 x s32>)69 RET_ReallyLR implicit $d070 71...72---73name: v16s874alignment: 475tracksRegLiveness: true76body: |77 bb.0:78 liveins: $q0, $q179 80 ; CHECK-LABEL: name: v16s881 ; CHECK: liveins: $q0, $q182 ; CHECK-NEXT: {{ $}}83 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q084 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q185 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 086 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8), [[C]](s8)87 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(sgt), [[COPY]](<16 x s8>), [[BUILD_VECTOR]]88 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s8) = G_CONSTANT i8 -189 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<16 x s8>) = G_BUILD_VECTOR [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8), [[C1]](s8)90 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<16 x s8>) = G_XOR [[ICMP]], [[BUILD_VECTOR1]]91 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<16 x s8>) = G_AND [[COPY1]], [[ICMP]]92 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<16 x s8>) = G_AND [[COPY]], [[XOR]]93 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<16 x s8>) = G_OR [[AND]], [[AND1]]94 ; CHECK-NEXT: $q0 = COPY [[OR]](<16 x s8>)95 ; CHECK-NEXT: RET_ReallyLR implicit $q096 %0:_(<16 x s8>) = COPY $q097 %1:_(<16 x s8>) = COPY $q198 %3:_(s8) = G_CONSTANT i8 099 %2:_(<16 x s8>) = G_BUILD_VECTOR %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8), %3(s8)100 %4:_(<16 x s1>) = G_ICMP intpred(sgt), %0(<16 x s8>), %2101 %5:_(<16 x s8>) = G_SELECT %4(<16 x s1>), %1, %0102 $q0 = COPY %5(<16 x s8>)103 RET_ReallyLR implicit $q0104...105---106name: scalar_mask107alignment: 4108tracksRegLiveness: true109liveins:110 - { reg: '$w0' }111 - { reg: '$q0' }112body: |113 bb.1:114 liveins: $q0, $w0115 116 ; CHECK-LABEL: name: scalar_mask117 ; CHECK: liveins: $q0, $w0118 ; CHECK-NEXT: {{ $}}119 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0120 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q0121 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4100122 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00123 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)124 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]125 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ICMP]], 1126 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SEXT_INREG]](s32)127 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF128 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0129 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY2]](s32), [[C2]](s64)130 ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[IVEC]](<4 x s32>), [[DEF]], shufflemask(0, 0, 0, 0)131 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1132 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32)133 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<4 x s32>) = G_XOR [[SHUF]], [[BUILD_VECTOR1]]134 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s32>) = G_AND [[COPY1]], [[SHUF]]135 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<4 x s32>) = G_AND [[BUILD_VECTOR]], [[XOR]]136 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<4 x s32>) = G_OR [[AND]], [[AND1]]137 ; CHECK-NEXT: $q0 = COPY [[OR]](<4 x s32>)138 ; CHECK-NEXT: RET_ReallyLR implicit $q0139 %0:_(s32) = COPY $w0140 %1:_(<4 x s32>) = COPY $q0141 %2:_(s32) = G_CONSTANT i32 4100142 %6:_(s32) = G_FCONSTANT float 0.000000e+00143 %5:_(<4 x s32>) = G_BUILD_VECTOR %6(s32), %6(s32), %6(s32), %6(s32)144 %3:_(s1) = G_ICMP intpred(eq), %0(s32), %2145 %4:_(<4 x s32>) = G_SELECT %3(s1), %1, %5146 $q0 = COPY %4(<4 x s32>)147 RET_ReallyLR implicit $q0148 149...150---151name: s88152tracksRegLiveness: true153body: |154 bb.0:155 liveins: $w0, $w1, $x0156 157 ; CHECK-LABEL: name: s88158 ; CHECK: liveins: $w0, $w1, $x0159 ; CHECK-NEXT: {{ $}}160 ; CHECK-NEXT: %a:_(s32) = COPY $w0161 ; CHECK-NEXT: %b:_(s32) = COPY $w1162 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), %a(s32), %b163 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF164 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s32), [[DEF]], [[DEF]]165 ; CHECK-NEXT: $x0 = COPY [[SELECT]](s64)166 ; CHECK-NEXT: RET_ReallyLR implicit $x0167 %a:_(s32) = COPY $w0168 %b:_(s32) = COPY $w1169 %cmp:_(s1) = G_ICMP intpred(sgt), %a(s32), %b170 %sel_a:_(s88) = G_IMPLICIT_DEF171 %sel_b:_(s88) = G_IMPLICIT_DEF172 %select:_(s88) = G_SELECT %cmp(s1), %sel_a, %sel_b173 %trunc:_(s64) = G_TRUNC %select174 $x0 = COPY %trunc175 RET_ReallyLR implicit $x0176...177 178# The select condition has already been zero extended to s32, and179# needs a sext_inreg to get a vector boolean.180---181name: scalar_mask_already_promoted_select_s32_v4s32182alignment: 4183tracksRegLiveness: true184body: |185 bb.0:186 liveins: $q0, $w0187 188 ; CHECK-LABEL: name: scalar_mask_already_promoted_select_s32_v4s32189 ; CHECK: liveins: $q0, $w0190 ; CHECK-NEXT: {{ $}}191 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0192 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q0193 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4100194 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00195 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)196 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]197 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ICMP]], 1198 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SEXT_INREG]](s32)199 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF200 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0201 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY2]](s32), [[C2]](s64)202 ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<4 x s32>) = G_SHUFFLE_VECTOR [[IVEC]](<4 x s32>), [[DEF]], shufflemask(0, 0, 0, 0)203 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1204 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32)205 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<4 x s32>) = G_XOR [[SHUF]], [[BUILD_VECTOR1]]206 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s32>) = G_AND [[COPY1]], [[SHUF]]207 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<4 x s32>) = G_AND [[BUILD_VECTOR]], [[XOR]]208 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<4 x s32>) = G_OR [[AND]], [[AND1]]209 ; CHECK-NEXT: $q0 = COPY [[OR]](<4 x s32>)210 ; CHECK-NEXT: RET_ReallyLR implicit $q0211 %0:_(s32) = COPY $w0212 %1:_(<4 x s32>) = COPY $q0213 %2:_(s32) = G_CONSTANT i32 4100214 %6:_(s32) = G_FCONSTANT float 0.000000e+00215 %5:_(<4 x s32>) = G_BUILD_VECTOR %6(s32), %6(s32), %6(s32), %6(s32)216 %3:_(s32) = G_ICMP intpred(eq), %0(s32), %2217 %4:_(<4 x s32>) = G_SELECT %3(s32), %1, %5218 $q0 = COPY %4(<4 x s32>)219 RET_ReallyLR implicit $q0220 221...222 223# The scalar select condition was zero extended to s32, to a different224# type from the vector width. It needs to be sign extended inreg, and225# then sign extended to the full element width.226 227---228name: scalar_mask_select_s32_v4s64229alignment: 4230tracksRegLiveness: true231body: |232 bb.0:233 liveins: $q0, $w0234 235 ; CHECK-LABEL: name: scalar_mask_select_s32_v4s64236 ; CHECK: liveins: $q0, $w0237 ; CHECK-NEXT: {{ $}}238 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0239 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q0240 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4100241 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00242 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C1]](s64), [[C1]](s64)243 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]244 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ICMP]], 1245 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXT_INREG]](s32)246 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF247 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0248 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[SEXT]](s64), [[C2]](s64)249 ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<2 x s64>) = G_SHUFFLE_VECTOR [[IVEC]](<2 x s64>), [[DEF]], shufflemask(0, 0)250 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1251 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C3]](s64), [[C3]](s64)252 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[SHUF]], [[BUILD_VECTOR1]]253 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s64>) = G_AND [[COPY1]], [[SHUF]]254 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<2 x s64>) = G_AND [[BUILD_VECTOR]], [[XOR]]255 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s64>) = G_OR [[AND]], [[AND1]]256 ; CHECK-NEXT: $q0 = COPY [[OR]](<2 x s64>)257 ; CHECK-NEXT: RET_ReallyLR implicit $q0258 %0:_(s32) = COPY $w0259 %1:_(<2 x s64>) = COPY $q0260 %2:_(s32) = G_CONSTANT i32 4100261 %6:_(s64) = G_FCONSTANT double 0.000000e+00262 %5:_(<2 x s64>) = G_BUILD_VECTOR %6, %6263 %3:_(s32) = G_ICMP intpred(eq), %0(s32), %2264 %4:_(<2 x s64>) = G_SELECT %3(s32), %1, %5265 $q0 = COPY %4266 RET_ReallyLR implicit $q0267 268...269 270# Check degenerate case where the selected element size is the same as271# the condition bitwidth.272---273name: select_v4s1_s1274alignment: 4275tracksRegLiveness: true276body: |277 bb.0:278 liveins: $q0, $q1, $q2, $w0279 280 ; CHECK-LABEL: name: select_v4s1_s1281 ; CHECK: liveins: $q0, $q1, $q2, $w0282 ; CHECK-NEXT: {{ $}}283 ; CHECK-NEXT: %w0:_(s32) = COPY $w0284 ; CHECK-NEXT: %q0:_(<4 x s32>) = COPY $q0285 ; CHECK-NEXT: %q1:_(<4 x s32>) = COPY $q1286 ; CHECK-NEXT: %q2:_(<4 x s32>) = COPY $q2287 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(eq), %q0(<4 x s32>), %q1288 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(eq), %q0(<4 x s32>), %q2289 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4100290 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %w0(s32), [[C]]291 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ICMP2]], 1292 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF293 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF294 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0295 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SEXT_INREG]](s32)296 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s16>) = G_INSERT_VECTOR_ELT [[DEF1]], [[TRUNC]](s16), [[C1]](s64)297 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[IVEC]](<4 x s16>)298 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[UV]](s16)299 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[UV1]](s16)300 ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(s8) = G_TRUNC [[UV2]](s16)301 ; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s8) = G_TRUNC [[UV3]](s16)302 ; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF303 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[TRUNC1]](s8), [[TRUNC2]](s8), [[TRUNC3]](s8), [[TRUNC4]](s8), [[DEF2]](s8), [[DEF2]](s8), [[DEF2]](s8), [[DEF2]](s8)304 ; CHECK-NEXT: [[TRUNC5:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s16)305 ; CHECK-NEXT: [[TRUNC6:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s16)306 ; CHECK-NEXT: [[TRUNC7:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s16)307 ; CHECK-NEXT: [[TRUNC8:%[0-9]+]]:_(s8) = G_TRUNC [[DEF]](s16)308 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[TRUNC5]](s8), [[TRUNC6]](s8), [[TRUNC7]](s8), [[TRUNC8]](s8), [[DEF2]](s8), [[DEF2]](s8), [[DEF2]](s8), [[DEF2]](s8)309 ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<8 x s8>) = G_SHUFFLE_VECTOR [[BUILD_VECTOR]](<8 x s8>), [[BUILD_VECTOR1]], shufflemask(0, 0, 0, 0, undef, undef, undef, undef)310 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s8) = G_CONSTANT i8 1311 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[SHUF]](<8 x s8>)312 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(<4 x s16>), [[UV5:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES [[ANYEXT]](<8 x s16>)313 ; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[DEF2]](s8), [[DEF2]](s8), [[DEF2]](s8), [[DEF2]](s8)314 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[BUILD_VECTOR2]](<8 x s8>)315 ; CHECK-NEXT: [[UV6:%[0-9]+]]:_(<4 x s16>), [[UV7:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES [[ANYEXT1]](<8 x s16>)316 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<4 x s16>) = G_XOR [[UV4]], [[UV6]]317 ; CHECK-NEXT: [[TRUNC9:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[ICMP]](<4 x s32>)318 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[SHUF]](<8 x s8>)319 ; CHECK-NEXT: [[UV8:%[0-9]+]]:_(<4 x s16>), [[UV9:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES [[ANYEXT2]](<8 x s16>)320 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<4 x s16>) = G_AND [[TRUNC9]], [[UV8]]321 ; CHECK-NEXT: [[TRUNC10:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[ICMP1]](<4 x s32>)322 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<4 x s16>) = G_AND [[TRUNC10]], [[XOR]]323 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<4 x s16>) = G_OR [[AND]], [[AND1]]324 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(<4 x s32>) = G_ANYEXT [[OR]](<4 x s16>)325 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1326 ; CHECK-NEXT: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C3]](s32), [[C3]](s32), [[C3]](s32), [[C3]](s32)327 ; CHECK-NEXT: %zext_select:_(<4 x s32>) = G_AND [[ANYEXT3]], [[BUILD_VECTOR3]]328 ; CHECK-NEXT: $q0 = COPY %zext_select(<4 x s32>)329 ; CHECK-NEXT: RET_ReallyLR implicit $q0330 %w0:_(s32) = COPY $w0331 %q0:_(<4 x s32>) = COPY $q0332 %q1:_(<4 x s32>) = COPY $q1333 %q2:_(<4 x s32>) = COPY $q2334 %vec_cond0:_(<4 x s1>) = G_ICMP intpred(eq), %q0, %q1335 %vec_cond1:_(<4 x s1>) = G_ICMP intpred(eq), %q0, %q2336 %2:_(s32) = G_CONSTANT i32 4100337 %6:_(s32) = G_FCONSTANT float 0.000000e+00338 %5:_(<4 x s32>) = G_BUILD_VECTOR %6(s32), %6(s32), %6(s32), %6(s32)339 %cmp:_(s1) = G_ICMP intpred(eq), %w0, %2340 %select:_(<4 x s1>) = G_SELECT %cmp, %vec_cond0, %vec_cond1341 %zext_select:_(<4 x s32>) = G_ZEXT %select342 $q0 = COPY %zext_select343 RET_ReallyLR implicit $q0344 345...346---347name: lower_select_vec_ptr348liveins:349 - { reg: '$x0' }350 - { reg: '$q0' }351body: |352 bb.1:353 liveins: $q0, $x0354 355 ; CHECK-LABEL: name: lower_select_vec_ptr356 ; CHECK: liveins: $q0, $x0357 ; CHECK-NEXT: {{ $}}358 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0359 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x p0>) = COPY $q0360 ; CHECK-NEXT: [[C:%[0-9]+]]:_(p0) = G_CONSTANT i64 0361 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[C]](p0), [[C]](p0)362 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](p0), [[C]]363 ; CHECK-NEXT: [[PTRTOINT:%[0-9]+]]:_(<2 x s64>) = G_PTRTOINT [[COPY1]](<2 x p0>)364 ; CHECK-NEXT: [[PTRTOINT1:%[0-9]+]]:_(<2 x s64>) = G_PTRTOINT [[BUILD_VECTOR]](<2 x p0>)365 ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ICMP]], 1366 ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[SEXT_INREG]](s32)367 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF368 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0369 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[SEXT]](s64), [[C1]](s64)370 ; CHECK-NEXT: [[SHUF:%[0-9]+]]:_(<2 x s64>) = G_SHUFFLE_VECTOR [[IVEC]](<2 x s64>), [[DEF]], shufflemask(0, 0)371 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1372 ; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C2]](s64), [[C2]](s64)373 ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[SHUF]], [[BUILD_VECTOR1]]374 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(<2 x s64>) = G_AND [[PTRTOINT]], [[SHUF]]375 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(<2 x s64>) = G_AND [[PTRTOINT1]], [[XOR]]376 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s64>) = G_OR [[AND]], [[AND1]]377 ; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(<2 x p0>) = G_INTTOPTR [[OR]](<2 x s64>)378 ; CHECK-NEXT: $q0 = COPY [[INTTOPTR]](<2 x p0>)379 ; CHECK-NEXT: RET_ReallyLR implicit $q0380 %0:_(p0) = COPY $x0381 %1:_(<2 x p0>) = COPY $q0382 %2:_(p0) = G_CONSTANT i64 0383 %5:_(<2 x p0>) = G_BUILD_VECTOR %2(p0), %2(p0)384 %3:_(s1) = G_ICMP intpred(eq), %0(p0), %2385 %4:_(<2 x p0>) = G_SELECT %3(s1), %1, %5386 $q0 = COPY %4(<2 x p0>)387 RET_ReallyLR implicit $q0388 389...390