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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -O0 -mtriple=arm64-unknown-unknown -global-isel -run-pass=legalizer -global-isel-abort=2 %s -o - | FileCheck %s3 4---5name: xtn_v2i64_v2i86alignment: 47tracksRegLiveness: true8body: |9 bb.0:10 liveins: $q011 12 ; CHECK-LABEL: name: xtn_v2i64_v2i813 ; CHECK: liveins: $q014 ; CHECK-NEXT: {{ $}}15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q016 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY]](<2 x s64>)17 ; CHECK-NEXT: $d0 = COPY [[TRUNC]](<2 x s32>)18 ; CHECK-NEXT: RET_ReallyLR implicit $d019 %0:_(<2 x s64>) = COPY $q020 %1:_(<2 x s8>) = G_TRUNC %0(<2 x s64>)21 %2:_(<2 x s32>) = G_ANYEXT %1(<2 x s8>)22 $d0 = COPY %2(<2 x s32>)23 RET_ReallyLR implicit $d024 25...26 27---28name: xtn_v2i128_v2i829alignment: 430tracksRegLiveness: true31body: |32 bb.0:33 liveins: $x0, $x1, $x2, $x334 35 ; CHECK-LABEL: name: xtn_v2i128_v2i836 ; CHECK: liveins: $x0, $x1, $x2, $x337 ; CHECK-NEXT: {{ $}}38 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x039 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x240 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)41 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR]](<2 x s64>)42 ; CHECK-NEXT: $d0 = COPY [[TRUNC]](<2 x s32>)43 ; CHECK-NEXT: RET_ReallyLR implicit $d044 %1:_(s64) = COPY $x045 %2:_(s64) = COPY $x146 %3:_(s64) = COPY $x247 %4:_(s64) = COPY $x348 %5:_(s128) = G_MERGE_VALUES %1(s64), %2(s64)49 %6:_(s128) = G_MERGE_VALUES %3(s64), %4(s64)50 %0:_(<2 x s128>) = G_BUILD_VECTOR %5(s128), %6(s128)51 %7:_(<2 x s8>) = G_TRUNC %0(<2 x s128>)52 %8:_(<2 x s32>) = G_ANYEXT %7(<2 x s8>)53 $d0 = COPY %8(<2 x s32>)54 RET_ReallyLR implicit $d055 56...57 58---59name: xtn_v2i64_v2i1660alignment: 461tracksRegLiveness: true62body: |63 bb.0:64 liveins: $q065 66 ; CHECK-LABEL: name: xtn_v2i64_v2i1667 ; CHECK: liveins: $q068 ; CHECK-NEXT: {{ $}}69 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q070 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY]](<2 x s64>)71 ; CHECK-NEXT: $d0 = COPY [[TRUNC]](<2 x s32>)72 ; CHECK-NEXT: RET_ReallyLR implicit $d073 %0:_(<2 x s64>) = COPY $q074 %1:_(<2 x s16>) = G_TRUNC %0(<2 x s64>)75 %2:_(<2 x s32>) = G_ANYEXT %1(<2 x s16>)76 $d0 = COPY %2(<2 x s32>)77 RET_ReallyLR implicit $d078 79...80 81---82name: xtn_v2i128_v2i1683alignment: 484tracksRegLiveness: true85body: |86 bb.0:87 liveins: $x0, $x1, $x2, $x388 89 ; CHECK-LABEL: name: xtn_v2i128_v2i1690 ; CHECK: liveins: $x0, $x1, $x2, $x391 ; CHECK-NEXT: {{ $}}92 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x093 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x294 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)95 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR]](<2 x s64>)96 ; CHECK-NEXT: $d0 = COPY [[TRUNC]](<2 x s32>)97 ; CHECK-NEXT: RET_ReallyLR implicit $d098 %1:_(s64) = COPY $x099 %2:_(s64) = COPY $x1100 %3:_(s64) = COPY $x2101 %4:_(s64) = COPY $x3102 %5:_(s128) = G_MERGE_VALUES %1(s64), %2(s64)103 %6:_(s128) = G_MERGE_VALUES %3(s64), %4(s64)104 %0:_(<2 x s128>) = G_BUILD_VECTOR %5(s128), %6(s128)105 %7:_(<2 x s16>) = G_TRUNC %0(<2 x s128>)106 %8:_(<2 x s32>) = G_ANYEXT %7(<2 x s16>)107 $d0 = COPY %8(<2 x s32>)108 RET_ReallyLR implicit $d0109 110...111 112---113name: xtn_v2i128_v2i32114alignment: 4115tracksRegLiveness: true116body: |117 bb.0:118 liveins: $x0, $x1, $x2, $x3119 120 ; CHECK-LABEL: name: xtn_v2i128_v2i32121 ; CHECK: liveins: $x0, $x1, $x2, $x3122 ; CHECK-NEXT: {{ $}}123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0124 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x2125 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)126 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[BUILD_VECTOR]](<2 x s64>)127 ; CHECK-NEXT: $d0 = COPY [[TRUNC]](<2 x s32>)128 ; CHECK-NEXT: RET_ReallyLR implicit $d0129 %1:_(s64) = COPY $x0130 %2:_(s64) = COPY $x1131 %3:_(s64) = COPY $x2132 %4:_(s64) = COPY $x3133 %5:_(s128) = G_MERGE_VALUES %1(s64), %2(s64)134 %6:_(s128) = G_MERGE_VALUES %3(s64), %4(s64)135 %0:_(<2 x s128>) = G_BUILD_VECTOR %5(s128), %6(s128)136 %7:_(<2 x s32>) = G_TRUNC %0(<2 x s128>)137 $d0 = COPY %7(<2 x s32>)138 RET_ReallyLR implicit $d0139 140...141 142---143name: xtn_v2i128_v2i64144alignment: 4145tracksRegLiveness: true146body: |147 bb.0:148 liveins: $x0, $x1, $x2, $x3149 150 ; CHECK-LABEL: name: xtn_v2i128_v2i64151 ; CHECK: liveins: $x0, $x1, $x2, $x3152 ; CHECK-NEXT: {{ $}}153 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0154 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x2155 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)156 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s64>) = COPY [[BUILD_VECTOR]](<2 x s64>)157 ; CHECK-NEXT: $q0 = COPY [[COPY2]](<2 x s64>)158 ; CHECK-NEXT: RET_ReallyLR implicit $q0159 %1:_(s64) = COPY $x0160 %2:_(s64) = COPY $x1161 %3:_(s64) = COPY $x2162 %4:_(s64) = COPY $x3163 %5:_(s128) = G_MERGE_VALUES %1(s64), %2(s64)164 %6:_(s128) = G_MERGE_VALUES %3(s64), %4(s64)165 %0:_(<2 x s128>) = G_BUILD_VECTOR %5(s128), %6(s128)166 %7:_(<2 x s64>) = G_TRUNC %0(<2 x s128>)167 $q0 = COPY %7(<2 x s64>)168 RET_ReallyLR implicit $q0169 170...171 172---173name: xtn_v3i16_v3i8174alignment: 4175tracksRegLiveness: true176body: |177 bb.0:178 liveins: $d0179 180 ; CHECK-LABEL: name: xtn_v3i16_v3i8181 ; CHECK: liveins: $d0182 ; CHECK-NEXT: {{ $}}183 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0184 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<4 x s16>)185 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s16)186 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s16)187 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s16)188 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)189 ; CHECK-NEXT: $w1 = COPY [[ANYEXT1]](s32)190 ; CHECK-NEXT: $w2 = COPY [[ANYEXT2]](s32)191 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w2192 %1:_(<4 x s16>) = COPY $d0193 %2:_(s16), %3:_(s16), %4:_(s16), %5:_(s16) = G_UNMERGE_VALUES %1(<4 x s16>)194 %0:_(<3 x s16>) = G_BUILD_VECTOR %2(s16), %3(s16), %4(s16)195 %6:_(<3 x s8>) = G_TRUNC %0(<3 x s16>)196 %10:_(s8), %11:_(s8), %12:_(s8) = G_UNMERGE_VALUES %6(<3 x s8>)197 %7:_(s32) = G_ANYEXT %10(s8)198 %8:_(s32) = G_ANYEXT %11(s8)199 %9:_(s32) = G_ANYEXT %12(s8)200 $w0 = COPY %7(s32)201 $w1 = COPY %8(s32)202 $w2 = COPY %9(s32)203 RET_ReallyLR implicit $w0, implicit $w1, implicit $w2204 205...206 207---208name: xtn_v3i32_v3i8209alignment: 4210tracksRegLiveness: true211body: |212 bb.0:213 liveins: $q0214 215 ; CHECK-LABEL: name: xtn_v3i32_v3i8216 ; CHECK: liveins: $q0217 ; CHECK-NEXT: {{ $}}218 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0219 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)220 ; CHECK-NEXT: $w0 = COPY [[UV]](s32)221 ; CHECK-NEXT: $w1 = COPY [[UV1]](s32)222 ; CHECK-NEXT: $w2 = COPY [[UV2]](s32)223 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w2224 %1:_(<4 x s32>) = COPY $q0225 %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %1(<4 x s32>)226 %0:_(<3 x s32>) = G_BUILD_VECTOR %2(s32), %3(s32), %4(s32)227 %6:_(<3 x s8>) = G_TRUNC %0(<3 x s32>)228 %10:_(s8), %11:_(s8), %12:_(s8) = G_UNMERGE_VALUES %6(<3 x s8>)229 %7:_(s32) = G_ANYEXT %10(s8)230 %8:_(s32) = G_ANYEXT %11(s8)231 %9:_(s32) = G_ANYEXT %12(s8)232 $w0 = COPY %7(s32)233 $w1 = COPY %8(s32)234 $w2 = COPY %9(s32)235 RET_ReallyLR implicit $w0, implicit $w1, implicit $w2236 237...238 239---240name: xtn_v3i64_v3i8241alignment: 4242tracksRegLiveness: true243body: |244 bb.0:245 liveins: $d0, $d1, $d2246 247 ; CHECK-LABEL: name: xtn_v3i64_v3i8248 ; CHECK: liveins: $d0, $d1, $d2249 ; CHECK-NEXT: {{ $}}250 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0251 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $d1252 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $d2253 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)254 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)255 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)256 ; CHECK-NEXT: $w0 = COPY [[TRUNC]](s32)257 ; CHECK-NEXT: $w1 = COPY [[TRUNC1]](s32)258 ; CHECK-NEXT: $w2 = COPY [[TRUNC2]](s32)259 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w2260 %1:_(s64) = COPY $d0261 %2:_(s64) = COPY $d1262 %3:_(s64) = COPY $d2263 %0:_(<3 x s64>) = G_BUILD_VECTOR %1(s64), %2(s64), %3(s64)264 %4:_(<3 x s8>) = G_TRUNC %0(<3 x s64>)265 %8:_(s8), %9:_(s8), %10:_(s8) = G_UNMERGE_VALUES %4(<3 x s8>)266 %5:_(s32) = G_ANYEXT %8(s8)267 %6:_(s32) = G_ANYEXT %9(s8)268 %7:_(s32) = G_ANYEXT %10(s8)269 $w0 = COPY %5(s32)270 $w1 = COPY %6(s32)271 $w2 = COPY %7(s32)272 RET_ReallyLR implicit $w0, implicit $w1, implicit $w2273 274...275 276---277name: xtn_v3i64_v3i16278alignment: 4279tracksRegLiveness: true280body: |281 bb.0:282 liveins: $d0, $d1, $d2283 284 ; CHECK-LABEL: name: xtn_v3i64_v3i16285 ; CHECK: liveins: $d0, $d1, $d2286 ; CHECK-NEXT: {{ $}}287 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0288 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $d1289 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $d2290 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)291 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)292 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s64)293 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF294 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[DEF]](s16)295 ; CHECK-NEXT: $d0 = COPY [[BUILD_VECTOR]](<4 x s16>)296 ; CHECK-NEXT: RET_ReallyLR implicit $d0297 %1:_(s64) = COPY $d0298 %2:_(s64) = COPY $d1299 %3:_(s64) = COPY $d2300 %0:_(<3 x s64>) = G_BUILD_VECTOR %1(s64), %2(s64), %3(s64)301 %4:_(<3 x s16>) = G_TRUNC %0(<3 x s64>)302 %5:_(s16), %6:_(s16), %7:_(s16) = G_UNMERGE_VALUES %4(<3 x s16>)303 %8:_(s16) = G_IMPLICIT_DEF304 %9:_(<4 x s16>) = G_BUILD_VECTOR %5(s16), %6(s16), %7(s16), %8(s16)305 $d0 = COPY %9(<4 x s16>)306 RET_ReallyLR implicit $d0307 308...309 310---311name: xtn_v3i64_v3i32312alignment: 4313tracksRegLiveness: true314body: |315 bb.0:316 liveins: $d0, $d1, $d2317 318 ; CHECK-LABEL: name: xtn_v3i64_v3i32319 ; CHECK: liveins: $d0, $d1, $d2320 ; CHECK-NEXT: {{ $}}321 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $d0322 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $d1323 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $d2324 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)325 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)326 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)327 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF328 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[TRUNC]](s32), [[TRUNC1]](s32), [[TRUNC2]](s32), [[DEF]](s32)329 ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<4 x s32>)330 ; CHECK-NEXT: RET_ReallyLR implicit $q0331 %1:_(s64) = COPY $d0332 %2:_(s64) = COPY $d1333 %3:_(s64) = COPY $d2334 %0:_(<3 x s64>) = G_BUILD_VECTOR %1(s64), %2(s64), %3(s64)335 %4:_(<3 x s32>) = G_TRUNC %0(<3 x s64>)336 %5:_(s32), %6:_(s32), %7:_(s32) = G_UNMERGE_VALUES %4(<3 x s32>)337 %8:_(s32) = G_IMPLICIT_DEF338 %9:_(<4 x s32>) = G_BUILD_VECTOR %5(s32), %6(s32), %7(s32), %8(s32)339 $q0 = COPY %9(<4 x s32>)340 RET_ReallyLR implicit $q0341 342...343 344---345name: xtn_v4i32_v4i8346alignment: 4347tracksRegLiveness: true348body: |349 bb.0:350 liveins: $q0351 352 ; CHECK-LABEL: name: xtn_v4i32_v4i8353 ; CHECK: liveins: $q0354 ; CHECK-NEXT: {{ $}}355 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0356 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[COPY]](<4 x s32>)357 ; CHECK-NEXT: $d0 = COPY [[TRUNC]](<4 x s16>)358 ; CHECK-NEXT: RET_ReallyLR implicit $d0359 %0:_(<4 x s32>) = COPY $q0360 %1:_(<4 x s8>) = G_TRUNC %0(<4 x s32>)361 %2:_(<4 x s16>) = G_ANYEXT %1(<4 x s8>)362 $d0 = COPY %2(<4 x s16>)363 RET_ReallyLR implicit $d0364 365...366 367---368name: xtn_v4i64_v4i8369alignment: 4370tracksRegLiveness: true371body: |372 bb.0:373 liveins: $q0, $q1374 375 ; CHECK-LABEL: name: xtn_v4i64_v4i8376 ; CHECK: liveins: $q0, $q1377 ; CHECK-NEXT: {{ $}}378 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0379 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1380 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY]](<2 x s64>)381 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY1]](<2 x s64>)382 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)383 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s32>)384 ; CHECK-NEXT: $d0 = COPY [[TRUNC2]](<4 x s16>)385 ; CHECK-NEXT: RET_ReallyLR implicit $d0386 %1:_(<2 x s64>) = COPY $q0387 %2:_(<2 x s64>) = COPY $q1388 %0:_(<4 x s64>) = G_CONCAT_VECTORS %1(<2 x s64>), %2(<2 x s64>)389 %3:_(<4 x s8>) = G_TRUNC %0(<4 x s64>)390 %4:_(<4 x s16>) = G_ANYEXT %3(<4 x s8>)391 $d0 = COPY %4(<4 x s16>)392 RET_ReallyLR implicit $d0393 394...395 396---397name: xtn_v4i64_v4i16398alignment: 4399tracksRegLiveness: true400body: |401 bb.0:402 liveins: $q0, $q1403 404 ; CHECK-LABEL: name: xtn_v4i64_v4i16405 ; CHECK: liveins: $q0, $q1406 ; CHECK-NEXT: {{ $}}407 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0408 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1409 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY]](<2 x s64>)410 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY1]](<2 x s64>)411 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)412 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s32>)413 ; CHECK-NEXT: $d0 = COPY [[TRUNC2]](<4 x s16>)414 ; CHECK-NEXT: RET_ReallyLR implicit $d0415 %1:_(<2 x s64>) = COPY $q0416 %2:_(<2 x s64>) = COPY $q1417 %0:_(<4 x s64>) = G_CONCAT_VECTORS %1(<2 x s64>), %2(<2 x s64>)418 %3:_(<4 x s16>) = G_TRUNC %0(<4 x s64>)419 $d0 = COPY %3(<4 x s16>)420 RET_ReallyLR implicit $d0421 422...423 424---425name: xtn_v4i64_v4i32426alignment: 4427tracksRegLiveness: true428body: |429 bb.0:430 liveins: $q0, $q1431 432 ; CHECK-LABEL: name: xtn_v4i64_v4i32433 ; CHECK: liveins: $q0, $q1434 ; CHECK-NEXT: {{ $}}435 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0436 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1437 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY]](<2 x s64>)438 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[COPY1]](<2 x s64>)439 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)440 ; CHECK-NEXT: $q0 = COPY [[CONCAT_VECTORS]](<4 x s32>)441 ; CHECK-NEXT: RET_ReallyLR implicit $q0442 %1:_(<2 x s64>) = COPY $q0443 %2:_(<2 x s64>) = COPY $q1444 %0:_(<4 x s64>) = G_CONCAT_VECTORS %1(<2 x s64>), %2(<2 x s64>)445 %3:_(<4 x s32>) = G_TRUNC %0(<4 x s64>)446 $q0 = COPY %3(<4 x s32>)447 RET_ReallyLR implicit $q0448 449...450 451---452name: xtn_v8i32_v8i8453alignment: 4454tracksRegLiveness: true455body: |456 bb.0:457 liveins: $q0, $q1458 459 ; CHECK-LABEL: name: xtn_v8i32_v8i8460 ; CHECK: liveins: $q0, $q1461 ; CHECK-NEXT: {{ $}}462 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0463 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1464 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[COPY]](<4 x s32>)465 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[COPY1]](<4 x s32>)466 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s16>), [[TRUNC1]](<4 x s16>)467 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(<8 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<8 x s16>)468 ; CHECK-NEXT: $d0 = COPY [[TRUNC2]](<8 x s8>)469 ; CHECK-NEXT: RET_ReallyLR implicit $d0470 %1:_(<4 x s32>) = COPY $q0471 %2:_(<4 x s32>) = COPY $q1472 %0:_(<8 x s32>) = G_CONCAT_VECTORS %1(<4 x s32>), %2(<4 x s32>)473 %3:_(<8 x s8>) = G_TRUNC %0(<8 x s32>)474 $d0 = COPY %3(<8 x s8>)475 RET_ReallyLR implicit $d0476 477...478 479---480name: xtn_v8i32_v8i16481alignment: 4482tracksRegLiveness: true483body: |484 bb.0:485 liveins: $q0, $q1486 487 ; CHECK-LABEL: name: xtn_v8i32_v8i16488 ; CHECK: liveins: $q0, $q1489 ; CHECK-NEXT: {{ $}}490 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0491 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1492 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[COPY]](<4 x s32>)493 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[COPY1]](<4 x s32>)494 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s16>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s16>), [[TRUNC1]](<4 x s16>)495 ; CHECK-NEXT: $q0 = COPY [[CONCAT_VECTORS]](<8 x s16>)496 ; CHECK-NEXT: RET_ReallyLR implicit $q0497 %1:_(<4 x s32>) = COPY $q0498 %2:_(<4 x s32>) = COPY $q1499 %0:_(<8 x s32>) = G_CONCAT_VECTORS %1(<4 x s32>), %2(<4 x s32>)500 %3:_(<8 x s16>) = G_TRUNC %0(<8 x s32>)501 $q0 = COPY %3(<8 x s16>)502 RET_ReallyLR implicit $q0503 504...505 506---507name: xtn_v16i16_v16i8508alignment: 4509tracksRegLiveness: true510body: |511 bb.0:512 liveins: $q0, $q1513 514 ; CHECK-LABEL: name: xtn_v16i16_v16i8515 ; CHECK: liveins: $q0, $q1516 ; CHECK-NEXT: {{ $}}517 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0518 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $q1519 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<8 x s8>) = G_TRUNC [[COPY]](<8 x s16>)520 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<8 x s8>) = G_TRUNC [[COPY1]](<8 x s16>)521 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<8 x s8>), [[TRUNC1]](<8 x s8>)522 ; CHECK-NEXT: $q0 = COPY [[CONCAT_VECTORS]](<16 x s8>)523 ; CHECK-NEXT: RET_ReallyLR implicit $q0524 %1:_(<8 x s16>) = COPY $q0525 %2:_(<8 x s16>) = COPY $q1526 %0:_(<16 x s16>) = G_CONCAT_VECTORS %1(<8 x s16>), %2(<8 x s16>)527 %3:_(<16 x s8>) = G_TRUNC %0(<16 x s16>)528 $q0 = COPY %3(<16 x s8>)529 RET_ReallyLR implicit $q0530 531...532 533---534name: pr81244535tracksRegLiveness: true536body: |537 bb.0:538 liveins: $d0539 ; CHECK-LABEL: name: pr81244540 ; CHECK: liveins: $d0541 ; CHECK-NEXT: {{ $}}542 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0543 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)544 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[UV]](s32)545 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[UV1]](s32)546 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s8) = G_IMPLICIT_DEF547 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR [[TRUNC]](s8), [[TRUNC1]](s8), [[TRUNC]](s8), [[TRUNC1]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8), [[DEF]](s8)548 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[BUILD_VECTOR]](<8 x s8>)549 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<4 x s16>), [[UV3:%[0-9]+]]:_(<4 x s16>) = G_UNMERGE_VALUES [[ANYEXT]](<8 x s16>)550 ; CHECK-NEXT: $d0 = COPY [[UV2]](<4 x s16>)551 ; CHECK-NEXT: RET_ReallyLR implicit $d0552 %0:_(<2 x s32>) = COPY $d0553 %1:_(<2 x s8>) = G_TRUNC %0(<2 x s32>)554 %2:_(<4 x s8>) = G_CONCAT_VECTORS %1(<2 x s8>), %1(<2 x s8>)555 %3:_(<4 x s16>) = G_ANYEXT %2(<4 x s8>)556 $d0 = COPY %3(<4 x s16>)557 RET_ReallyLR implicit $d0558 559...560