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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s3 4...5---6name: sextload7legalized: true8tracksRegLiveness: true9body: |10 bb.0.entry:11 liveins: $x012 13 ; CHECK-LABEL: name: sextload14 ; CHECK: liveins: $x015 ; CHECK-NEXT: {{ $}}16 ; CHECK-NEXT: %x0:_(p0) = COPY $x017 ; CHECK-NEXT: %sextload:_(s32) = G_SEXTLOAD %x0(p0) :: (load (s16))18 ; CHECK-NEXT: $w0 = COPY %sextload(s32)19 %x0:_(p0) = COPY $x020 %sextload:_(s32) = G_SEXTLOAD %x0:_(p0) :: (load (s16))21 %sext_inreg:_(s32) = G_SEXT_INREG %sextload:_(s32), 2422 $w0 = COPY %sext_inreg(s32)23...24---25name: assert_sext26legalized: true27tracksRegLiveness: true28body: |29 bb.0.entry:30 liveins: $w031 ; The G_ASSERT_SEXT says we already sign extended from 24 bits, so the32 ; G_SEXT_INREG is not necessary.33 34 ; CHECK-LABEL: name: assert_sext35 ; CHECK: liveins: $w036 ; CHECK-NEXT: {{ $}}37 ; CHECK-NEXT: %w0:_(s32) = COPY $w038 ; CHECK-NEXT: %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 2439 ; CHECK-NEXT: $w0 = COPY %assert_sext(s32)40 %w0:_(s32) = COPY $w041 %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 2442 %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext:_(s32), 2443 $w0 = COPY %sext_inreg(s32)44...45---46name: assert_sext_greater_width47legalized: true48tracksRegLiveness: true49body: |50 bb.0.entry:51 liveins: $w052 ; The G_ASSERT_SEXT is from a wider width than the G_SEXT_INREG, so we53 ; can't eliminate it.54 55 ; CHECK-LABEL: name: assert_sext_greater_width56 ; CHECK: liveins: $w057 ; CHECK-NEXT: {{ $}}58 ; CHECK-NEXT: %w0:_(s32) = COPY $w059 ; CHECK-NEXT: %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 2460 ; CHECK-NEXT: %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext, 1261 ; CHECK-NEXT: $w0 = COPY %sext_inreg(s32)62 %w0:_(s32) = COPY $w063 %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 2464 %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext:_(s32), 1265 $w0 = COPY %sext_inreg(s32)66...67---68name: assert_sext_smaller_width69legalized: true70tracksRegLiveness: true71body: |72 bb.0.entry:73 liveins: $w074 ; The G_ASSERT_SEXT is from a smaller width, so the G_SEXT_INREG is not75 ; necessary.76 77 ; CHECK-LABEL: name: assert_sext_smaller_width78 ; CHECK: liveins: $w079 ; CHECK-NEXT: {{ $}}80 ; CHECK-NEXT: %w0:_(s32) = COPY $w081 ; CHECK-NEXT: %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 882 ; CHECK-NEXT: $w0 = COPY %assert_sext(s32)83 %w0:_(s32) = COPY $w084 %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 885 %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext:_(s32), 1286 $w0 = COPY %sext_inreg(s32)87...88