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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=LOWER3# RUN: llc -mtriple=aarch64 -global-isel -start-before=aarch64-postlegalizer-lowering -stop-after=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=SELECT4 5# Verify that we will adjust the constant + predicate of a compare when it will6# allow us to fold an immediate into a compare.7...8---9name: slt_to_sle_s3210legalized: true11tracksRegLiveness: true12body: |13 bb.0:14 liveins: $w015 16 ; x slt c => x sle c - 117 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a18 ; left shift.19 20 ; LOWER-LABEL: name: slt_to_sle_s3221 ; LOWER: liveins: $w022 ; LOWER-NEXT: {{ $}}23 ; LOWER-NEXT: %reg:_(s32) = COPY $w024 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 409625 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sle), %reg(s32), [[C]]26 ; LOWER-NEXT: $w0 = COPY %cmp(s32)27 ; LOWER-NEXT: RET_ReallyLR implicit $w028 ;29 ; SELECT-LABEL: name: slt_to_sle_s3230 ; SELECT: liveins: $w031 ; SELECT-NEXT: {{ $}}32 ; SELECT-NEXT: %reg:gpr32sp = COPY $w033 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv34 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv35 ; SELECT-NEXT: $w0 = COPY %cmp36 ; SELECT-NEXT: RET_ReallyLR implicit $w037 %reg:_(s32) = COPY $w038 %cst:_(s32) = G_CONSTANT i32 409739 %cmp:_(s32) = G_ICMP intpred(slt), %reg(s32), %cst40 $w0 = COPY %cmp(s32)41 RET_ReallyLR implicit $w042 43...44---45name: slt_to_sle_s6446legalized: true47tracksRegLiveness: true48body: |49 bb.0:50 liveins: $x051 52 ; x slt c => x sle c - 153 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a54 ; left shift.55 56 ; LOWER-LABEL: name: slt_to_sle_s6457 ; LOWER: liveins: $x058 ; LOWER-NEXT: {{ $}}59 ; LOWER-NEXT: %reg:_(s64) = COPY $x060 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 409661 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sle), %reg(s64), [[C]]62 ; LOWER-NEXT: $w0 = COPY %cmp(s32)63 ; LOWER-NEXT: RET_ReallyLR implicit $w064 ;65 ; SELECT-LABEL: name: slt_to_sle_s6466 ; SELECT: liveins: $x067 ; SELECT-NEXT: {{ $}}68 ; SELECT-NEXT: %reg:gpr64sp = COPY $x069 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 1, 12, implicit-def $nzcv70 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv71 ; SELECT-NEXT: $w0 = COPY %cmp72 ; SELECT-NEXT: RET_ReallyLR implicit $w073 %reg:_(s64) = COPY $x074 %cst:_(s64) = G_CONSTANT i64 409775 %cmp:_(s32) = G_ICMP intpred(slt), %reg(s64), %cst76 $w0 = COPY %cmp(s32)77 RET_ReallyLR implicit $w078 79...80---81name: sge_to_sgt_s3282legalized: true83tracksRegLiveness: true84body: |85 bb.0:86 liveins: $w087 88 ; x sge c => x sgt c - 189 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a90 ; left shift.91 92 ; LOWER-LABEL: name: sge_to_sgt_s3293 ; LOWER: liveins: $w094 ; LOWER-NEXT: {{ $}}95 ; LOWER-NEXT: %reg:_(s32) = COPY $w096 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 409697 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sgt), %reg(s32), [[C]]98 ; LOWER-NEXT: $w0 = COPY %cmp(s32)99 ; LOWER-NEXT: RET_ReallyLR implicit $w0100 ;101 ; SELECT-LABEL: name: sge_to_sgt_s32102 ; SELECT: liveins: $w0103 ; SELECT-NEXT: {{ $}}104 ; SELECT-NEXT: %reg:gpr32sp = COPY $w0105 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv106 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv107 ; SELECT-NEXT: $w0 = COPY %cmp108 ; SELECT-NEXT: RET_ReallyLR implicit $w0109 %reg:_(s32) = COPY $w0110 %cst:_(s32) = G_CONSTANT i32 4097111 %cmp:_(s32) = G_ICMP intpred(sge), %reg(s32), %cst112 $w0 = COPY %cmp(s32)113 RET_ReallyLR implicit $w0114 115...116---117name: sge_to_sgt_s64118legalized: true119tracksRegLiveness: true120body: |121 bb.0:122 liveins: $x0123 124 ; x sge c => x sgt c - 1125 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a126 ; left shift.127 128 ; LOWER-LABEL: name: sge_to_sgt_s64129 ; LOWER: liveins: $x0130 ; LOWER-NEXT: {{ $}}131 ; LOWER-NEXT: %reg:_(s64) = COPY $x0132 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4096133 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sgt), %reg(s64), [[C]]134 ; LOWER-NEXT: $w0 = COPY %cmp(s32)135 ; LOWER-NEXT: RET_ReallyLR implicit $w0136 ;137 ; SELECT-LABEL: name: sge_to_sgt_s64138 ; SELECT: liveins: $x0139 ; SELECT-NEXT: {{ $}}140 ; SELECT-NEXT: %reg:gpr64sp = COPY $x0141 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 1, 12, implicit-def $nzcv142 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv143 ; SELECT-NEXT: $w0 = COPY %cmp144 ; SELECT-NEXT: RET_ReallyLR implicit $w0145 %reg:_(s64) = COPY $x0146 %cst:_(s64) = G_CONSTANT i64 4097147 %cmp:_(s32) = G_ICMP intpred(sge), %reg(s64), %cst148 $w0 = COPY %cmp(s32)149 RET_ReallyLR implicit $w0150 151...152---153name: ult_to_ule_s32154legalized: true155tracksRegLiveness: true156body: |157 bb.0:158 liveins: $w0159 160 ; x ult c => x ule c - 1161 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a162 ; left shift.163 164 ; LOWER-LABEL: name: ult_to_ule_s32165 ; LOWER: liveins: $w0166 ; LOWER-NEXT: {{ $}}167 ; LOWER-NEXT: %reg:_(s32) = COPY $w0168 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4096169 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(ule), %reg(s32), [[C]]170 ; LOWER-NEXT: $w0 = COPY %cmp(s32)171 ; LOWER-NEXT: RET_ReallyLR implicit $w0172 ;173 ; SELECT-LABEL: name: ult_to_ule_s32174 ; SELECT: liveins: $w0175 ; SELECT-NEXT: {{ $}}176 ; SELECT-NEXT: %reg:gpr32sp = COPY $w0177 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv178 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 8, implicit $nzcv179 ; SELECT-NEXT: $w0 = COPY %cmp180 ; SELECT-NEXT: RET_ReallyLR implicit $w0181 %reg:_(s32) = COPY $w0182 %cst:_(s32) = G_CONSTANT i32 4097183 %cmp:_(s32) = G_ICMP intpred(ult), %reg(s32), %cst184 $w0 = COPY %cmp(s32)185 RET_ReallyLR implicit $w0186 187...188---189name: ult_to_ule_s64190legalized: true191tracksRegLiveness: true192body: |193 bb.0:194 liveins: $x0195 196 ; x ult c => x ule c - 1197 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a198 ; left shift.199 200 ; LOWER-LABEL: name: ult_to_ule_s64201 ; LOWER: liveins: $x0202 ; LOWER-NEXT: {{ $}}203 ; LOWER-NEXT: %reg:_(s64) = COPY $x0204 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4096205 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(ule), %reg(s64), [[C]]206 ; LOWER-NEXT: $w0 = COPY %cmp(s32)207 ; LOWER-NEXT: RET_ReallyLR implicit $w0208 ;209 ; SELECT-LABEL: name: ult_to_ule_s64210 ; SELECT: liveins: $x0211 ; SELECT-NEXT: {{ $}}212 ; SELECT-NEXT: %reg:gpr64sp = COPY $x0213 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 1, 12, implicit-def $nzcv214 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 8, implicit $nzcv215 ; SELECT-NEXT: $w0 = COPY %cmp216 ; SELECT-NEXT: RET_ReallyLR implicit $w0217 %reg:_(s64) = COPY $x0218 %cst:_(s64) = G_CONSTANT i64 4097219 %cmp:_(s32) = G_ICMP intpred(ult), %reg(s64), %cst220 $w0 = COPY %cmp(s32)221 RET_ReallyLR implicit $w0222 223...224---225name: uge_to_ugt_s32226legalized: true227tracksRegLiveness: true228body: |229 bb.0:230 liveins: $w0231 232 ; x uge c => x ugt c - 1233 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a234 ; left shift.235 236 ; LOWER-LABEL: name: uge_to_ugt_s32237 ; LOWER: liveins: $w0238 ; LOWER-NEXT: {{ $}}239 ; LOWER-NEXT: %reg:_(s32) = COPY $w0240 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4096241 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(ugt), %reg(s32), [[C]]242 ; LOWER-NEXT: $w0 = COPY %cmp(s32)243 ; LOWER-NEXT: RET_ReallyLR implicit $w0244 ;245 ; SELECT-LABEL: name: uge_to_ugt_s32246 ; SELECT: liveins: $w0247 ; SELECT-NEXT: {{ $}}248 ; SELECT-NEXT: %reg:gpr32sp = COPY $w0249 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv250 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv251 ; SELECT-NEXT: $w0 = COPY %cmp252 ; SELECT-NEXT: RET_ReallyLR implicit $w0253 %reg:_(s32) = COPY $w0254 %cst:_(s32) = G_CONSTANT i32 4097255 %cmp:_(s32) = G_ICMP intpred(uge), %reg(s32), %cst256 $w0 = COPY %cmp(s32)257 RET_ReallyLR implicit $w0258 259...260---261name: uge_to_ugt_s64262legalized: true263tracksRegLiveness: true264body: |265 bb.0:266 liveins: $x0267 268 ; x uge c => x ugt c - 1269 ; log_2(4096) == 12, so we can represent this as a 12 bit value with a270 ; left shift.271 272 ; LOWER-LABEL: name: uge_to_ugt_s64273 ; LOWER: liveins: $x0274 ; LOWER-NEXT: {{ $}}275 ; LOWER-NEXT: %reg:_(s64) = COPY $x0276 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4096277 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(ugt), %reg(s64), [[C]]278 ; LOWER-NEXT: $w0 = COPY %cmp(s32)279 ; LOWER-NEXT: RET_ReallyLR implicit $w0280 ;281 ; SELECT-LABEL: name: uge_to_ugt_s64282 ; SELECT: liveins: $x0283 ; SELECT-NEXT: {{ $}}284 ; SELECT-NEXT: %reg:gpr64sp = COPY $x0285 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 1, 12, implicit-def $nzcv286 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv287 ; SELECT-NEXT: $w0 = COPY %cmp288 ; SELECT-NEXT: RET_ReallyLR implicit $w0289 %reg:_(s64) = COPY $x0290 %cst:_(s64) = G_CONSTANT i64 4097291 %cmp:_(s32) = G_ICMP intpred(uge), %reg(s64), %cst292 $w0 = COPY %cmp(s32)293 RET_ReallyLR implicit $w0294 295...296---297name: sle_to_slt_s32298legalized: true299tracksRegLiveness: true300body: |301 bb.0:302 liveins: $w0303 304 ; x sle c => x slt c + 1305 ; log_2(8192) == 13, so we can represent this as a 12 bit value with a306 ; left shift.307 ; (We can't use 4095 here, because that's a legal arithmetic immediate.)308 309 ; LOWER-LABEL: name: sle_to_slt_s32310 ; LOWER: liveins: $w0311 ; LOWER-NEXT: {{ $}}312 ; LOWER-NEXT: %reg:_(s32) = COPY $w0313 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8192314 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(slt), %reg(s32), [[C]]315 ; LOWER-NEXT: $w0 = COPY %cmp(s32)316 ; LOWER-NEXT: RET_ReallyLR implicit $w0317 ;318 ; SELECT-LABEL: name: sle_to_slt_s32319 ; SELECT: liveins: $w0320 ; SELECT-NEXT: {{ $}}321 ; SELECT-NEXT: %reg:gpr32sp = COPY $w0322 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 2, 12, implicit-def $nzcv323 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv324 ; SELECT-NEXT: $w0 = COPY %cmp325 ; SELECT-NEXT: RET_ReallyLR implicit $w0326 %reg:_(s32) = COPY $w0327 %cst:_(s32) = G_CONSTANT i32 8191328 %cmp:_(s32) = G_ICMP intpred(sle), %reg(s32), %cst329 $w0 = COPY %cmp(s32)330 RET_ReallyLR implicit $w0331 332...333---334name: sle_to_slt_s64335legalized: true336tracksRegLiveness: true337body: |338 bb.0:339 liveins: $x0340 341 ; x sle c => x slt c + 1342 ; log_2(8192) == 13, so we can represent this as a 12 bit value with a343 ; left shift.344 345 ; LOWER-LABEL: name: sle_to_slt_s64346 ; LOWER: liveins: $x0347 ; LOWER-NEXT: {{ $}}348 ; LOWER-NEXT: %reg:_(s64) = COPY $x0349 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8192350 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(slt), %reg(s64), [[C]]351 ; LOWER-NEXT: $w0 = COPY %cmp(s32)352 ; LOWER-NEXT: RET_ReallyLR implicit $w0353 ;354 ; SELECT-LABEL: name: sle_to_slt_s64355 ; SELECT: liveins: $x0356 ; SELECT-NEXT: {{ $}}357 ; SELECT-NEXT: %reg:gpr64sp = COPY $x0358 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 2, 12, implicit-def $nzcv359 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv360 ; SELECT-NEXT: $w0 = COPY %cmp361 ; SELECT-NEXT: RET_ReallyLR implicit $w0362 %reg:_(s64) = COPY $x0363 %cst:_(s64) = G_CONSTANT i64 8191364 %cmp:_(s32) = G_ICMP intpred(sle), %reg(s64), %cst365 $w0 = COPY %cmp(s32)366 RET_ReallyLR implicit $w0367 368...369---370name: sgt_to_sge_s32371legalized: true372tracksRegLiveness: true373body: |374 bb.0:375 liveins: $w0376 377 ; x sgt c => s sge c + 1378 ; log_2(8192) == 13, so we can represent this as a 12 bit value with a379 ; left shift.380 381 ; LOWER-LABEL: name: sgt_to_sge_s32382 ; LOWER: liveins: $w0383 ; LOWER-NEXT: {{ $}}384 ; LOWER-NEXT: %reg:_(s32) = COPY $w0385 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8192386 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sge), %reg(s32), [[C]]387 ; LOWER-NEXT: $w0 = COPY %cmp(s32)388 ; LOWER-NEXT: RET_ReallyLR implicit $w0389 ;390 ; SELECT-LABEL: name: sgt_to_sge_s32391 ; SELECT: liveins: $w0392 ; SELECT-NEXT: {{ $}}393 ; SELECT-NEXT: %reg:gpr32sp = COPY $w0394 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 2, 12, implicit-def $nzcv395 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv396 ; SELECT-NEXT: $w0 = COPY %cmp397 ; SELECT-NEXT: RET_ReallyLR implicit $w0398 %reg:_(s32) = COPY $w0399 %cst:_(s32) = G_CONSTANT i32 8191400 %cmp:_(s32) = G_ICMP intpred(sgt), %reg(s32), %cst401 $w0 = COPY %cmp(s32)402 RET_ReallyLR implicit $w0403 404...405---406name: sgt_to_sge_s64407legalized: true408tracksRegLiveness: true409body: |410 bb.0:411 liveins: $x0412 413 ; x sgt c => s sge c + 1414 ; log_2(8192) == 13, so we can represent this as a 12 bit value with a415 ; left shift.416 417 ; LOWER-LABEL: name: sgt_to_sge_s64418 ; LOWER: liveins: $x0419 ; LOWER-NEXT: {{ $}}420 ; LOWER-NEXT: %reg:_(s64) = COPY $x0421 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8192422 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sge), %reg(s64), [[C]]423 ; LOWER-NEXT: $w0 = COPY %cmp(s32)424 ; LOWER-NEXT: RET_ReallyLR implicit $w0425 ;426 ; SELECT-LABEL: name: sgt_to_sge_s64427 ; SELECT: liveins: $x0428 ; SELECT-NEXT: {{ $}}429 ; SELECT-NEXT: %reg:gpr64sp = COPY $x0430 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 2, 12, implicit-def $nzcv431 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv432 ; SELECT-NEXT: $w0 = COPY %cmp433 ; SELECT-NEXT: RET_ReallyLR implicit $w0434 %reg:_(s64) = COPY $x0435 %cst:_(s64) = G_CONSTANT i64 8191436 %cmp:_(s32) = G_ICMP intpred(sgt), %reg(s64), %cst437 $w0 = COPY %cmp(s32)438 RET_ReallyLR implicit $w0439 440...441---442name: no_opt_int32_min443legalized: true444tracksRegLiveness: true445body: |446 bb.0:447 liveins: $w0448 449 ; The cmp should not change.450 ; If we subtract 1 from the constant, it will wrap around, and so it's not451 ; true that452 ; x slt c => x sle c - 1453 ; x sge c => x sgt c - 1454 455 ; LOWER-LABEL: name: no_opt_int32_min456 ; LOWER: liveins: $w0457 ; LOWER-NEXT: {{ $}}458 ; LOWER-NEXT: %reg:_(s32) = COPY $w0459 ; LOWER-NEXT: %cst:_(s32) = G_CONSTANT i32 -2147483648460 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(slt), %reg(s32), %cst461 ; LOWER-NEXT: $w0 = COPY %cmp(s32)462 ; LOWER-NEXT: RET_ReallyLR implicit $w0463 ;464 ; SELECT-LABEL: name: no_opt_int32_min465 ; SELECT: liveins: $w0466 ; SELECT-NEXT: {{ $}}467 ; SELECT-NEXT: %reg:gpr32 = COPY $w0468 ; SELECT-NEXT: %cst:gpr32 = MOVi32imm -2147483648469 ; SELECT-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr %reg, %cst, implicit-def $nzcv470 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv471 ; SELECT-NEXT: $w0 = COPY %cmp472 ; SELECT-NEXT: RET_ReallyLR implicit $w0473 %reg:_(s32) = COPY $w0474 %cst:_(s32) = G_CONSTANT i32 -2147483648475 %cmp:_(s32) = G_ICMP intpred(slt), %reg(s32), %cst476 $w0 = COPY %cmp(s32)477 RET_ReallyLR implicit $w0478 479...480---481name: no_opt_int64_min482legalized: true483tracksRegLiveness: true484body: |485 bb.0:486 liveins: $x0487 488 ; The cmp should not change.489 ; If we subtract 1 from the constant, it will wrap around, and so it's not490 ; true that491 ; x slt c => x sle c - 1492 ; x sge c => x sgt c - 1493 494 ; LOWER-LABEL: name: no_opt_int64_min495 ; LOWER: liveins: $x0496 ; LOWER-NEXT: {{ $}}497 ; LOWER-NEXT: %reg:_(s64) = COPY $x0498 ; LOWER-NEXT: %cst:_(s64) = G_CONSTANT i64 -9223372036854775808499 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(slt), %reg(s64), %cst500 ; LOWER-NEXT: $w0 = COPY %cmp(s32)501 ; LOWER-NEXT: RET_ReallyLR implicit $w0502 ;503 ; SELECT-LABEL: name: no_opt_int64_min504 ; SELECT: liveins: $x0505 ; SELECT-NEXT: {{ $}}506 ; SELECT-NEXT: %reg:gpr64 = COPY $x0507 ; SELECT-NEXT: %cst:gpr64 = MOVi64imm -9223372036854775808508 ; SELECT-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr %reg, %cst, implicit-def $nzcv509 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv510 ; SELECT-NEXT: $w0 = COPY %cmp511 ; SELECT-NEXT: RET_ReallyLR implicit $w0512 %reg:_(s64) = COPY $x0513 %cst:_(s64) = G_CONSTANT i64 -9223372036854775808514 %cmp:_(s32) = G_ICMP intpred(slt), %reg(s64), %cst515 $w0 = COPY %cmp(s32)516 RET_ReallyLR implicit $w0517 518...519---520name: no_opt_int32_max521legalized: true522tracksRegLiveness: true523body: |524 bb.0:525 liveins: $w0526 527 ; The cmp should not change.528 ; If we add 1 to the constant, it will wrap around, and so it's not true529 ; that530 ; x slt c => x sle c - 1531 ; x sge c => x sgt c - 1532 533 ; LOWER-LABEL: name: no_opt_int32_max534 ; LOWER: liveins: $w0535 ; LOWER-NEXT: {{ $}}536 ; LOWER-NEXT: %reg:_(s32) = COPY $w0537 ; LOWER-NEXT: %cst:_(s32) = G_CONSTANT i32 2147483647538 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sle), %reg(s32), %cst539 ; LOWER-NEXT: $w0 = COPY %cmp(s32)540 ; LOWER-NEXT: RET_ReallyLR implicit $w0541 ;542 ; SELECT-LABEL: name: no_opt_int32_max543 ; SELECT: liveins: $w0544 ; SELECT-NEXT: {{ $}}545 ; SELECT-NEXT: %reg:gpr32 = COPY $w0546 ; SELECT-NEXT: %cst:gpr32 = MOVi32imm 2147483647547 ; SELECT-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr %reg, %cst, implicit-def $nzcv548 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv549 ; SELECT-NEXT: $w0 = COPY %cmp550 ; SELECT-NEXT: RET_ReallyLR implicit $w0551 %reg:_(s32) = COPY $w0552 %cst:_(s32) = G_CONSTANT i32 2147483647553 %cmp:_(s32) = G_ICMP intpred(sle), %reg(s32), %cst554 $w0 = COPY %cmp(s32)555 RET_ReallyLR implicit $w0556 557...558---559name: no_opt_int64_max560legalized: true561tracksRegLiveness: true562body: |563 bb.0:564 liveins: $x0565 566 ; The cmp should not change.567 ; If we add 1 to the constant, it will wrap around, and so it's not true568 ; that569 ; x slt c => x sle c - 1570 ; x sge c => x sgt c - 1571 572 573 ; LOWER-LABEL: name: no_opt_int64_max574 ; LOWER: liveins: $x0575 ; LOWER-NEXT: {{ $}}576 ; LOWER-NEXT: %reg:_(s64) = COPY $x0577 ; LOWER-NEXT: %cst:_(s64) = G_CONSTANT i64 9223372036854775807578 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(sle), %reg(s64), %cst579 ; LOWER-NEXT: $w0 = COPY %cmp(s32)580 ; LOWER-NEXT: RET_ReallyLR implicit $w0581 ;582 ; SELECT-LABEL: name: no_opt_int64_max583 ; SELECT: liveins: $x0584 ; SELECT-NEXT: {{ $}}585 ; SELECT-NEXT: %reg:gpr64 = COPY $x0586 ; SELECT-NEXT: %cst:gpr64 = MOVi64imm 9223372036854775807587 ; SELECT-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr %reg, %cst, implicit-def $nzcv588 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv589 ; SELECT-NEXT: $w0 = COPY %cmp590 ; SELECT-NEXT: RET_ReallyLR implicit $w0591 %reg:_(s64) = COPY $x0592 %cst:_(s64) = G_CONSTANT i64 9223372036854775807593 %cmp:_(s32) = G_ICMP intpred(sle), %reg(s64), %cst594 $w0 = COPY %cmp(s32)595 RET_ReallyLR implicit $w0596 597...598---599name: no_opt_zero600legalized: true601tracksRegLiveness: true602body: |603 bb.0:604 liveins: $x0605 606 ; The cmp should not change during the lowering pass.607 ; This is an unsigned comparison, so when the constant is 0, the following608 ; does not hold:609 ; x slt c => x sle c - 1610 ; x sge c => x sgt c - 1611 612 ; LOWER-LABEL: name: no_opt_zero613 ; LOWER: liveins: $x0614 ; LOWER-NEXT: {{ $}}615 ; LOWER-NEXT: %reg:_(s64) = COPY $x0616 ; LOWER-NEXT: %cst:_(s64) = G_CONSTANT i64 0617 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(ult), %reg(s64), %cst618 ; LOWER-NEXT: $w0 = COPY %cmp(s32)619 ; LOWER-NEXT: RET_ReallyLR implicit $w0620 ;621 ; SELECT-LABEL: name: no_opt_zero622 ; SELECT: liveins: $x0623 ; SELECT-NEXT: {{ $}}624 ; SELECT-NEXT: %reg:gpr64sp = COPY $x0625 ; SELECT-NEXT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 0, 0, implicit-def $nzcv626 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv627 ; SELECT-NEXT: $w0 = COPY %cmp628 ; SELECT-NEXT: RET_ReallyLR implicit $w0629 %reg:_(s64) = COPY $x0630 %cst:_(s64) = G_CONSTANT i64 0631 %cmp:_(s32) = G_ICMP intpred(ult), %reg(s64), %cst632 $w0 = COPY %cmp(s32)633 RET_ReallyLR implicit $w0634 635...636---637name: cmp_and_select638legalized: true639tracksRegLiveness: true640body: |641 bb.0:642 liveins: $w0, $w1643 ; The G_ICMP is optimized here to be a slt comparison by adding 1 to the644 ; constant. So, the CSELWr should use the predicate code 11, rather than645 ; 13.646 647 ; LOWER-LABEL: name: cmp_and_select648 ; LOWER: liveins: $w0, $w1649 ; LOWER-NEXT: {{ $}}650 ; LOWER-NEXT: %reg0:_(s32) = COPY $w0651 ; LOWER-NEXT: %reg1:_(s32) = COPY $w1652 ; LOWER-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0653 ; LOWER-NEXT: %cmp:_(s32) = G_ICMP intpred(slt), %reg0(s32), [[C]]654 ; LOWER-NEXT: %select:_(s32) = G_SELECT %cmp(s32), %reg0, %reg1655 ; LOWER-NEXT: $w0 = COPY %select(s32)656 ; LOWER-NEXT: RET_ReallyLR implicit $w0657 ;658 ; SELECT-LABEL: name: cmp_and_select659 ; SELECT: liveins: $w0, $w1660 ; SELECT-NEXT: {{ $}}661 ; SELECT-NEXT: %reg0:gpr32common = COPY $w0662 ; SELECT-NEXT: %reg1:gpr32 = COPY $w1663 ; SELECT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg0, 0, 0, implicit-def $nzcv664 ; SELECT-NEXT: %select:gpr32 = CSELWr %reg0, %reg1, 4, implicit $nzcv665 ; SELECT-NEXT: $w0 = COPY %select666 ; SELECT-NEXT: RET_ReallyLR implicit $w0667 %reg0:_(s32) = COPY $w0668 %reg1:_(s32) = COPY $w1669 %cst:_(s32) = G_CONSTANT i32 -1670 %cmp:_(s32) = G_ICMP intpred(sle), %reg0(s32), %cst671 %select:_(s32) = G_SELECT %cmp, %reg0, %reg1672 $w0 = COPY %select(s32)673 RET_ReallyLR implicit $w0674 675...676---677name: andsxri678legalized: true679tracksRegLiveness: true680body: |681 bb.0:682 liveins: $x0683 ; Show that we can select a tst/ands by optimizing the G_ICMP in the684 ; lowering phase.685 686 ; LOWER-LABEL: name: andsxri687 ; LOWER: liveins: $x0688 ; LOWER-NEXT: {{ $}}689 ; LOWER-NEXT: %reg0:gpr(s64) = COPY $x0690 ; LOWER-NEXT: %bit:gpr(s64) = G_CONSTANT i64 8691 ; LOWER-NEXT: %and:gpr(s64) = G_AND %reg0, %bit692 ; LOWER-NEXT: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 0693 ; LOWER-NEXT: %cmp:gpr(s32) = G_ICMP intpred(sge), %and(s64), [[C]]694 ; LOWER-NEXT: $w0 = COPY %cmp(s32)695 ; LOWER-NEXT: RET_ReallyLR implicit $w0696 ;697 ; SELECT-LABEL: name: andsxri698 ; SELECT: liveins: $x0699 ; SELECT-NEXT: {{ $}}700 ; SELECT-NEXT: %reg0:gpr64 = COPY $x0701 ; SELECT-NEXT: [[ANDSXri:%[0-9]+]]:gpr64 = ANDSXri %reg0, 8000, implicit-def $nzcv702 ; SELECT-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 4, implicit $nzcv703 ; SELECT-NEXT: $w0 = COPY %cmp704 ; SELECT-NEXT: RET_ReallyLR implicit $w0705 %reg0:gpr(s64) = COPY $x0706 %bit:gpr(s64) = G_CONSTANT i64 8707 %and:gpr(s64) = G_AND %reg0, %bit708 %cst:gpr(s64) = G_CONSTANT i64 -1709 %cmp:gpr(s32) = G_ICMP intpred(sgt), %and(s64), %cst710 $w0 = COPY %cmp(s32)711 RET_ReallyLR implicit $w0712