177 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s3# RUN: llc -mtriple=aarch64 -global-isel -start-before=aarch64-postlegalizer-lowering -stop-after=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=SELECTED4 5---6name: duplane647alignment: 48legalized: true9tracksRegLiveness: true10body: |11 bb.1.entry:12 liveins: $q013 14 ; CHECK-LABEL: name: duplane6415 ; CHECK: liveins: $q016 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q018 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 019 ; CHECK-NEXT: [[DUPLANE64_:%[0-9]+]]:_(<2 x s64>) = G_DUPLANE64 [[COPY]], [[C]](s64)20 ; CHECK-NEXT: $q0 = COPY [[DUPLANE64_]](<2 x s64>)21 ; CHECK-NEXT: RET_ReallyLR implicit $q022 ;23 ; SELECTED-LABEL: name: duplane6424 ; SELECTED: liveins: $q025 ; SELECTED-NEXT: {{ $}}26 ; SELECTED-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q027 ; SELECTED-NEXT: [[DUPv2i64lane:%[0-9]+]]:fpr128 = DUPv2i64lane [[COPY]], 028 ; SELECTED-NEXT: $q0 = COPY [[DUPv2i64lane]]29 ; SELECTED-NEXT: RET_ReallyLR implicit $q030 %1:_(<2 x s64>) = COPY $q031 %2:_(<2 x s64>) = G_IMPLICIT_DEF32 %4:_(<2 x s64>) = G_SHUFFLE_VECTOR %1(<2 x s64>), %2, shufflemask(0, 0)33 $q0 = COPY %4(<2 x s64>)34 RET_ReallyLR implicit $q035 36...37---38name: duplane3239alignment: 440legalized: true41tracksRegLiveness: true42body: |43 bb.1.entry:44 liveins: $q045 46 ; CHECK-LABEL: name: duplane3247 ; CHECK: liveins: $q048 ; CHECK-NEXT: {{ $}}49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q050 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 051 ; CHECK-NEXT: [[DUPLANE32_:%[0-9]+]]:_(<4 x s32>) = G_DUPLANE32 [[COPY]], [[C]](s64)52 ; CHECK-NEXT: $q0 = COPY [[DUPLANE32_]](<4 x s32>)53 ; CHECK-NEXT: RET_ReallyLR implicit $q054 ;55 ; SELECTED-LABEL: name: duplane3256 ; SELECTED: liveins: $q057 ; SELECTED-NEXT: {{ $}}58 ; SELECTED-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q059 ; SELECTED-NEXT: [[DUPv4i32lane:%[0-9]+]]:fpr128 = DUPv4i32lane [[COPY]], 060 ; SELECTED-NEXT: $q0 = COPY [[DUPv4i32lane]]61 ; SELECTED-NEXT: RET_ReallyLR implicit $q062 %1:_(<4 x s32>) = COPY $q063 %2:_(<4 x s32>) = G_IMPLICIT_DEF64 %4:_(<4 x s32>) = G_SHUFFLE_VECTOR %1(<4 x s32>), %2, shufflemask(0, 0, 0, 0)65 $q0 = COPY %4(<4 x s32>)66 RET_ReallyLR implicit $q067 68...69---70name: duplane1671alignment: 472legalized: true73tracksRegLiveness: true74body: |75 bb.1.entry:76 liveins: $q077 78 ; CHECK-LABEL: name: duplane1679 ; CHECK: liveins: $q080 ; CHECK-NEXT: {{ $}}81 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q082 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 083 ; CHECK-NEXT: [[DUPLANE16_:%[0-9]+]]:_(<8 x s16>) = G_DUPLANE16 [[COPY]], [[C]](s64)84 ; CHECK-NEXT: $q0 = COPY [[DUPLANE16_]](<8 x s16>)85 ; CHECK-NEXT: RET_ReallyLR implicit $q086 ;87 ; SELECTED-LABEL: name: duplane1688 ; SELECTED: liveins: $q089 ; SELECTED-NEXT: {{ $}}90 ; SELECTED-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q091 ; SELECTED-NEXT: [[DUPv8i16lane:%[0-9]+]]:fpr128 = DUPv8i16lane [[COPY]], 092 ; SELECTED-NEXT: $q0 = COPY [[DUPv8i16lane]]93 ; SELECTED-NEXT: RET_ReallyLR implicit $q094 %1:_(<8 x s16>) = COPY $q095 %2:_(<8 x s16>) = G_IMPLICIT_DEF96 %4:_(<8 x s16>) = G_SHUFFLE_VECTOR %1(<8 x s16>), %2, shufflemask(0, 0, 0, 0, 0, 0, 0, 0)97 $q0 = COPY %4(<8 x s16>)98 RET_ReallyLR implicit $q099 100...101---102name: duplane8103alignment: 4104legalized: true105tracksRegLiveness: true106body: |107 bb.1.entry:108 liveins: $q0109 110 ; CHECK-LABEL: name: duplane8111 ; CHECK: liveins: $q0112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0114 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0115 ; CHECK-NEXT: [[DUPLANE8_:%[0-9]+]]:_(<16 x s8>) = G_DUPLANE8 [[COPY]], [[C]](s64)116 ; CHECK-NEXT: $q0 = COPY [[DUPLANE8_]](<16 x s8>)117 ; CHECK-NEXT: RET_ReallyLR implicit $q0118 ;119 ; SELECTED-LABEL: name: duplane8120 ; SELECTED: liveins: $q0121 ; SELECTED-NEXT: {{ $}}122 ; SELECTED-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0123 ; SELECTED-NEXT: [[DUPv16i8lane:%[0-9]+]]:fpr128 = DUPv16i8lane [[COPY]], 0124 ; SELECTED-NEXT: $q0 = COPY [[DUPv16i8lane]]125 ; SELECTED-NEXT: RET_ReallyLR implicit $q0126 %1:_(<16 x s8>) = COPY $q0127 %2:_(<16 x s8>) = G_IMPLICIT_DEF128 %4:_(<16 x s8>) = G_SHUFFLE_VECTOR %1(<16 x s8>), %2, shufflemask(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)129 $q0 = COPY %4(<16 x s8>)130 RET_ReallyLR implicit $q0131 132...133---134name: v2s32_duplane32135alignment: 4136legalized: true137tracksRegLiveness: true138liveins:139 - { reg: '$d0' }140 - { reg: '$x0' }141frameInfo:142 maxAlignment: 1143machineFunctionInfo: {}144body: |145 bb.1:146 liveins: $d0, $d1147 148 ; CHECK-LABEL: name: v2s32_duplane32149 ; CHECK: liveins: $d0, $d1150 ; CHECK-NEXT: {{ $}}151 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0152 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1153 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0154 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF155 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[COPY1]](<2 x s32>), [[DEF]](<2 x s32>)156 ; CHECK-NEXT: [[DUPLANE32_:%[0-9]+]]:_(<2 x s32>) = G_DUPLANE32 [[CONCAT_VECTORS]], [[C]](s64)157 ; CHECK-NEXT: $d0 = COPY [[DUPLANE32_]](<2 x s32>)158 ; CHECK-NEXT: RET_ReallyLR implicit $d0159 ;160 ; SELECTED-LABEL: name: v2s32_duplane32161 ; SELECTED: liveins: $d0, $d1162 ; SELECTED-NEXT: {{ $}}163 ; SELECTED-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d1164 ; SELECTED-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF165 ; SELECTED-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.dsub166 ; SELECTED-NEXT: [[DUPv2i32lane:%[0-9]+]]:fpr64 = DUPv2i32lane [[INSERT_SUBREG]], 0167 ; SELECTED-NEXT: $d0 = COPY [[DUPv2i32lane]]168 ; SELECTED-NEXT: RET_ReallyLR implicit $d0169 %0:_(<2 x s32>) = COPY $d0170 %1:_(<2 x s32>) = COPY $d1171 %2:_(<2 x s32>) = G_IMPLICIT_DEF172 %3:_(<2 x s32>) = G_SHUFFLE_VECTOR %1(<2 x s32>), %2, shufflemask(0, 0)173 $d0 = COPY %3(<2 x s32>)174 RET_ReallyLR implicit $d0175 176...177