brintos

brintos / llvm-project-archived public Read only

0
0
Text · 3.8 KiB · f1676e4 Raw
125 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s3 4# Combins: (Opc (Opc X, C1), C2) -> (Opc X, (Opc C1, C2))5---6name:            test1_add_move_inner_cst_to_fold7alignment:       48tracksRegLiveness: true9liveins:10  - { reg: '$x0' }11body:             |12  bb.1:13    liveins: $x014 15    ; CHECK-LABEL: name: test1_add_move_inner_cst_to_fold16    ; CHECK: liveins: $x017    ; CHECK-NEXT: {{  $}}18    ; CHECK-NEXT: %x:_(s64) = COPY $x019    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8820    ; CHECK-NEXT: %add_outer:_(s64) = G_ADD %x, [[C]]21    ; CHECK-NEXT: $x0 = COPY %add_outer(s64)22    ; CHECK-NEXT: RET_ReallyLR implicit $x023    %x:_(s64) = COPY $x024    %C1:_(s64) = G_CONSTANT i64 6425    %C2:_(s64) = G_CONSTANT i64 2426    %add_inner:_(s64) = G_ADD %x, %C127    %add_outer:_(s64) = G_ADD %add_inner, %C228    $x0 = COPY %add_outer29    RET_ReallyLR implicit $x030 31...32 33# (op (op x, c1), y) -> (op (op x, y), c1)34---35name:            test2_add_move_inner_cst_to_rhs36alignment:       437tracksRegLiveness: true38liveins:39  - { reg: '$x0' }40body:             |41  bb.1:42    liveins: $x0, $x143 44    ; CHECK-LABEL: name: test2_add_move_inner_cst_to_rhs45    ; CHECK: liveins: $x0, $x146    ; CHECK-NEXT: {{  $}}47    ; CHECK-NEXT: %x:_(s64) = COPY $x048    ; CHECK-NEXT: %C1:_(s64) = G_CONSTANT i64 6449    ; CHECK-NEXT: %y:_(s64) = COPY $x150    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD %x, %y51    ; CHECK-NEXT: %add_outer:_(s64) = G_ADD [[ADD]], %C152    ; CHECK-NEXT: $x0 = COPY %add_outer(s64)53    ; CHECK-NEXT: RET_ReallyLR implicit $x054    %x:_(s64) = COPY $x055    %C1:_(s64) = G_CONSTANT i64 6456    %y:_(s64) = COPY $x157    %add_inner:_(s64) = G_ADD %x, %C158    %add_outer:_(s64) = G_ADD %add_inner, %y59    $x0 = COPY %add_outer60    RET_ReallyLR implicit $x061 62...63---64name:            test2_add_move_inner_cst_to_rhs_multiuse65alignment:       466tracksRegLiveness: true67liveins:68  - { reg: '$x0' }69body:             |70  bb.1:71    liveins: $x0, $x172 73    ; CHECK-LABEL: name: test2_add_move_inner_cst_to_rhs_multiuse74    ; CHECK: liveins: $x0, $x175    ; CHECK-NEXT: {{  $}}76    ; CHECK-NEXT: %x:_(s64) = COPY $x077    ; CHECK-NEXT: %C1:_(s64) = G_CONSTANT i64 6478    ; CHECK-NEXT: %y:_(s64) = COPY $x179    ; CHECK-NEXT: %add_inner:_(s64) = G_ADD %x, %C180    ; CHECK-NEXT: %add_outer:_(s64) = G_ADD %add_inner, %y81    ; CHECK-NEXT: $x0 = COPY %add_outer(s64)82    ; CHECK-NEXT: $x1 = COPY %add_inner(s64)83    ; CHECK-NEXT: RET_ReallyLR implicit $x084    %x:_(s64) = COPY $x085    %C1:_(s64) = G_CONSTANT i64 6486    %y:_(s64) = COPY $x187    %add_inner:_(s64) = G_ADD %x, %C188    %add_outer:_(s64) = G_ADD %add_inner, %y89    $x0 = COPY %add_outer90    $x1 = COPY %add_inner91    RET_ReallyLR implicit $x092 93...94---95name:            test2_add_move_inner_cst_to_rhs_vector96alignment:       497tracksRegLiveness: true98liveins:99  - { reg: '$x0' }100body:             |101  bb.1:102    liveins: $q0, $q1103 104    ; CHECK-LABEL: name: test2_add_move_inner_cst_to_rhs_vector105    ; CHECK: liveins: $q0, $q1106    ; CHECK-NEXT: {{  $}}107    ; CHECK-NEXT: %x:_(<2 x s64>) = COPY $q0108    ; CHECK-NEXT: %C1:_(s64) = G_CONSTANT i64 64109    ; CHECK-NEXT: %VEC_C1:_(<2 x s64>) = G_BUILD_VECTOR %C1(s64), %C1(s64)110    ; CHECK-NEXT: %y:_(<2 x s64>) = COPY $q1111    ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x s64>) = G_ADD %x, %y112    ; CHECK-NEXT: %add_outer:_(<2 x s64>) = G_ADD [[ADD]], %VEC_C1113    ; CHECK-NEXT: $q0 = COPY %add_outer(<2 x s64>)114    ; CHECK-NEXT: RET_ReallyLR implicit $q0115    %x:_(<2 x s64>) = COPY $q0116    %C1:_(s64) = G_CONSTANT i64 64117    %VEC_C1:_(<2 x s64>) = G_BUILD_VECTOR %C1, %C1118    %y:_(<2 x s64>) = COPY $q1119    %add_inner:_(<2 x s64>) = G_ADD %x, %VEC_C1120    %add_outer:_(<2 x s64>) = G_ADD %add_inner, %y121    $q0 = COPY %add_outer122    RET_ReallyLR implicit $q0123 124...125