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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect %s -o - | FileCheck %s3 4# Check that we correctly assign register banks based off of instructions which5# only use or only define FPRs.6#7# For example, G_SITOFP may take in a GPR, but only ever produces values on FPRs.8# Some instructions can have inputs/outputs on either FPRs or GPRs. If one of9# those instructions takes in the result of a G_SITOFP as a source, we should10# put that source on a FPR.11#12# Similarly, G_FPTOSI can only take in a value on a FPR. So, if the result of13# an instruction is consumed by a G_FPTOSI, we should put the instruction on14# FPRs.15 16---17name: load_only_uses_fp18legalized: true19tracksRegLiveness: true20body: |21 bb.0:22 liveins: $x023 ; CHECK-LABEL: name: load_only_uses_fp24 ; CHECK: liveins: $x025 ; CHECK-NEXT: {{ $}}26 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x027 ; CHECK-NEXT: [[C:%[0-9]+]]:fpr(s32) = G_FCONSTANT float 2.000000e+0028 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32))29 ; CHECK-NEXT: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(uno), [[C]](s32), [[LOAD]]30 ; CHECK-NEXT: $w0 = COPY [[FCMP]](s32)31 ; CHECK-NEXT: RET_ReallyLR implicit $w032 %0:_(p0) = COPY $x033 %1:_(s32) = G_FCONSTANT float 2.034 %2:_(s32) = G_LOAD %0 :: (load (s32))35 %3:_(s32) = G_FCMP floatpred(uno), %1, %236 $w0 = COPY %3(s32)37 RET_ReallyLR implicit $w038...39---40name: unmerge_only_uses_fp41 42legalized: true43tracksRegLiveness: true44body: |45 bb.0:46 liveins: $x047 ; CHECK-LABEL: name: unmerge_only_uses_fp48 ; CHECK: liveins: $x049 ; CHECK-NEXT: {{ $}}50 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x051 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY [[COPY]](s64)52 ; CHECK-NEXT: [[UV:%[0-9]+]]:fpr(s32), [[UV1:%[0-9]+]]:fpr(s32) = G_UNMERGE_VALUES [[COPY1]](s64)53 ; CHECK-NEXT: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(uno), [[UV]](s32), [[UV1]]54 ; CHECK-NEXT: $w0 = COPY [[FCMP]](s32)55 ; CHECK-NEXT: RET_ReallyLR implicit $w056 %0:_(s64) = COPY $x057 %1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0(s64)58 %3:_(s32) = G_FCMP floatpred(uno), %1, %259 $w0 = COPY %3(s32)60 RET_ReallyLR implicit $w061 62...63---64name: store_defined_by_fp65legalized: true66tracksRegLiveness: true67body: |68 bb.0:69 liveins: $x0, $w170 ; CHECK-LABEL: name: store_defined_by_fp71 ; CHECK: liveins: $x0, $w172 ; CHECK-NEXT: {{ $}}73 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x074 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w175 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32)76 ; CHECK-NEXT: G_STORE [[SITOFP]](s32), [[COPY]](p0) :: (store (s32))77 %0:_(p0) = COPY $x078 %1:_(s32) = COPY $w179 %2:_(s32) = G_SITOFP %180 G_STORE %2, %0 :: (store (s32))81 82...83---84name: select_defined_by_fp_using_fp85legalized: true86tracksRegLiveness: true87body: |88 bb.0:89 liveins: $w0, $w1, $w290 ; CHECK-LABEL: name: select_defined_by_fp_using_fp91 ; CHECK: liveins: $w0, $w1, $w292 ; CHECK-NEXT: {{ $}}93 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w094 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w195 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr(s32) = COPY $w296 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[COPY1]](s32)97 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr(s32) = COPY [[COPY2]](s32)98 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:fpr(s32) = G_SELECT [[COPY2]](s32), [[COPY3]], [[SITOFP]]99 ; CHECK-NEXT: [[FPTOSI:%[0-9]+]]:fpr(s32) = G_FPTOSI [[SELECT]](s32)100 %0:_(s32) = COPY $w0101 %2:_(s32) = COPY $w1102 %3:_(s32) = COPY $w2103 %4:_(s32) = G_SITOFP %2104 %6:_(s32) = G_SELECT %3, %3, %4105 %8:_(s32) = G_FPTOSI %6106 107...108---109name: load_used_by_phi_fpr110legalized: true111tracksRegLiveness: true112body: |113 ; CHECK-LABEL: name: load_used_by_phi_fpr114 ; CHECK: bb.0:115 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)116 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1117 ; CHECK-NEXT: {{ $}}118 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0119 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0120 ; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0121 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1122 ; CHECK-NEXT: G_BR %bb.2123 ; CHECK-NEXT: {{ $}}124 ; CHECK-NEXT: bb.1:125 ; CHECK-NEXT: successors: %bb.2(0x80000000)126 ; CHECK-NEXT: {{ $}}127 ; CHECK-NEXT: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32))128 ; CHECK-NEXT: G_BR %bb.2129 ; CHECK-NEXT: {{ $}}130 ; CHECK-NEXT: bb.2:131 ; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %load(s32), %bb.1132 ; CHECK-NEXT: $s0 = COPY %phi(s32)133 ; CHECK-NEXT: RET_ReallyLR implicit $s0134 bb.0:135 successors: %bb.1(0x40000000), %bb.2(0x40000000)136 liveins: $x0, $s0, $s1, $w0, $w1137 %cond_wide:_(s32) = COPY $w0138 %fpr_copy:_(s32) = COPY $s0139 %ptr:_(p0) = COPY $x0140 G_BRCOND %cond_wide, %bb.1141 G_BR %bb.2142 bb.1:143 successors: %bb.2144 %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))145 G_BR %bb.2146 bb.2:147 %phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %load(s32), %bb.1148 $s0 = COPY %phi(s32)149 RET_ReallyLR implicit $s0150 151...152---153name: load_used_by_phi_gpr_copy_gpr154legalized: true155tracksRegLiveness: true156body: |157 ; CHECK-LABEL: name: load_used_by_phi_gpr_copy_gpr158 ; CHECK: bb.0:159 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)160 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1161 ; CHECK-NEXT: {{ $}}162 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0163 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1164 ; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0165 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1166 ; CHECK-NEXT: G_BR %bb.2167 ; CHECK-NEXT: {{ $}}168 ; CHECK-NEXT: bb.1:169 ; CHECK-NEXT: successors: %bb.2(0x80000000)170 ; CHECK-NEXT: {{ $}}171 ; CHECK-NEXT: %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))172 ; CHECK-NEXT: G_BR %bb.2173 ; CHECK-NEXT: {{ $}}174 ; CHECK-NEXT: bb.2:175 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1176 ; CHECK-NEXT: $w2 = COPY %phi(s32)177 ; CHECK-NEXT: RET_ReallyLR implicit $w2178 bb.0:179 successors: %bb.1(0x40000000), %bb.2(0x40000000)180 liveins: $x0, $s0, $s1, $w0, $w1181 %cond_wide:_(s32) = COPY $w0182 %gpr_copy:_(s32) = COPY $w1183 %ptr:_(p0) = COPY $x0184 G_BRCOND %cond_wide, %bb.1185 G_BR %bb.2186 bb.1:187 successors: %bb.2188 %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))189 G_BR %bb.2190 bb.2:191 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1192 $w2 = COPY %phi(s32)193 RET_ReallyLR implicit $w2194 195...196---197name: load_used_by_phi_gpr_copy_fpr198legalized: true199tracksRegLiveness: true200body: |201 ; CHECK-LABEL: name: load_used_by_phi_gpr_copy_fpr202 ; CHECK: bb.0:203 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)204 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1205 ; CHECK-NEXT: {{ $}}206 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0207 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1208 ; CHECK-NEXT: %ptr:gpr(p0) = COPY $x0209 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1210 ; CHECK-NEXT: G_BR %bb.2211 ; CHECK-NEXT: {{ $}}212 ; CHECK-NEXT: bb.1:213 ; CHECK-NEXT: successors: %bb.2(0x80000000)214 ; CHECK-NEXT: {{ $}}215 ; CHECK-NEXT: %load:fpr(s32) = G_LOAD %ptr(p0) :: (load (s32))216 ; CHECK-NEXT: G_BR %bb.2217 ; CHECK-NEXT: {{ $}}218 ; CHECK-NEXT: bb.2:219 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1220 ; CHECK-NEXT: $s0 = COPY %phi(s32)221 ; CHECK-NEXT: RET_ReallyLR implicit $s0222 bb.0:223 successors: %bb.1(0x40000000), %bb.2(0x40000000)224 liveins: $x0, $s0, $s1, $w0, $w1225 %cond_wide:_(s32) = COPY $w0226 %gpr_copy:_(s32) = COPY $w1227 %ptr:_(p0) = COPY $x0228 G_BRCOND %cond_wide, %bb.1229 G_BR %bb.2230 bb.1:231 successors: %bb.2232 %load:_(s32) = G_LOAD %ptr(p0) :: (load (s32))233 G_BR %bb.2234 bb.2:235 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %load(s32), %bb.1236 $s0 = COPY %phi(s32) ; G_LOAD should consider this FPR constraint and assign %load FPR237 RET_ReallyLR implicit $s0238 239...240---241name: select_used_by_phi_fpr242legalized: true243tracksRegLiveness: true244body: |245 ; CHECK-LABEL: name: select_used_by_phi_fpr246 ; CHECK: bb.0:247 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)248 ; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1249 ; CHECK-NEXT: {{ $}}250 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0251 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0252 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1253 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1254 ; CHECK-NEXT: G_BR %bb.2255 ; CHECK-NEXT: {{ $}}256 ; CHECK-NEXT: bb.1:257 ; CHECK-NEXT: successors: %bb.2(0x80000000)258 ; CHECK-NEXT: {{ $}}259 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s32) = COPY %gpr_copy(s32)260 ; CHECK-NEXT: %select:fpr(s32) = G_SELECT %cond_wide(s32), %fpr_copy, [[COPY]]261 ; CHECK-NEXT: G_BR %bb.2262 ; CHECK-NEXT: {{ $}}263 ; CHECK-NEXT: bb.2:264 ; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1265 ; CHECK-NEXT: $w0 = COPY %phi(s32)266 ; CHECK-NEXT: RET_ReallyLR implicit $w0267 ; The G_SELECT and G_PHI should end up with the same register bank.268 bb.0:269 successors: %bb.1(0x40000000), %bb.2(0x40000000)270 liveins: $s0, $s1, $w0, $w1271 %cond_wide:_(s32) = COPY $w0272 %fpr_copy:_(s32) = COPY $s0273 %gpr_copy:_(s32) = COPY $w1274 G_BRCOND %cond_wide, %bb.1275 G_BR %bb.2276 bb.1:277 successors: %bb.2278 %select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy279 G_BR %bb.2280 bb.2:281 %phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %select(s32), %bb.1282 $w0 = COPY %phi(s32)283 RET_ReallyLR implicit $w0284 285...286---287name: select_used_by_phi_gpr288legalized: true289tracksRegLiveness: true290body: |291 ; CHECK-LABEL: name: select_used_by_phi_gpr292 ; CHECK: bb.0:293 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)294 ; CHECK-NEXT: liveins: $s0, $s1, $w0, $w1295 ; CHECK-NEXT: {{ $}}296 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0297 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0298 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1299 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1300 ; CHECK-NEXT: G_BR %bb.2301 ; CHECK-NEXT: {{ $}}302 ; CHECK-NEXT: bb.1:303 ; CHECK-NEXT: successors: %bb.2(0x80000000)304 ; CHECK-NEXT: {{ $}}305 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %fpr_copy(s32)306 ; CHECK-NEXT: %select:gpr(s32) = G_SELECT %cond_wide(s32), [[COPY]], %gpr_copy307 ; CHECK-NEXT: G_BR %bb.2308 ; CHECK-NEXT: {{ $}}309 ; CHECK-NEXT: bb.2:310 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1311 ; CHECK-NEXT: $s0 = COPY %phi(s32)312 ; CHECK-NEXT: RET_ReallyLR implicit $s0313 ; The G_SELECT and G_PHI should end up with the same register bank.314 bb.0:315 successors: %bb.1(0x40000000), %bb.2(0x40000000)316 liveins: $s0, $s1, $w0, $w1317 %cond_wide:_(s32) = COPY $w0318 %fpr_copy:_(s32) = COPY $s0319 %gpr_copy:_(s32) = COPY $w1320 G_BRCOND %cond_wide, %bb.1321 G_BR %bb.2322 bb.1:323 successors: %bb.2324 %select:_(s32) = G_SELECT %cond_wide, %fpr_copy, %gpr_copy325 G_BR %bb.2326 bb.2:327 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %select(s32), %bb.1328 $s0 = COPY %phi(s32)329 RET_ReallyLR implicit $s0330 331 332...333---334name: unmerge_used_by_phi_fpr335legalized: true336tracksRegLiveness: true337body: |338 ; CHECK-LABEL: name: unmerge_used_by_phi_fpr339 ; CHECK: bb.0:340 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)341 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1342 ; CHECK-NEXT: {{ $}}343 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0344 ; CHECK-NEXT: %fpr_copy:fpr(s32) = COPY $s0345 ; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0346 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1347 ; CHECK-NEXT: G_BR %bb.2348 ; CHECK-NEXT: {{ $}}349 ; CHECK-NEXT: bb.1:350 ; CHECK-NEXT: successors: %bb.2(0x80000000)351 ; CHECK-NEXT: {{ $}}352 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s64) = COPY %unmerge_src(s64)353 ; CHECK-NEXT: %unmerge_1:fpr(s32), %unmerge_2:fpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)354 ; CHECK-NEXT: G_BR %bb.2355 ; CHECK-NEXT: {{ $}}356 ; CHECK-NEXT: bb.2:357 ; CHECK-NEXT: %phi:fpr(s32) = G_PHI %fpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1358 ; CHECK-NEXT: $s0 = COPY %phi(s32)359 ; CHECK-NEXT: RET_ReallyLR implicit $s0360 bb.0:361 successors: %bb.1(0x40000000), %bb.2(0x40000000)362 liveins: $x0, $s0, $s1, $w0, $w1363 %cond_wide:_(s32) = COPY $w0364 365 %fpr_copy:_(s32) = COPY $s0366 %unmerge_src:_(s64) = COPY $x0367 G_BRCOND %cond_wide, %bb.1368 G_BR %bb.2369 bb.1:370 successors: %bb.2371 %unmerge_1:_(s32), %unmerge_2:_(s32) = G_UNMERGE_VALUES %unmerge_src(s64)372 G_BR %bb.2373 bb.2:374 %phi:_(s32) = G_PHI %fpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1375 $s0 = COPY %phi(s32)376 RET_ReallyLR implicit $s0377 378...379---380name: unmerge_used_by_phi_gpr381legalized: true382tracksRegLiveness: true383body: |384 ; CHECK-LABEL: name: unmerge_used_by_phi_gpr385 ; CHECK: bb.0:386 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)387 ; CHECK-NEXT: liveins: $x0, $s0, $s1, $w0, $w1388 ; CHECK-NEXT: {{ $}}389 ; CHECK-NEXT: %cond_wide:gpr(s32) = COPY $w0390 ; CHECK-NEXT: %gpr_copy:gpr(s32) = COPY $w1391 ; CHECK-NEXT: %unmerge_src:gpr(s64) = COPY $x0392 ; CHECK-NEXT: G_BRCOND %cond_wide(s32), %bb.1393 ; CHECK-NEXT: G_BR %bb.2394 ; CHECK-NEXT: {{ $}}395 ; CHECK-NEXT: bb.1:396 ; CHECK-NEXT: successors: %bb.2(0x80000000)397 ; CHECK-NEXT: {{ $}}398 ; CHECK-NEXT: %unmerge_1:gpr(s32), %unmerge_2:gpr(s32) = G_UNMERGE_VALUES %unmerge_src(s64)399 ; CHECK-NEXT: G_BR %bb.2400 ; CHECK-NEXT: {{ $}}401 ; CHECK-NEXT: bb.2:402 ; CHECK-NEXT: %phi:gpr(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1403 ; CHECK-NEXT: $s0 = COPY %phi(s32)404 ; CHECK-NEXT: RET_ReallyLR implicit $s0405 bb.0:406 successors: %bb.1(0x40000000), %bb.2(0x40000000)407 liveins: $x0, $s0, $s1, $w0, $w1408 %cond_wide:_(s32) = COPY $w0409 %gpr_copy:_(s32) = COPY $w1410 %unmerge_src:_(s64) = COPY $x0411 G_BRCOND %cond_wide, %bb.1412 G_BR %bb.2413 bb.1:414 successors: %bb.2415 %unmerge_1:_(s32), %unmerge_2:_(s32) = G_UNMERGE_VALUES %unmerge_src(s64)416 G_BR %bb.2417 bb.2:418 %phi:_(s32) = G_PHI %gpr_copy(s32), %bb.0, %unmerge_1(s32), %bb.1419 $s0 = COPY %phi(s32)420 RET_ReallyLR implicit $s0421 422...423---424name: load_used_by_sitofp425legalized: true426tracksRegLiveness: true427body: |428 bb.0:429 liveins: $x0430 ; The load should be assigned an fpr bank because it's used by the sitofp.431 ; The sitofp should assign both src and dest to FPR, resulting in no copies.432 ; CHECK-LABEL: name: load_used_by_sitofp433 ; CHECK: liveins: $x0434 ; CHECK-NEXT: {{ $}}435 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0436 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32))437 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fpr(s32) = G_SITOFP [[LOAD]](s32)438 ; CHECK-NEXT: $s0 = COPY [[SITOFP]](s32)439 ; CHECK-NEXT: RET_ReallyLR implicit $s0440 %0:_(p0) = COPY $x0441 %1:_(s32) = G_LOAD %0 :: (load (s32))442 %2:_(s32) = G_SITOFP %1:_(s32)443 $s0 = COPY %2(s32)444 RET_ReallyLR implicit $s0445...446---447name: load_used_by_uitofp448legalized: true449tracksRegLiveness: true450body: |451 bb.0:452 liveins: $x0453 ; CHECK-LABEL: name: load_used_by_uitofp454 ; CHECK: liveins: $x0455 ; CHECK-NEXT: {{ $}}456 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(p0) = COPY $x0457 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:fpr(s32) = G_LOAD [[COPY]](p0) :: (load (s32))458 ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fpr(s32) = G_UITOFP [[LOAD]](s32)459 ; CHECK-NEXT: $s0 = COPY [[UITOFP]](s32)460 ; CHECK-NEXT: RET_ReallyLR implicit $s0461 %0:_(p0) = COPY $x0462 %1:_(s32) = G_LOAD %0 :: (load (s32))463 %2:_(s32) = G_UITOFP %1:_(s32)464 $s0 = COPY %2(s32)465 RET_ReallyLR implicit $s0466...467