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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-unknown-unknown -verify-machineinstrs -O0 -run-pass=regbankselect %s -o - | FileCheck %s3 4---5name: inlineasm_memory_clobber6alignment: 47legalized: true8tracksRegLiveness: true9body: |10 bb.1:11 ; CHECK-LABEL: name: inlineasm_memory_clobber12 ; CHECK: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */13 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */14 ; CHECK-NEXT: RET_ReallyLR15 INLINEASM &"", 2516 INLINEASM &"", 117 RET_ReallyLR18...19 20---21name: inlineasm_register_clobber22alignment: 423legalized: true24tracksRegLiveness: true25body: |26 bb.1:27 ; CHECK-LABEL: name: inlineasm_register_clobber28 ; CHECK: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 12 /* clobber */, implicit-def early-clobber $d029 ; CHECK-NEXT: RET_ReallyLR30 INLINEASM &"", 25, 12, implicit-def early-clobber $d031 RET_ReallyLR32...33 34---35name: inlineasm_phys_reg_output36alignment: 437legalized: true38tracksRegLiveness: true39body: |40 bb.1:41 ; CHECK-LABEL: name: inlineasm_phys_reg_output42 ; CHECK: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w043 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w044 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)45 ; CHECK-NEXT: RET_ReallyLR implicit $w046 INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w047 %0:_(s32) = COPY $w048 $w0 = COPY %0(s32)49 RET_ReallyLR implicit $w050...51 52---53name: inlineasm_virt_reg_output54alignment: 455legalized: true56tracksRegLiveness: true57body: |58 bb.1:59 ; CHECK-LABEL: name: inlineasm_virt_reg_output60 ; CHECK: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %061 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %062 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)63 ; CHECK-NEXT: RET_ReallyLR implicit $w064 INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0:gpr32common65 %1:_(s32) = COPY %066 $w0 = COPY %1(s32)67 RET_ReallyLR implicit $w068...69 70---71name: inlineasm_virt_mixed_types72alignment: 473legalized: true74tracksRegLiveness: true75body: |76 bb.1:77 ; CHECK-LABEL: name: inlineasm_virt_mixed_types78 ; CHECK: INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0, 3670026 /* regdef:FPR64 */, def %179 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %080 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY %181 ; CHECK-NEXT: $d0 = COPY [[COPY1]](s64)82 ; CHECK-NEXT: RET_ReallyLR implicit $d083 INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0:gpr32common, 3670026 /* regdef:FPR64 */, def %1:fpr6484 %3:_(s32) = COPY %085 %4:_(s64) = COPY %186 $d0 = COPY %4(s64)87 RET_ReallyLR implicit $d088...89