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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s3---4name: shl_cimm_325legalized: true6tracksRegLiveness: true7body: |8 bb.1:9 liveins: $w010 11 ; CHECK-LABEL: name: shl_cimm_3212 ; CHECK: liveins: $w013 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w015 ; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 816 ; CHECK-NEXT: [[SHL:%[0-9]+]]:gpr(s32) = G_SHL [[COPY]], [[C]](s32)17 ; CHECK-NEXT: $w0 = COPY [[SHL]](s32)18 ; CHECK-NEXT: RET_ReallyLR implicit $w019 %0:_(s32) = COPY $w020 %1:_(s32) = G_CONSTANT i32 821 %2:_(s32) = G_SHL %0, %1(s32)22 $w0 = COPY %2(s32)23 RET_ReallyLR implicit $w024 25...26---27name: shl_cimm_6428legalized: true29tracksRegLiveness: true30body: |31 bb.1:32 liveins: $x033 34 ; CHECK-LABEL: name: shl_cimm_6435 ; CHECK: liveins: $x036 ; CHECK-NEXT: {{ $}}37 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x038 ; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 839 ; CHECK-NEXT: [[SHL:%[0-9]+]]:gpr(s64) = G_SHL [[COPY]], [[C]](s64)40 ; CHECK-NEXT: $x0 = COPY [[SHL]](s64)41 ; CHECK-NEXT: RET_ReallyLR implicit $x042 %0:_(s64) = COPY $x043 %1:_(s64) = G_CONSTANT i64 844 %2:_(s64) = G_SHL %0, %1(s64)45 $x0 = COPY %2(s64)46 RET_ReallyLR implicit $x047 48...49---50name: lshr_cimm_3251legalized: true52tracksRegLiveness: true53body: |54 bb.1:55 liveins: $w056 57 ; CHECK-LABEL: name: lshr_cimm_3258 ; CHECK: liveins: $w059 ; CHECK-NEXT: {{ $}}60 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w061 ; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 862 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:gpr(s32) = G_LSHR [[COPY]], [[C]](s64)63 ; CHECK-NEXT: $w0 = COPY [[LSHR]](s32)64 ; CHECK-NEXT: RET_ReallyLR implicit $w065 %0:_(s32) = COPY $w066 %3:_(s64) = G_CONSTANT i64 867 %2:_(s32) = G_LSHR %0, %3(s64)68 $w0 = COPY %2(s32)69 RET_ReallyLR implicit $w070 71...72---73name: lshr_cimm_6474legalized: true75tracksRegLiveness: true76body: |77 bb.1:78 liveins: $x079 80 ; CHECK-LABEL: name: lshr_cimm_6481 ; CHECK: liveins: $x082 ; CHECK-NEXT: {{ $}}83 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x084 ; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 885 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:gpr(s64) = G_LSHR [[COPY]], [[C]](s64)86 ; CHECK-NEXT: $x0 = COPY [[LSHR]](s64)87 ; CHECK-NEXT: RET_ReallyLR implicit $x088 %0:_(s64) = COPY $x089 %1:_(s64) = G_CONSTANT i64 890 %2:_(s64) = G_LSHR %0, %1(s64)91 $x0 = COPY %2(s64)92 RET_ReallyLR implicit $x093 94...95---96name: ashr_cimm_3297legalized: true98tracksRegLiveness: true99body: |100 bb.1:101 liveins: $w0102 103 ; CHECK-LABEL: name: ashr_cimm_32104 ; CHECK: liveins: $w0105 ; CHECK-NEXT: {{ $}}106 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0107 ; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8108 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:gpr(s32) = G_ASHR [[COPY]], [[C]](s64)109 ; CHECK-NEXT: $w0 = COPY [[ASHR]](s32)110 ; CHECK-NEXT: RET_ReallyLR implicit $w0111 %0:_(s32) = COPY $w0112 %3:_(s64) = G_CONSTANT i64 8113 %2:_(s32) = G_ASHR %0, %3(s64)114 $w0 = COPY %2(s32)115 RET_ReallyLR implicit $w0116 117...118---119name: ashr_cimm_64120legalized: true121tracksRegLiveness: true122body: |123 bb.1:124 liveins: $x0125 126 ; CHECK-LABEL: name: ashr_cimm_64127 ; CHECK: liveins: $x0128 ; CHECK-NEXT: {{ $}}129 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x0130 ; CHECK-NEXT: [[C:%[0-9]+]]:gpr(s64) = G_CONSTANT i64 8131 ; CHECK-NEXT: [[ASHR:%[0-9]+]]:gpr(s64) = G_ASHR [[COPY]], [[C]](s64)132 ; CHECK-NEXT: $x0 = COPY [[ASHR]](s64)133 ; CHECK-NEXT: RET_ReallyLR implicit $x0134 %0:_(s64) = COPY $x0135 %1:_(s64) = G_CONSTANT i64 8136 %2:_(s64) = G_ASHR %0, %1(s64)137 $x0 = COPY %2(s64)138 RET_ReallyLR implicit $x0139 140...141