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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple arm64-- -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s3---4name: unmerge5alignment: 46legalized: true7tracksRegLiveness: true8frameInfo:9 maxCallFrameSize: 010body: |11 bb.0:12 liveins: $q013 14 ; Ensure that the dest regs have FPR since we're unmerging from a vector15 ; CHECK-LABEL: name: unmerge16 ; CHECK: liveins: $q017 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(<2 x s64>) = COPY $q019 ; CHECK-NEXT: [[UV:%[0-9]+]]:fpr(s64), [[UV1:%[0-9]+]]:fpr(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)20 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)21 ; CHECK-NEXT: RET_ReallyLR implicit $x022 %0:_(<2 x s64>) = COPY $q023 %1:_(s64), %2:_(s64) = G_UNMERGE_VALUES %0(<2 x s64>)24 $x0 = COPY %1(s64)25 RET_ReallyLR implicit $x026 27...28---29name: unmerge_s12830alignment: 431legalized: true32tracksRegLiveness: true33frameInfo:34 maxCallFrameSize: 035body: |36 bb.0:37 liveins: $q038 39 ; s128 should be treated as an FPR/vector because it can't live on GPR bank.40 ; CHECK-LABEL: name: unmerge_s12841 ; CHECK: liveins: $q042 ; CHECK-NEXT: {{ $}}43 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr(s128) = COPY $q044 ; CHECK-NEXT: [[UV:%[0-9]+]]:fpr(s64), [[UV1:%[0-9]+]]:fpr(s64) = G_UNMERGE_VALUES [[COPY]](s128)45 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)46 ; CHECK-NEXT: RET_ReallyLR implicit $x047 %0:_(s128) = COPY $q048 %1:_(s64), %2:_(s64) = G_UNMERGE_VALUES %0(s128)49 $x0 = COPY %1(s64)50 RET_ReallyLR implicit $x051 52...53