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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -O0 -global-isel -stop-after=irtranslator -o - %s | FileCheck %s3 4; Tests vectors of i1 types can appropriately extended first before return handles it.5define <4 x i1> @ret_v4i1(ptr %v) {6 ; CHECK-LABEL: name: ret_v4i17 ; CHECK: bb.1 (%ir-block.0):8 ; CHECK-NEXT: liveins: $x09 ; CHECK-NEXT: {{ $}}10 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x011 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<4 x s1>) = G_LOAD [[COPY]](p0) :: (load (<4 x s1>) from %ir.v)12 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[LOAD]](<4 x s1>)13 ; CHECK-NEXT: $d0 = COPY [[ANYEXT]](<4 x s16>)14 ; CHECK-NEXT: RET_ReallyLR implicit $d015 %v2 = load <4 x i1>, ptr %v16 ret <4 x i1> %v217}18 19define <1 x i12> @ret_v1i12(i12 %v1, i12 %v2) {20 ; CHECK-LABEL: name: ret_v1i1221 ; CHECK: bb.1 (%ir-block.0):22 ; CHECK-NEXT: liveins: $w0, $w123 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w025 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)26 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w127 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)28 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s12)29 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)30 ; CHECK-NEXT: RET_ReallyLR implicit $w031 %a = insertelement <1 x i12> poison, i12 %v1, i32 032 ret <1 x i12> %a33}34 35define <2 x i12> @ret_v2i12(i12 %v1, i12 %v2) {36 ; CHECK-LABEL: name: ret_v2i1237 ; CHECK: bb.1 (%ir-block.0):38 ; CHECK-NEXT: liveins: $w0, $w139 ; CHECK-NEXT: {{ $}}40 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w041 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)42 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w143 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)44 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s12>) = G_IMPLICIT_DEF45 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 046 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 147 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s12), [[C]](s64)48 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<2 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC1]](s12), [[C1]](s64)49 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<2 x s32>) = G_ANYEXT [[IVEC1]](<2 x s12>)50 ; CHECK-NEXT: $d0 = COPY [[ANYEXT]](<2 x s32>)51 ; CHECK-NEXT: RET_ReallyLR implicit $d052 %a = insertelement <2 x i12> poison, i12 %v1, i32 053 %b = insertelement <2 x i12> %a, i12 %v2, i32 154 ret <2 x i12> %b55}56 57define <3 x i12> @ret_v3i12(i12 %v1, i12 %v2) {58 ; CHECK-LABEL: name: ret_v3i1259 ; CHECK: bb.1 (%ir-block.0):60 ; CHECK-NEXT: liveins: $w0, $w161 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w063 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)64 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w165 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)66 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<3 x s12>) = G_IMPLICIT_DEF67 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 068 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 169 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 270 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<3 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s12), [[C]](s64)71 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<3 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC1]](s12), [[C1]](s64)72 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<3 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC1]](s12), [[C2]](s64)73 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s12), [[UV1:%[0-9]+]]:_(s12), [[UV2:%[0-9]+]]:_(s12) = G_UNMERGE_VALUES [[IVEC2]](<3 x s12>)74 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s12)75 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s12)76 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s12)77 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)78 ; CHECK-NEXT: $w1 = COPY [[ANYEXT1]](s32)79 ; CHECK-NEXT: $w2 = COPY [[ANYEXT2]](s32)80 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w281 %a = insertelement <3 x i12> poison, i12 %v1, i32 082 %b = insertelement <3 x i12> %a, i12 %v2, i32 183 %c = insertelement <3 x i12> %b, i12 %v2, i32 284 ret <3 x i12> %c85}86 87define <4 x i12> @ret_v4i12(i12 %v1, i12 %v2) {88 ; CHECK-LABEL: name: ret_v4i1289 ; CHECK: bb.1 (%ir-block.0):90 ; CHECK-NEXT: liveins: $w0, $w191 ; CHECK-NEXT: {{ $}}92 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w093 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)94 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w195 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)96 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s12>) = G_IMPLICIT_DEF97 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 098 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 199 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2100 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3101 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s12), [[C]](s64)102 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<4 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC1]](s12), [[C1]](s64)103 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<4 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s12), [[C2]](s64)104 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<4 x s12>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s12), [[C3]](s64)105 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[IVEC3]](<4 x s12>)106 ; CHECK-NEXT: $d0 = COPY [[ANYEXT]](<4 x s16>)107 ; CHECK-NEXT: RET_ReallyLR implicit $d0108 %a = insertelement <4 x i12> poison, i12 %v1, i32 0109 %b = insertelement <4 x i12> %a, i12 %v2, i32 1110 %c = insertelement <4 x i12> %b, i12 %v1, i32 2111 %d = insertelement <4 x i12> %c, i12 %v2, i32 3112 ret <4 x i12> %d113}114 115define <5 x i12> @ret_v5i12(i12 %v1, i12 %v2) {116 ; CHECK-LABEL: name: ret_v5i12117 ; CHECK: bb.1 (%ir-block.0):118 ; CHECK-NEXT: liveins: $w0, $w1119 ; CHECK-NEXT: {{ $}}120 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0121 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)122 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1123 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)124 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<5 x s12>) = G_IMPLICIT_DEF125 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0126 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1127 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2128 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3129 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4130 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<5 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC1]](s12), [[C]](s64)131 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<5 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC]](s12), [[C1]](s64)132 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<5 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s12), [[C2]](s64)133 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<5 x s12>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s12), [[C3]](s64)134 ; CHECK-NEXT: [[IVEC4:%[0-9]+]]:_(<5 x s12>) = G_INSERT_VECTOR_ELT [[IVEC3]], [[TRUNC1]](s12), [[C4]](s64)135 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s12), [[UV1:%[0-9]+]]:_(s12), [[UV2:%[0-9]+]]:_(s12), [[UV3:%[0-9]+]]:_(s12), [[UV4:%[0-9]+]]:_(s12) = G_UNMERGE_VALUES [[IVEC4]](<5 x s12>)136 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s12)137 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s12)138 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s12)139 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s12)140 ; CHECK-NEXT: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s12)141 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)142 ; CHECK-NEXT: $w1 = COPY [[ANYEXT1]](s32)143 ; CHECK-NEXT: $w2 = COPY [[ANYEXT2]](s32)144 ; CHECK-NEXT: $w3 = COPY [[ANYEXT3]](s32)145 ; CHECK-NEXT: $w4 = COPY [[ANYEXT4]](s32)146 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w2, implicit $w3, implicit $w4147 %a = insertelement <5 x i12> poison, i12 %v2, i32 0148 %b = insertelement <5 x i12> %a, i12 %v1, i32 1149 %c = insertelement <5 x i12> %b, i12 %v1, i32 2150 %d = insertelement <5 x i12> %c, i12 %v2, i32 3151 %e = insertelement <5 x i12> %d, i12 %v2, i32 4152 ret <5 x i12> %e153}154 155define <6 x i12> @ret_v6i12(i12 %v1, i12 %v2) {156 ; CHECK-LABEL: name: ret_v6i12157 ; CHECK: bb.1 (%ir-block.0):158 ; CHECK-NEXT: liveins: $w0, $w1159 ; CHECK-NEXT: {{ $}}160 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0161 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)162 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1163 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)164 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<6 x s12>) = G_IMPLICIT_DEF165 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0166 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1167 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2168 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3169 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4170 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5171 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<6 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC1]](s12), [[C]](s64)172 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<6 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC]](s12), [[C1]](s64)173 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<6 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s12), [[C2]](s64)174 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<6 x s12>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s12), [[C3]](s64)175 ; CHECK-NEXT: [[IVEC4:%[0-9]+]]:_(<6 x s12>) = G_INSERT_VECTOR_ELT [[IVEC3]], [[TRUNC1]](s12), [[C4]](s64)176 ; CHECK-NEXT: [[IVEC5:%[0-9]+]]:_(<6 x s12>) = G_INSERT_VECTOR_ELT [[IVEC4]], [[TRUNC]](s12), [[C5]](s64)177 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s12), [[UV1:%[0-9]+]]:_(s12), [[UV2:%[0-9]+]]:_(s12), [[UV3:%[0-9]+]]:_(s12), [[UV4:%[0-9]+]]:_(s12), [[UV5:%[0-9]+]]:_(s12) = G_UNMERGE_VALUES [[IVEC5]](<6 x s12>)178 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s12)179 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s12)180 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s12)181 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s12)182 ; CHECK-NEXT: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s12)183 ; CHECK-NEXT: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s12)184 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)185 ; CHECK-NEXT: $w1 = COPY [[ANYEXT1]](s32)186 ; CHECK-NEXT: $w2 = COPY [[ANYEXT2]](s32)187 ; CHECK-NEXT: $w3 = COPY [[ANYEXT3]](s32)188 ; CHECK-NEXT: $w4 = COPY [[ANYEXT4]](s32)189 ; CHECK-NEXT: $w5 = COPY [[ANYEXT5]](s32)190 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w2, implicit $w3, implicit $w4, implicit $w5191 %a = insertelement <6 x i12> poison, i12 %v2, i32 0192 %b = insertelement <6 x i12> %a, i12 %v1, i32 1193 %c = insertelement <6 x i12> %b, i12 %v1, i32 2194 %d = insertelement <6 x i12> %c, i12 %v2, i32 3195 %e = insertelement <6 x i12> %d, i12 %v2, i32 4196 %f = insertelement <6 x i12> %e, i12 %v1, i32 5197 ret <6 x i12> %f198}199 200define <7 x i12> @ret_v7i12(i12 %v1, i12 %v2) {201 ; CHECK-LABEL: name: ret_v7i12202 ; CHECK: bb.1 (%ir-block.0):203 ; CHECK-NEXT: liveins: $w0, $w1204 ; CHECK-NEXT: {{ $}}205 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0206 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)207 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1208 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)209 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<7 x s12>) = G_IMPLICIT_DEF210 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0211 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1212 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2213 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3214 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4215 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5216 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6217 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC1]](s12), [[C]](s64)218 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC]](s12), [[C1]](s64)219 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s12), [[C2]](s64)220 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s12), [[C3]](s64)221 ; CHECK-NEXT: [[IVEC4:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[IVEC3]], [[TRUNC1]](s12), [[C4]](s64)222 ; CHECK-NEXT: [[IVEC5:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[IVEC4]], [[TRUNC]](s12), [[C5]](s64)223 ; CHECK-NEXT: [[IVEC6:%[0-9]+]]:_(<7 x s12>) = G_INSERT_VECTOR_ELT [[IVEC5]], [[TRUNC]](s12), [[C6]](s64)224 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s12), [[UV1:%[0-9]+]]:_(s12), [[UV2:%[0-9]+]]:_(s12), [[UV3:%[0-9]+]]:_(s12), [[UV4:%[0-9]+]]:_(s12), [[UV5:%[0-9]+]]:_(s12), [[UV6:%[0-9]+]]:_(s12) = G_UNMERGE_VALUES [[IVEC6]](<7 x s12>)225 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UV]](s12)226 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[UV1]](s12)227 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[UV2]](s12)228 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[UV3]](s12)229 ; CHECK-NEXT: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[UV4]](s12)230 ; CHECK-NEXT: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[UV5]](s12)231 ; CHECK-NEXT: [[ANYEXT6:%[0-9]+]]:_(s32) = G_ANYEXT [[UV6]](s12)232 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)233 ; CHECK-NEXT: $w1 = COPY [[ANYEXT1]](s32)234 ; CHECK-NEXT: $w2 = COPY [[ANYEXT2]](s32)235 ; CHECK-NEXT: $w3 = COPY [[ANYEXT3]](s32)236 ; CHECK-NEXT: $w4 = COPY [[ANYEXT4]](s32)237 ; CHECK-NEXT: $w5 = COPY [[ANYEXT5]](s32)238 ; CHECK-NEXT: $w6 = COPY [[ANYEXT6]](s32)239 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w1, implicit $w2, implicit $w3, implicit $w4, implicit $w5, implicit $w6240 %a = insertelement <7 x i12> poison, i12 %v2, i32 0241 %b = insertelement <7 x i12> %a, i12 %v1, i32 1242 %c = insertelement <7 x i12> %b, i12 %v1, i32 2243 %d = insertelement <7 x i12> %c, i12 %v2, i32 3244 %e = insertelement <7 x i12> %d, i12 %v2, i32 4245 %f = insertelement <7 x i12> %e, i12 %v1, i32 5246 %g = insertelement <7 x i12> %f, i12 %v1, i32 6247 ret <7 x i12> %g248}249 250define <8 x i12> @ret_v8i12(i12 %v1, i12 %v2) {251 ; CHECK-LABEL: name: ret_v8i12252 ; CHECK: bb.1 (%ir-block.0):253 ; CHECK-NEXT: liveins: $w0, $w1254 ; CHECK-NEXT: {{ $}}255 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0256 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY]](s32)257 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1258 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)259 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<8 x s12>) = G_IMPLICIT_DEF260 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0261 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1262 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2263 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3264 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4265 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5266 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6267 ; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7268 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC1]](s12), [[C]](s64)269 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC]](s12), [[C1]](s64)270 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s12), [[C2]](s64)271 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s12), [[C3]](s64)272 ; CHECK-NEXT: [[IVEC4:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC3]], [[TRUNC1]](s12), [[C4]](s64)273 ; CHECK-NEXT: [[IVEC5:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC4]], [[TRUNC]](s12), [[C5]](s64)274 ; CHECK-NEXT: [[IVEC6:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC5]], [[TRUNC]](s12), [[C6]](s64)275 ; CHECK-NEXT: [[IVEC7:%[0-9]+]]:_(<8 x s12>) = G_INSERT_VECTOR_ELT [[IVEC6]], [[TRUNC]](s12), [[C7]](s64)276 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT [[IVEC7]](<8 x s12>)277 ; CHECK-NEXT: $q0 = COPY [[ANYEXT]](<8 x s16>)278 ; CHECK-NEXT: RET_ReallyLR implicit $q0279 %a = insertelement <8 x i12> poison, i12 %v2, i32 0280 %b = insertelement <8 x i12> %a, i12 %v1, i32 1281 %c = insertelement <8 x i12> %b, i12 %v1, i32 2282 %d = insertelement <8 x i12> %c, i12 %v2, i32 3283 %e = insertelement <8 x i12> %d, i12 %v2, i32 4284 %f = insertelement <8 x i12> %e, i12 %v1, i32 5285 %g = insertelement <8 x i12> %f, i12 %v1, i32 6286 %h = insertelement <8 x i12> %g, i12 %v1, i32 7287 ret <8 x i12> %h288}289 290define <12 x i12> @ret_v12i12(i12 %v1, i12 %v2) {291 ; CHECK-LABEL: name: ret_v12i12292 ; CHECK: bb.1 (%ir-block.0):293 ; CHECK-NEXT: liveins: $w0, $w1, $x8294 ; CHECK-NEXT: {{ $}}295 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8296 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w0297 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s12) = G_TRUNC [[COPY1]](s32)298 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w1299 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s12) = G_TRUNC [[COPY2]](s32)300 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<12 x s12>) = G_IMPLICIT_DEF301 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0302 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1303 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2304 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3305 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4306 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5307 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6308 ; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7309 ; CHECK-NEXT: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 8310 ; CHECK-NEXT: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 9311 ; CHECK-NEXT: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 10312 ; CHECK-NEXT: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 11313 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC1]](s12), [[C]](s64)314 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC]](s12), [[C1]](s64)315 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s12), [[C2]](s64)316 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s12), [[C3]](s64)317 ; CHECK-NEXT: [[IVEC4:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC3]], [[TRUNC1]](s12), [[C4]](s64)318 ; CHECK-NEXT: [[IVEC5:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC4]], [[TRUNC]](s12), [[C5]](s64)319 ; CHECK-NEXT: [[IVEC6:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC5]], [[TRUNC]](s12), [[C6]](s64)320 ; CHECK-NEXT: [[IVEC7:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC6]], [[TRUNC]](s12), [[C7]](s64)321 ; CHECK-NEXT: [[IVEC8:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC7]], [[TRUNC]](s12), [[C8]](s64)322 ; CHECK-NEXT: [[IVEC9:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC8]], [[TRUNC]](s12), [[C9]](s64)323 ; CHECK-NEXT: [[IVEC10:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC9]], [[TRUNC]](s12), [[C10]](s64)324 ; CHECK-NEXT: [[IVEC11:%[0-9]+]]:_(<12 x s12>) = G_INSERT_VECTOR_ELT [[IVEC10]], [[TRUNC]](s12), [[C11]](s64)325 ; CHECK-NEXT: G_STORE [[IVEC11]](<12 x s12>), [[COPY]](p0) :: (store (<12 x s12>), align 32)326 ; CHECK-NEXT: RET_ReallyLR327 %a = insertelement <12 x i12> poison, i12 %v2, i32 0328 %b = insertelement <12 x i12> %a, i12 %v1, i32 1329 %c = insertelement <12 x i12> %b, i12 %v1, i32 2330 %d = insertelement <12 x i12> %c, i12 %v2, i32 3331 %e = insertelement <12 x i12> %d, i12 %v2, i32 4332 %f = insertelement <12 x i12> %e, i12 %v1, i32 5333 %g = insertelement <12 x i12> %f, i12 %v1, i32 6334 %h = insertelement <12 x i12> %g, i12 %v1, i32 7335 %i = insertelement <12 x i12> %h, i12 %v1, i32 8336 %j = insertelement <12 x i12> %i, i12 %v1, i32 9337 %k = insertelement <12 x i12> %j, i12 %v1, i32 10338 %l = insertelement <12 x i12> %k, i12 %v1, i32 11339 ret <12 x i12> %l340}341 342 343define <1 x i100> @ret_v1i100(i100 %v1, i100 %v2) {344 ; CHECK-LABEL: name: ret_v1i100345 ; CHECK: bb.1 (%ir-block.0):346 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x3347 ; CHECK-NEXT: {{ $}}348 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0349 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1350 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)351 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s100) = G_TRUNC [[MV]](s128)352 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2353 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3354 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY2]](s64), [[COPY3]](s64)355 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s100) = G_TRUNC [[MV1]](s128)356 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[TRUNC]](s100)357 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[ANYEXT]](s128)358 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)359 ; CHECK-NEXT: $x1 = COPY [[UV1]](s64)360 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1361 %a = insertelement <1 x i100> poison, i100 %v1, i32 0362 ret <1 x i100> %a363}364 365define <2 x i100> @ret_v2i100(i100 %v1, i100 %v2) {366 ; CHECK-LABEL: name: ret_v2i100367 ; CHECK: bb.1 (%ir-block.0):368 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x3369 ; CHECK-NEXT: {{ $}}370 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0371 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1372 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)373 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s100) = G_TRUNC [[MV]](s128)374 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2375 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3376 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY2]](s64), [[COPY3]](s64)377 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s100) = G_TRUNC [[MV1]](s128)378 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s100>) = G_IMPLICIT_DEF379 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0380 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1381 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s100>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s100), [[C]](s64)382 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<2 x s100>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC1]](s100), [[C1]](s64)383 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<2 x s128>) = G_ANYEXT [[IVEC1]](<2 x s100>)384 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[ANYEXT]](<2 x s128>)385 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)386 ; CHECK-NEXT: $x1 = COPY [[UV1]](s64)387 ; CHECK-NEXT: $x2 = COPY [[UV2]](s64)388 ; CHECK-NEXT: $x3 = COPY [[UV3]](s64)389 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1, implicit $x2, implicit $x3390 %a = insertelement <2 x i100> poison, i100 %v1, i32 0391 %b = insertelement <2 x i100> %a, i100 %v2, i32 1392 ret <2 x i100> %b393}394 395define <3 x i100> @ret_v3i100(i100 %v1, i100 %v2) {396 ; CHECK-LABEL: name: ret_v3i100397 ; CHECK: bb.1 (%ir-block.0):398 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x3399 ; CHECK-NEXT: {{ $}}400 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0401 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1402 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)403 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s100) = G_TRUNC [[MV]](s128)404 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2405 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3406 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY2]](s64), [[COPY3]](s64)407 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s100) = G_TRUNC [[MV1]](s128)408 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<3 x s100>) = G_IMPLICIT_DEF409 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0410 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1411 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2412 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<3 x s100>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s100), [[C]](s64)413 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<3 x s100>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC1]](s100), [[C1]](s64)414 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<3 x s100>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC1]](s100), [[C2]](s64)415 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<3 x s128>) = G_ANYEXT [[IVEC2]](<3 x s100>)416 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[ANYEXT]](<3 x s128>)417 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)418 ; CHECK-NEXT: $x1 = COPY [[UV1]](s64)419 ; CHECK-NEXT: $x2 = COPY [[UV2]](s64)420 ; CHECK-NEXT: $x3 = COPY [[UV3]](s64)421 ; CHECK-NEXT: $x4 = COPY [[UV4]](s64)422 ; CHECK-NEXT: $x5 = COPY [[UV5]](s64)423 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1, implicit $x2, implicit $x3, implicit $x4, implicit $x5424 %a = insertelement <3 x i100> poison, i100 %v1, i32 0425 %b = insertelement <3 x i100> %a, i100 %v2, i32 1426 %c = insertelement <3 x i100> %b, i100 %v2, i32 2427 ret <3 x i100> %c428}429 430define <4 x i100> @ret_v4i100(i100 %v1, i100 %v2) {431 ; CHECK-LABEL: name: ret_v4i100432 ; CHECK: bb.1 (%ir-block.0):433 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $x3434 ; CHECK-NEXT: {{ $}}435 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0436 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1437 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[COPY1]](s64)438 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s100) = G_TRUNC [[MV]](s128)439 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2440 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3441 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY2]](s64), [[COPY3]](s64)442 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s100) = G_TRUNC [[MV1]](s128)443 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s100>) = G_IMPLICIT_DEF444 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0445 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1446 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2447 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3448 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s100>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s100), [[C]](s64)449 ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<4 x s100>) = G_INSERT_VECTOR_ELT [[IVEC]], [[TRUNC1]](s100), [[C1]](s64)450 ; CHECK-NEXT: [[IVEC2:%[0-9]+]]:_(<4 x s100>) = G_INSERT_VECTOR_ELT [[IVEC1]], [[TRUNC]](s100), [[C2]](s64)451 ; CHECK-NEXT: [[IVEC3:%[0-9]+]]:_(<4 x s100>) = G_INSERT_VECTOR_ELT [[IVEC2]], [[TRUNC1]](s100), [[C3]](s64)452 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<4 x s128>) = G_ANYEXT [[IVEC3]](<4 x s100>)453 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64), [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[ANYEXT]](<4 x s128>)454 ; CHECK-NEXT: $x0 = COPY [[UV]](s64)455 ; CHECK-NEXT: $x1 = COPY [[UV1]](s64)456 ; CHECK-NEXT: $x2 = COPY [[UV2]](s64)457 ; CHECK-NEXT: $x3 = COPY [[UV3]](s64)458 ; CHECK-NEXT: $x4 = COPY [[UV4]](s64)459 ; CHECK-NEXT: $x5 = COPY [[UV5]](s64)460 ; CHECK-NEXT: $x6 = COPY [[UV6]](s64)461 ; CHECK-NEXT: $x7 = COPY [[UV7]](s64)462 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $x1, implicit $x2, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7463 %a = insertelement <4 x i100> poison, i100 %v1, i32 0464 %b = insertelement <4 x i100> %a, i100 %v2, i32 1465 %c = insertelement <4 x i100> %b, i100 %v1, i32 2466 %d = insertelement <4 x i100> %c, i100 %v2, i32 3467 ret <4 x i100> %d468}469