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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3--- |4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"5 target triple = "aarch64"6 7 define i8 @load_acq_i8(ptr %ptr) {8 %v = load atomic i8, ptr %ptr acquire, align 89 ret i8 %v10 }11 12 define i32 @anyext_load_monotonic_i32() {13 %v = load atomic i32, ptr null monotonic, align 414 ret i32 %v15 }16 17...18---19name: load_acq_i820alignment: 421legalized: true22regBankSelected: true23tracksRegLiveness: true24liveins:25 - { reg: '$x0' }26machineFunctionInfo: {}27body: |28 bb.1:29 liveins: $x030 31 ; CHECK-LABEL: name: load_acq_i832 ; CHECK: liveins: $x033 ; CHECK-NEXT: {{ $}}34 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x035 ; CHECK-NEXT: [[LDARB:%[0-9]+]]:gpr32 = LDARB [[COPY]] :: (load acquire (s8) from %ir.ptr, align 8)36 ; CHECK-NEXT: $w0 = COPY [[LDARB]]37 ; CHECK-NEXT: RET_ReallyLR implicit $w038 %0:gpr(p0) = COPY $x039 %2:gpr(s32) = G_LOAD %0(p0) :: (load acquire (s8) from %ir.ptr, align 8)40 $w0 = COPY %2(s32)41 RET_ReallyLR implicit $w042 43...44---45name: anyext_load_monotonic_i3246legalized: true47regBankSelected: true48tracksRegLiveness: true49body: |50 bb.1:51 ; CHECK-LABEL: name: anyext_load_monotonic_i3252 ; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $xzr53 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load monotonic (s32) from `ptr null`)54 ; CHECK-NEXT: %ld:gpr64all = SUBREG_TO_REG 0, [[LDRWui]], %subreg.sub_3255 ; CHECK-NEXT: $x0 = COPY %ld56 ; CHECK-NEXT: RET_ReallyLR implicit $x057 %1:gpr(p0) = G_CONSTANT i64 058 %ld:gpr(s64) = G_LOAD %1(p0) :: (load monotonic (s32) from `ptr null`)59 $x0 = COPY %ld(s64)60 RET_ReallyLR implicit $x061 62...63