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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3 4--- |5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"6 7 define void @aextload_s32_from_s16(ptr %addr) { ret void }8 9 define void @aextload_s32_from_s16_not_combined(ptr %addr) { ret void }10...11 12---13name: aextload_s32_from_s1614legalized: true15regBankSelected: true16 17body: |18 bb.0:19 liveins: $x020 21 ; CHECK-LABEL: name: aextload_s32_from_s1622 ; CHECK: liveins: $x023 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x025 ; CHECK-NEXT: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load (s16) from %ir.addr)26 ; CHECK-NEXT: $w0 = COPY [[LDRHHui]]27 %0:gpr(p0) = COPY $x028 %1:gpr(s32) = G_LOAD %0 :: (load (s16) from %ir.addr)29 $w0 = COPY %1(s32)30...31 32---33name: aextload_s32_from_s16_not_combined34legalized: true35regBankSelected: true36 37body: |38 bb.0:39 liveins: $x040 41 ; CHECK-LABEL: name: aextload_s32_from_s16_not_combined42 ; CHECK: liveins: $x043 ; CHECK-NEXT: {{ $}}44 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x045 ; CHECK-NEXT: [[LDRHHui:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load (s16) from %ir.addr)46 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRHHui]]47 ; CHECK-NEXT: $w0 = COPY [[COPY1]]48 %0:gpr(p0) = COPY $x049 %1:gpr(s16) = G_LOAD %0 :: (load (s16) from %ir.addr)50 %2:gpr(s32) = G_ANYEXT %151 $w0 = COPY %2(s32)52...53