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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-unknown-unknown -o - -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s3 4# When we select the G_ZEXTLOAD, the SUBREG_TO_REG will initially land on a5# gpr64sp register.6#7# This caused a test failure when selecting the G_BRJT, because it was not being8# constrained. This test checks that the G_BRJT is actually being constrained.9# As a result, the SUBREG_TO_REG should end up on a gpr64common.10 11...12---13name:            check_constrain14legalized:       true15regBankSelected: true16tracksRegLiveness: true17jumpTable:18  kind:            block-address19  entries:20    - id:              021      blocks:          [ '%bb.4' ]22body:             |23  ; CHECK-LABEL: name: check_constrain24  ; CHECK: bb.0:25  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.1(0x40000000)26  ; CHECK-NEXT: {{  $}}27  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr64common = IMPLICIT_DEF28  ; CHECK-NEXT:   [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[DEF]], 0 :: (load (s8))29  ; CHECK-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG 0, [[LDRBBui]], %subreg.sub_3230  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 8, 0, implicit-def $nzcv31  ; CHECK-NEXT:   Bcc 8, %bb.3, implicit $nzcv32  ; CHECK-NEXT: {{  $}}33  ; CHECK-NEXT: bb.1:34  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)35  ; CHECK-NEXT: {{  $}}36  ; CHECK-NEXT:   [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.037  ; CHECK-NEXT:   early-clobber %5:gpr64, early-clobber %6:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.038  ; CHECK-NEXT:   JUMP_TABLE_DEBUG_INFO 039  ; CHECK-NEXT:   BR %540  ; CHECK-NEXT: {{  $}}41  ; CHECK-NEXT: bb.2:42  ; CHECK-NEXT:   successors: %bb.3(0x80000000)43  ; CHECK-NEXT: {{  $}}44  ; CHECK-NEXT:   B %bb.345  ; CHECK-NEXT: {{  $}}46  ; CHECK-NEXT: bb.3:47  ; CHECK-NEXT:   RET_ReallyLR48  bb.1:49    %1:gpr(p0) = G_IMPLICIT_DEF50    %5:gpr(s64) = G_ZEXTLOAD %1(p0) :: (load (s8))51    %7:gpr(s64) = G_CONSTANT i64 852    %16:gpr(s32) = G_ICMP intpred(ugt), %5(s64), %753    G_BRCOND %16, %bb.454 55  bb.2:56    successors: %bb.3, %bb.457 58    %9:gpr(p0) = G_JUMP_TABLE %jump-table.059    G_BRJT %9(p0), %jump-table.0, %5(s64)60 61  bb.3:62    G_BR %bb.463 64  bb.4:65    RET_ReallyLR66 67...68