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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s3 4--- |5 define i32 @main() {6 entry:7 ret i32 08 }9 10 declare i32 @printf(ptr, ...)11...12---13name: main14alignment: 415exposesReturnsTwice: false16legalized: true17regBankSelected: true18selected: false19tracksRegLiveness: true20registers:21 - { id: 0, class: gpr }22 - { id: 1, class: gpr }23 - { id: 2, class: gpr }24 - { id: 3, class: gpr }25 - { id: 4, class: gpr }26 - { id: 5, class: gpr }27 - { id: 6, class: gpr }28 - { id: 7, class: gpr }29 - { id: 8, class: gpr }30 - { id: 9, class: gpr }31 - { id: 10, class: gpr }32 - { id: 11, class: gpr }33 - { id: 12, class: gpr }34 - { id: 13, class: gpr }35 - { id: 14, class: gpr }36 - { id: 15, class: gpr }37frameInfo:38 isFrameAddressTaken: false39 isReturnAddressTaken: false40 hasStackMap: false41 hasPatchPoint: false42 stackSize: 043 offsetAdjustment: 044 maxAlignment: 845 adjustsStack: false46 hasCalls: true47 maxCallFrameSize: 048 hasOpaqueSPAdjustment: false49 hasVAStart: false50 hasMustTailInVarArgFunc: false51body: |52 bb.1.entry:53 liveins: $w054 ; CHECK-LABEL: name: main55 ; CHECK: liveins: $w056 ; CHECK-NEXT: {{ $}}57 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w058 ; CHECK-NEXT: [[ORNWrr:%[0-9]+]]:gpr32 = ORNWrr $wzr, [[COPY]]59 ; CHECK-NEXT: [[EORWri:%[0-9]+]]:gpr32sp = EORWri [[ORNWrr]], 060 ; CHECK-NEXT: $w0 = COPY [[EORWri]]61 %0(s32) = G_CONSTANT i32 -162 %3(s32) = G_CONSTANT i32 163 %1(s32) = COPY $w064 %2(s32) = G_XOR %1, %065 %4(s32) = G_XOR %2, %366 $w0 = COPY %4(s32)67...68