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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=aarch64-- -O0 -run-pass=instruction-select -verify-machineinstrs %s -global-isel-abort=1 -o - | FileCheck %s3 4# This test checks that a shuffle mask with an undef value, instead of a constant,5# doesn't crash. The code generated definitely isn't optimal.6...7---8name: shuffle_undef_mask_elt9alignment: 410legalized: true11regBankSelected: true12tracksRegLiveness: true13machineFunctionInfo: {}14body: |15 bb.1:16 liveins: $d017 18 ; CHECK-LABEL: name: shuffle_undef_mask_elt19 ; CHECK: liveins: $d020 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d022 ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF23 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF24 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[DEF]], %subreg.ssub25 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY [[INSERT_SUBREG]].dsub26 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) %const.027 ; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s64) from constant-pool)28 ; CHECK-NEXT: [[DEF2:%[0-9]+]]:fpr128 = IMPLICIT_DEF29 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF2]], [[COPY]], %subreg.dsub30 ; CHECK-NEXT: [[DEF3:%[0-9]+]]:fpr128 = IMPLICIT_DEF31 ; CHECK-NEXT: [[INSERT_SUBREG2:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF3]], [[COPY1]], %subreg.dsub32 ; CHECK-NEXT: [[INSvi64lane:%[0-9]+]]:fpr128 = INSvi64lane [[INSERT_SUBREG1]], 1, [[INSERT_SUBREG2]], 033 ; CHECK-NEXT: [[DEF4:%[0-9]+]]:fpr128 = IMPLICIT_DEF34 ; CHECK-NEXT: [[INSERT_SUBREG3:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF4]], [[LDRDui]], %subreg.dsub35 ; CHECK-NEXT: [[TBLv16i8One:%[0-9]+]]:fpr128 = TBLv16i8One [[INSvi64lane]], [[INSERT_SUBREG3]]36 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY [[TBLv16i8One]].dsub37 ; CHECK-NEXT: $d0 = COPY [[COPY2]]38 ; CHECK-NEXT: RET_ReallyLR implicit $d039 %0:fpr(<2 x s32>) = COPY $d040 %6:gpr(s32) = G_IMPLICIT_DEF41 %7:gpr(s32) = G_IMPLICIT_DEF42 %2:fpr(<2 x s32>) = G_BUILD_VECTOR %6(s32), %7(s32)43 %1:fpr(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %2, shufflemask(1, undef)44 $d0 = COPY %1(<2 x s32>)45 RET_ReallyLR implicit $d046 47...48