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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc < %s -mtriple aarch64 -mattr=+sve -aarch64-enable-gisel-sve=1 | FileCheck %s --check-prefixes=CHECK,CHECK-SDAG3; RUN: llc < %s -mtriple aarch64 -mattr=+sve -aarch64-enable-gisel-sve=1 -use-constant-int-for-scalable-splat | FileCheck %s --check-prefixes=CHECK,CHECK-SDAG4; RUN: llc < %s -mtriple aarch64 -mattr=+sve -global-isel -aarch64-enable-gisel-sve=1 | FileCheck %s --check-prefixes=CHECK,CHECK-GS5; RUN: llc < %s -mtriple aarch64 -mattr=+sve -global-isel -aarch64-enable-gisel-sve=1 -use-constant-int-for-scalable-splat | FileCheck %s --check-prefixes=CHECK,CHECK-GS6 7;; add8define <vscale x 2 x i64> @addnxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {9; CHECK-SDAG-LABEL: addnxv2i64:10; CHECK-SDAG: // %bb.0: // %entry11; CHECK-SDAG-NEXT: add z0.d, z0.d, #9 // =0x912; CHECK-SDAG-NEXT: ret13;14; CHECK-GS-LABEL: addnxv2i64:15; CHECK-GS: // %bb.0: // %entry16; CHECK-GS-NEXT: mov w8, #9 // =0x917; CHECK-GS-NEXT: mov z1.d, x818; CHECK-GS-NEXT: add z0.d, z0.d, z1.d19; CHECK-GS-NEXT: ret20entry:21 %c = add <vscale x 2 x i64> %a, splat (i64 9)22 ret <vscale x 2 x i64> %c23}24 25define <vscale x 2 x i64> @splarnxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {26; CHECK-SDAG-LABEL: splarnxv2i64:27; CHECK-SDAG: // %bb.0: // %entry28; CHECK-SDAG-NEXT: mov z0.d, #9 // =0x929; CHECK-SDAG-NEXT: ret30;31; CHECK-GS-LABEL: splarnxv2i64:32; CHECK-GS: // %bb.0: // %entry33; CHECK-GS-NEXT: mov w8, #9 // =0x934; CHECK-GS-NEXT: mov z0.d, x835; CHECK-GS-NEXT: ret36entry:37 ret <vscale x 2 x i64> splat (i64 9)38}39 40define <vscale x 4 x i32> @addnxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {41; CHECK-SDAG-LABEL: addnxv4i32:42; CHECK-SDAG: // %bb.0: // %entry43; CHECK-SDAG-NEXT: add z0.s, z0.s, #9 // =0x944; CHECK-SDAG-NEXT: ret45;46; CHECK-GS-LABEL: addnxv4i32:47; CHECK-GS: // %bb.0: // %entry48; CHECK-GS-NEXT: mov w8, #9 // =0x949; CHECK-GS-NEXT: mov z1.s, w850; CHECK-GS-NEXT: add z0.s, z0.s, z1.s51; CHECK-GS-NEXT: ret52entry:53 %c = add <vscale x 4 x i32> %a, splat (i32 9)54 ret <vscale x 4 x i32> %c55}56 57define <vscale x 4 x i32> @splatnxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {58; CHECK-SDAG-LABEL: splatnxv4i32:59; CHECK-SDAG: // %bb.0: // %entry60; CHECK-SDAG-NEXT: mov z0.s, #9 // =0x961; CHECK-SDAG-NEXT: ret62;63; CHECK-GS-LABEL: splatnxv4i32:64; CHECK-GS: // %bb.0: // %entry65; CHECK-GS-NEXT: mov w8, #9 // =0x966; CHECK-GS-NEXT: mov z0.s, w867; CHECK-GS-NEXT: ret68entry:69 ret <vscale x 4 x i32> splat (i32 9)70}71 72;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:73; CHECK: {{.*}}74