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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -verify-machineinstrs -mtriple aarch64-unknown-uknown -global-isel-abort=1 -run-pass=instruction-select %s -o - | FileCheck %s3 4...5---6name: uaddo_s327alignment: 48legalized: true9regBankSelected: true10tracksRegLiveness: true11body: |12 bb.1.entry:13 liveins: $w0, $w1, $x214 15 ; CHECK-LABEL: name: uaddo_s3216 ; CHECK: liveins: $w0, $w1, $x217 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w019 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w120 ; CHECK-NEXT: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv21 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv22 ; CHECK-NEXT: $w0 = COPY [[ADDSWrr]]23 ; CHECK-NEXT: $w1 = COPY [[CSINCWr]]24 ; CHECK-NEXT: RET_ReallyLR implicit $w0, implicit $w125 %0:gpr(s32) = COPY $w026 %1:gpr(s32) = COPY $w127 %3:gpr(s32), %4:gpr(s32) = G_UADDO %0, %128 $w0 = COPY %329 $w1 = COPY %430 RET_ReallyLR implicit $w0, implicit $w131 32...33---34name: uaddo_s6435alignment: 436legalized: true37regBankSelected: true38tracksRegLiveness: true39body: |40 bb.1.entry:41 liveins: $x0, $x1, $x242 43 ; CHECK-LABEL: name: uaddo_s6444 ; CHECK: liveins: $x0, $x1, $x245 ; CHECK-NEXT: {{ $}}46 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x047 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x148 ; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY1]], implicit-def $nzcv49 ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv50 ; CHECK-NEXT: $x0 = COPY [[ADDSXrr]]51 ; CHECK-NEXT: $w1 = COPY [[CSINCWr]]52 ; CHECK-NEXT: RET_ReallyLR implicit $x0, implicit $w153 %0:gpr(s64) = COPY $x054 %1:gpr(s64) = COPY $x155 %3:gpr(s64), %4:gpr(s32) = G_UADDO %0, %156 $x0 = COPY %357 $w1 = COPY %458 RET_ReallyLR implicit $x0, implicit $w159 60...61---62name: uaddo_s32_imm63alignment: 464legalized: true65regBankSelected: true66tracksRegLiveness: true67body: |68 bb.1.entry:69 liveins: $w0, $w1, $x270 ; Check that we get ADDSWri when we can fold in a constant.71 ; CHECK-LABEL: name: uaddo_s32_imm72 ; CHECK: liveins: $w0, $w1, $x273 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: %copy:gpr32sp = COPY $w075 ; CHECK-NEXT: %add:gpr32 = ADDSWri %copy, 16, 0, implicit-def $nzcv76 ; CHECK-NEXT: $w0 = COPY %add77 ; CHECK-NEXT: RET_ReallyLR implicit $w078 %copy:gpr(s32) = COPY $w079 %constant:gpr(s32) = G_CONSTANT i32 1680 %add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy, %constant81 $w0 = COPY %add(s32)82 RET_ReallyLR implicit $w083 84...85---86name: uaddo_s32_shifted87alignment: 488legalized: true89regBankSelected: true90tracksRegLiveness: true91body: |92 bb.1.entry:93 liveins: $w0, $w1, $x294 ; Check that we get ADDSWrs when we can fold in a shift.95 ; CHECK-LABEL: name: uaddo_s32_shifted96 ; CHECK: liveins: $w0, $w1, $x297 ; CHECK-NEXT: {{ $}}98 ; CHECK-NEXT: %copy1:gpr32 = COPY $w099 ; CHECK-NEXT: %copy2:gpr32 = COPY $w1100 ; CHECK-NEXT: %add:gpr32 = ADDSWrs %copy1, %copy2, 16, implicit-def $nzcv101 ; CHECK-NEXT: $w0 = COPY %add102 ; CHECK-NEXT: RET_ReallyLR implicit $w0103 %copy1:gpr(s32) = COPY $w0104 %copy2:gpr(s32) = COPY $w1105 %constant:gpr(s32) = G_CONSTANT i32 16106 %shift:gpr(s32) = G_SHL %copy2(s32), %constant(s32)107 %add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy1, %shift108 $w0 = COPY %add(s32)109 RET_ReallyLR implicit $w0110 111...112---113name: uaddo_s32_neg_imm114alignment: 4115legalized: true116regBankSelected: true117tracksRegLiveness: true118body: |119 bb.1.entry:120 liveins: $w0, $w1, $x2121 ; Check that we get SUBSWri when we can fold in a negative constant.122 ; CHECK-LABEL: name: uaddo_s32_neg_imm123 ; CHECK: liveins: $w0, $w1, $x2124 ; CHECK-NEXT: {{ $}}125 ; CHECK-NEXT: %copy:gpr32sp = COPY $w0126 ; CHECK-NEXT: %add:gpr32 = SUBSWri %copy, 16, 0, implicit-def $nzcv127 ; CHECK-NEXT: $w0 = COPY %add128 ; CHECK-NEXT: RET_ReallyLR implicit $w0129 %copy:gpr(s32) = COPY $w0130 %constant:gpr(s32) = G_CONSTANT i32 -16131 %add:gpr(s32), %overflow:gpr(s32) = G_UADDO %copy, %constant132 $w0 = COPY %add(s32)133 RET_ReallyLR implicit $w0134 135...136---137name: uaddo_arith_extended138alignment: 4139legalized: true140regBankSelected: true141tracksRegLiveness: true142body: |143 bb.1.entry:144 liveins: $w0, $x0145 ; Check that we get ADDSXrx.146 ; CHECK-LABEL: name: uaddo_arith_extended147 ; CHECK: liveins: $w0, $x0148 ; CHECK-NEXT: {{ $}}149 ; CHECK-NEXT: %reg0:gpr64sp = COPY $x0150 ; CHECK-NEXT: %reg1:gpr32 = COPY $w0151 ; CHECK-NEXT: %add:gpr64 = ADDSXrx %reg0, %reg1, 18, implicit-def $nzcv152 ; CHECK-NEXT: $x0 = COPY %add153 ; CHECK-NEXT: RET_ReallyLR implicit $x0154 %reg0:gpr(s64) = COPY $x0155 %reg1:gpr(s32) = COPY $w0156 %ext:gpr(s64) = G_ZEXT %reg1(s32)157 %cst:gpr(s64) = G_CONSTANT i64 2158 %shift:gpr(s64) = G_SHL %ext, %cst(s64)159 %add:gpr(s64), %flags:gpr(s32) = G_UADDO %reg0, %shift160 $x0 = COPY %add(s64)161 RET_ReallyLR implicit $x0162