149 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2#3# Check that we can select G_ZIP1 and G_ZIP2 via the tablegen importer.4#5# RUN: llc -mtriple aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s6 7...8---9name: zip1_v2s3210alignment: 411legalized: true12regBankSelected: true13tracksRegLiveness: true14body: |15 bb.1.entry:16 liveins: $d0, $d117 18 ; CHECK-LABEL: name: zip1_v2s3219 ; CHECK: liveins: $d0, $d120 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d022 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d123 ; CHECK-NEXT: [[ZIP1v2i32_:%[0-9]+]]:fpr64 = ZIP1v2i32 [[COPY]], [[COPY1]]24 ; CHECK-NEXT: $d0 = COPY [[ZIP1v2i32_]]25 ; CHECK-NEXT: RET_ReallyLR implicit $d026 %0:fpr(<2 x s32>) = COPY $d027 %1:fpr(<2 x s32>) = COPY $d128 %2:fpr(<2 x s32>) = G_ZIP1 %0, %129 $d0 = COPY %2(<2 x s32>)30 RET_ReallyLR implicit $d031...32---33name: zip1_v2s6434alignment: 435legalized: true36regBankSelected: true37tracksRegLiveness: true38body: |39 bb.1.entry:40 liveins: $q0, $q141 42 ; CHECK-LABEL: name: zip1_v2s6443 ; CHECK: liveins: $q0, $q144 ; CHECK-NEXT: {{ $}}45 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q046 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q147 ; CHECK-NEXT: [[ZIP1v2i64_:%[0-9]+]]:fpr128 = ZIP1v2i64 [[COPY]], [[COPY1]]48 ; CHECK-NEXT: $q0 = COPY [[ZIP1v2i64_]]49 ; CHECK-NEXT: RET_ReallyLR implicit $q050 %0:fpr(<2 x s64>) = COPY $q051 %1:fpr(<2 x s64>) = COPY $q152 %2:fpr(<2 x s64>) = G_ZIP1 %0, %153 $q0 = COPY %2(<2 x s64>)54 RET_ReallyLR implicit $q055...56---57name: zip1_v4s3258alignment: 459legalized: true60regBankSelected: true61tracksRegLiveness: true62body: |63 bb.1.entry:64 liveins: $q0, $q165 ; CHECK-LABEL: name: zip1_v4s3266 ; CHECK: liveins: $q0, $q167 ; CHECK-NEXT: {{ $}}68 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q069 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q170 ; CHECK-NEXT: [[ZIP1v4i32_:%[0-9]+]]:fpr128 = ZIP1v4i32 [[COPY]], [[COPY1]]71 ; CHECK-NEXT: $q0 = COPY [[ZIP1v4i32_]]72 ; CHECK-NEXT: RET_ReallyLR implicit $q073 %0:fpr(<4 x s32>) = COPY $q074 %1:fpr(<4 x s32>) = COPY $q175 %2:fpr(<4 x s32>) = G_ZIP1 %0, %176 $q0 = COPY %2(<4 x s32>)77 RET_ReallyLR implicit $q078...79---80name: zip2_v2s3281alignment: 482legalized: true83regBankSelected: true84tracksRegLiveness: true85body: |86 bb.1.entry:87 liveins: $d0, $d188 89 ; CHECK-LABEL: name: zip2_v2s3290 ; CHECK: liveins: $d0, $d191 ; CHECK-NEXT: {{ $}}92 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d093 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d194 ; CHECK-NEXT: [[ZIP2v2i32_:%[0-9]+]]:fpr64 = ZIP2v2i32 [[COPY]], [[COPY1]]95 ; CHECK-NEXT: $d0 = COPY [[ZIP2v2i32_]]96 ; CHECK-NEXT: RET_ReallyLR implicit $d097 %0:fpr(<2 x s32>) = COPY $d098 %1:fpr(<2 x s32>) = COPY $d199 %2:fpr(<2 x s32>) = G_ZIP2 %0, %1100 $d0 = COPY %2(<2 x s32>)101 RET_ReallyLR implicit $d0102...103---104name: zip2_v2s64105alignment: 4106legalized: true107regBankSelected: true108tracksRegLiveness: true109body: |110 bb.1.entry:111 liveins: $q0, $q1112 113 ; CHECK-LABEL: name: zip2_v2s64114 ; CHECK: liveins: $q0, $q1115 ; CHECK-NEXT: {{ $}}116 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0117 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1118 ; CHECK-NEXT: [[ZIP2v2i64_:%[0-9]+]]:fpr128 = ZIP2v2i64 [[COPY]], [[COPY1]]119 ; CHECK-NEXT: $q0 = COPY [[ZIP2v2i64_]]120 ; CHECK-NEXT: RET_ReallyLR implicit $q0121 %0:fpr(<2 x s64>) = COPY $q0122 %1:fpr(<2 x s64>) = COPY $q1123 %2:fpr(<2 x s64>) = G_ZIP2 %0, %1124 $q0 = COPY %2(<2 x s64>)125 RET_ReallyLR implicit $q0126...127---128name: zip2_v4s32129alignment: 4130legalized: true131regBankSelected: true132tracksRegLiveness: true133body: |134 bb.1.entry:135 liveins: $d0, $d1136 ; CHECK-LABEL: name: zip2_v4s32137 ; CHECK: liveins: $d0, $d1138 ; CHECK-NEXT: {{ $}}139 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0140 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1141 ; CHECK-NEXT: [[ZIP2v4i32_:%[0-9]+]]:fpr128 = ZIP2v4i32 [[COPY]], [[COPY1]]142 ; CHECK-NEXT: $q0 = COPY [[ZIP2v4i32_]]143 ; CHECK-NEXT: RET_ReallyLR implicit $q0144 %0:fpr(<4 x s32>) = COPY $q0145 %1:fpr(<4 x s32>) = COPY $q1146 %2:fpr(<4 x s32>) = G_ZIP2 %0, %1147 $q0 = COPY %2(<4 x s32>)148 RET_ReallyLR implicit $q0149