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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s3#4# Verify that when a function has the speculative_load_hardening attribute we5# never produce a CB(N)Z or TB(N)Z.6#7 8--- |9 define void @no_tbnz() speculative_load_hardening { ret void }10 define void @no_cbz() speculative_load_hardening { ret void }11 define void @fp() speculative_load_hardening { ret void }12...13 14---15name: no_tbnz16legalized: true17regBankSelected: true18body: |19 ; CHECK-LABEL: name: no_tbnz20 ; CHECK: bb.0:21 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)22 ; CHECK-NEXT: liveins: $w023 ; CHECK-NEXT: {{ $}}24 ; CHECK-NEXT: %reg:gpr32 = COPY $w025 ; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %reg, 1, implicit-def $nzcv26 ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv27 ; CHECK-NEXT: B %bb.028 ; CHECK-NEXT: {{ $}}29 ; CHECK-NEXT: bb.1:30 ; CHECK-NEXT: RET_ReallyLR31 bb.0:32 liveins: $w033 successors: %bb.0, %bb.134 %reg:gpr(s32) = COPY $w035 G_BRCOND %reg, %bb.136 G_BR %bb.037 bb.1:38 RET_ReallyLR39...40---41name: no_cbz42legalized: true43regBankSelected: true44body: |45 ; CHECK-LABEL: name: no_cbz46 ; CHECK: bb.0:47 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)48 ; CHECK-NEXT: liveins: $w049 ; CHECK-NEXT: {{ $}}50 ; CHECK-NEXT: %reg:gpr32sp = COPY $w051 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 0, 0, implicit-def $nzcv52 ; CHECK-NEXT: Bcc 0, %bb.1, implicit $nzcv53 ; CHECK-NEXT: B %bb.054 ; CHECK-NEXT: {{ $}}55 ; CHECK-NEXT: bb.1:56 ; CHECK-NEXT: RET_ReallyLR57 bb.0:58 liveins: $w059 successors: %bb.0, %bb.160 %reg:gpr(s32) = COPY $w061 %zero:gpr(s32) = G_CONSTANT i32 062 %cmp:gpr(s32) = G_ICMP intpred(eq), %reg, %zero63 G_BRCOND %cmp, %bb.164 G_BR %bb.065 bb.1:66 RET_ReallyLR67...68---69name: fp70legalized: true71regBankSelected: true72body: |73 ; CHECK-LABEL: name: fp74 ; CHECK: bb.0:75 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)76 ; CHECK-NEXT: liveins: $s0, $s177 ; CHECK-NEXT: {{ $}}78 ; CHECK-NEXT: %reg0:fpr32 = COPY $s079 ; CHECK-NEXT: %reg1:fpr32 = COPY $s180 ; CHECK-NEXT: nofpexcept FCMPSrr %reg0, %reg1, implicit-def $nzcv, implicit $fpcr81 ; CHECK-NEXT: Bcc 0, %bb.1, implicit $nzcv82 ; CHECK-NEXT: B %bb.083 ; CHECK-NEXT: {{ $}}84 ; CHECK-NEXT: bb.1:85 ; CHECK-NEXT: RET_ReallyLR86 bb.0:87 liveins: $s0, $s188 successors: %bb.0, %bb.189 %reg0:fpr(s32) = COPY $s090 %reg1:fpr(s32) = COPY $s191 %cmp:gpr(s32) = G_FCMP floatpred(oeq), %reg0, %reg192 G_BRCOND %cmp, %bb.193 G_BR %bb.094 bb.1:95 RET_ReallyLR96