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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-linux-gnu -O0 -mattr=+sve -global-isel -global-isel-abort=1 -aarch64-enable-gisel-sve=1 \3; RUN: -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s4 5;; vscale x 128-bit6 7define void @formal_argument_nxv16i8(<vscale x 16 x i8> %0) {8 ; CHECK-LABEL: name: formal_argument_nxv16i89 ; CHECK: bb.1 (%ir-block.1):10 ; CHECK-NEXT: liveins: $z011 ; CHECK-NEXT: {{ $}}12 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z013 ; CHECK-NEXT: RET_ReallyLR14 ret void15}16 17define void @formal_argument_nxv8i16(<vscale x 8 x i16> %0) {18 ; CHECK-LABEL: name: formal_argument_nxv8i1619 ; CHECK: bb.1 (%ir-block.1):20 ; CHECK-NEXT: liveins: $z021 ; CHECK-NEXT: {{ $}}22 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z023 ; CHECK-NEXT: RET_ReallyLR24 ret void25}26 27define void @formal_argument_nxv4i32(<vscale x 4 x i32> %0) {28 ; CHECK-LABEL: name: formal_argument_nxv4i3229 ; CHECK: bb.1 (%ir-block.1):30 ; CHECK-NEXT: liveins: $z031 ; CHECK-NEXT: {{ $}}32 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z033 ; CHECK-NEXT: RET_ReallyLR34 ret void35}36 37define void @formal_argument_nxv2i64(<vscale x 2 x i64> %0) {38 ; CHECK-LABEL: name: formal_argument_nxv2i6439 ; CHECK: bb.1 (%ir-block.1):40 ; CHECK-NEXT: liveins: $z041 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z043 ; CHECK-NEXT: RET_ReallyLR44 ret void45}46 47define void @formal_argument_nxv4f32(<vscale x 4 x float> %0) {48 ; CHECK-LABEL: name: formal_argument_nxv4f3249 ; CHECK: bb.1 (%ir-block.1):50 ; CHECK-NEXT: liveins: $z051 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z053 ; CHECK-NEXT: RET_ReallyLR54 ret void55}56 57define void @formal_argument_nxv2f64(<vscale x 2 x double> %0) {58 ; CHECK-LABEL: name: formal_argument_nxv2f6459 ; CHECK: bb.1 (%ir-block.1):60 ; CHECK-NEXT: liveins: $z061 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z063 ; CHECK-NEXT: RET_ReallyLR64 ret void65}66 67define void @formal_argument_nxv2p0(<vscale x 2 x ptr> %0) {68 ; CHECK-LABEL: name: formal_argument_nxv2p069 ; CHECK: bb.1 (%ir-block.1):70 ; CHECK-NEXT: liveins: $z071 ; CHECK-NEXT: {{ $}}72 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x p0>) = COPY $z073 ; CHECK-NEXT: RET_ReallyLR74 ret void75}76 77;; vscale x 256-bit78 79define void @formal_argument_nxv32i8(<vscale x 32 x i8> %0) {80 ; CHECK-LABEL: name: formal_argument_nxv32i881 ; CHECK: bb.1 (%ir-block.1):82 ; CHECK-NEXT: liveins: $z0, $z183 ; CHECK-NEXT: {{ $}}84 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z085 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z186 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 32 x s8>) = G_CONCAT_VECTORS [[COPY]](<vscale x 16 x s8>), [[COPY1]](<vscale x 16 x s8>)87 ; CHECK-NEXT: RET_ReallyLR88 ret void89}90 91define void @formal_argument_nxv16i16(<vscale x 16 x i16> %0) {92 ; CHECK-LABEL: name: formal_argument_nxv16i1693 ; CHECK: bb.1 (%ir-block.1):94 ; CHECK-NEXT: liveins: $z0, $z195 ; CHECK-NEXT: {{ $}}96 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z097 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z198 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s16>) = G_CONCAT_VECTORS [[COPY]](<vscale x 8 x s16>), [[COPY1]](<vscale x 8 x s16>)99 ; CHECK-NEXT: RET_ReallyLR100 ret void101}102 103define void @formal_argument_nxv8i32(<vscale x 8 x i32> %0) {104 ; CHECK-LABEL: name: formal_argument_nxv8i32105 ; CHECK: bb.1 (%ir-block.1):106 ; CHECK-NEXT: liveins: $z0, $z1107 ; CHECK-NEXT: {{ $}}108 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z0109 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z1110 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 8 x s32>) = G_CONCAT_VECTORS [[COPY]](<vscale x 4 x s32>), [[COPY1]](<vscale x 4 x s32>)111 ; CHECK-NEXT: RET_ReallyLR112 ret void113}114 115define void @formal_argument_nxv4i64(<vscale x 4 x i64> %0) {116 ; CHECK-LABEL: name: formal_argument_nxv4i64117 ; CHECK: bb.1 (%ir-block.1):118 ; CHECK-NEXT: liveins: $z0, $z1119 ; CHECK-NEXT: {{ $}}120 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0121 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1122 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 4 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>)123 ; CHECK-NEXT: RET_ReallyLR124 ret void125}126 127define void @formal_argument_nxv8f32(<vscale x 8 x float> %0) {128 ; CHECK-LABEL: name: formal_argument_nxv8f32129 ; CHECK: bb.1 (%ir-block.1):130 ; CHECK-NEXT: liveins: $z0, $z1131 ; CHECK-NEXT: {{ $}}132 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z0133 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z1134 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 8 x s32>) = G_CONCAT_VECTORS [[COPY]](<vscale x 4 x s32>), [[COPY1]](<vscale x 4 x s32>)135 ; CHECK-NEXT: RET_ReallyLR136 ret void137}138 139define void @formal_argument_nxv4f64(<vscale x 4 x double> %0) {140 ; CHECK-LABEL: name: formal_argument_nxv4f64141 ; CHECK: bb.1 (%ir-block.1):142 ; CHECK-NEXT: liveins: $z0, $z1143 ; CHECK-NEXT: {{ $}}144 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0145 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1146 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 4 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>)147 ; CHECK-NEXT: RET_ReallyLR148 ret void149}150 151define void @formal_argument_nxv4p0(<vscale x 4 x ptr> %0) {152 ; CHECK-LABEL: name: formal_argument_nxv4p0153 ; CHECK: bb.1 (%ir-block.1):154 ; CHECK-NEXT: liveins: $z0, $z1155 ; CHECK-NEXT: {{ $}}156 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0157 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1158 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 4 x p0>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>)159 ; CHECK-NEXT: RET_ReallyLR160 ret void161}162 163;; vscale x 512-bit164 165define void @formal_argument_nxv64i8(<vscale x 64 x i8> %0) {166 ; CHECK-LABEL: name: formal_argument_nxv64i8167 ; CHECK: bb.1 (%ir-block.1):168 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3169 ; CHECK-NEXT: {{ $}}170 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z0171 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z1172 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z2173 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z3174 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 64 x s8>) = G_CONCAT_VECTORS [[COPY]](<vscale x 16 x s8>), [[COPY1]](<vscale x 16 x s8>), [[COPY2]](<vscale x 16 x s8>), [[COPY3]](<vscale x 16 x s8>)175 ; CHECK-NEXT: RET_ReallyLR176 ret void177}178 179define void @formal_argument_nxv32i16(<vscale x 32 x i16> %0) {180 ; CHECK-LABEL: name: formal_argument_nxv32i16181 ; CHECK: bb.1 (%ir-block.1):182 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3183 ; CHECK-NEXT: {{ $}}184 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z0185 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z1186 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z2187 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z3188 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 32 x s16>) = G_CONCAT_VECTORS [[COPY]](<vscale x 8 x s16>), [[COPY1]](<vscale x 8 x s16>), [[COPY2]](<vscale x 8 x s16>), [[COPY3]](<vscale x 8 x s16>)189 ; CHECK-NEXT: RET_ReallyLR190 ret void191}192 193define void @formal_argument_nxv16i32(<vscale x 16 x i32> %0) {194 ; CHECK-LABEL: name: formal_argument_nxv16i32195 ; CHECK: bb.1 (%ir-block.1):196 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z0199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z1200 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z2201 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z3202 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s32>) = G_CONCAT_VECTORS [[COPY]](<vscale x 4 x s32>), [[COPY1]](<vscale x 4 x s32>), [[COPY2]](<vscale x 4 x s32>), [[COPY3]](<vscale x 4 x s32>)203 ; CHECK-NEXT: RET_ReallyLR204 ret void205}206 207define void @formal_argument_nxv8i64(<vscale x 8 x i64> %0) {208 ; CHECK-LABEL: name: formal_argument_nxv8i64209 ; CHECK: bb.1 (%ir-block.1):210 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3211 ; CHECK-NEXT: {{ $}}212 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0213 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1214 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z2215 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z3216 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 8 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>), [[COPY2]](<vscale x 2 x s64>), [[COPY3]](<vscale x 2 x s64>)217 ; CHECK-NEXT: RET_ReallyLR218 ret void219}220 221define void @formal_argument_nxv16f32(<vscale x 16 x float> %0) {222 ; CHECK-LABEL: name: formal_argument_nxv16f32223 ; CHECK: bb.1 (%ir-block.1):224 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3225 ; CHECK-NEXT: {{ $}}226 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z0227 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z1228 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z2229 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z3230 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s32>) = G_CONCAT_VECTORS [[COPY]](<vscale x 4 x s32>), [[COPY1]](<vscale x 4 x s32>), [[COPY2]](<vscale x 4 x s32>), [[COPY3]](<vscale x 4 x s32>)231 ; CHECK-NEXT: RET_ReallyLR232 ret void233}234 235define void @formal_argument_nxv8f64(<vscale x 8 x double> %0) {236 ; CHECK-LABEL: name: formal_argument_nxv8f64237 ; CHECK: bb.1 (%ir-block.1):238 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3239 ; CHECK-NEXT: {{ $}}240 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0241 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1242 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z2243 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z3244 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 8 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>), [[COPY2]](<vscale x 2 x s64>), [[COPY3]](<vscale x 2 x s64>)245 ; CHECK-NEXT: RET_ReallyLR246 ret void247}248 249define void @formal_argument_nxv8p0(<vscale x 8 x ptr> %0) {250 ; CHECK-LABEL: name: formal_argument_nxv8p0251 ; CHECK: bb.1 (%ir-block.1):252 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3253 ; CHECK-NEXT: {{ $}}254 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0255 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1256 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z2257 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z3258 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 8 x p0>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>), [[COPY2]](<vscale x 2 x s64>), [[COPY3]](<vscale x 2 x s64>)259 ; CHECK-NEXT: RET_ReallyLR260 ret void261}262 263;; vscale x 1024-bit264 265define void @formal_argument_nxv128i8(<vscale x 128 x i8> %0) {266 ; CHECK-LABEL: name: formal_argument_nxv128i8267 ; CHECK: bb.1 (%ir-block.1):268 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7269 ; CHECK-NEXT: {{ $}}270 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z0271 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z1272 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z2273 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z3274 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z4275 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z5276 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z6277 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $z7278 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 128 x s8>) = G_CONCAT_VECTORS [[COPY]](<vscale x 16 x s8>), [[COPY1]](<vscale x 16 x s8>), [[COPY2]](<vscale x 16 x s8>), [[COPY3]](<vscale x 16 x s8>), [[COPY4]](<vscale x 16 x s8>), [[COPY5]](<vscale x 16 x s8>), [[COPY6]](<vscale x 16 x s8>), [[COPY7]](<vscale x 16 x s8>)279 ; CHECK-NEXT: RET_ReallyLR280 ret void281}282 283define void @formal_argument_nxv64i16(<vscale x 64 x i16> %0) {284 ; CHECK-LABEL: name: formal_argument_nxv64i16285 ; CHECK: bb.1 (%ir-block.1):286 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7287 ; CHECK-NEXT: {{ $}}288 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z0289 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z1290 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z2291 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z3292 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z4293 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z5294 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z6295 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $z7296 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 64 x s16>) = G_CONCAT_VECTORS [[COPY]](<vscale x 8 x s16>), [[COPY1]](<vscale x 8 x s16>), [[COPY2]](<vscale x 8 x s16>), [[COPY3]](<vscale x 8 x s16>), [[COPY4]](<vscale x 8 x s16>), [[COPY5]](<vscale x 8 x s16>), [[COPY6]](<vscale x 8 x s16>), [[COPY7]](<vscale x 8 x s16>)297 ; CHECK-NEXT: RET_ReallyLR298 ret void299}300 301define void @formal_argument_nxv32i32(<vscale x 32 x i32> %0) {302 ; CHECK-LABEL: name: formal_argument_nxv32i32303 ; CHECK: bb.1 (%ir-block.1):304 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7305 ; CHECK-NEXT: {{ $}}306 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z0307 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z1308 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z2309 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z3310 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z4311 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z5312 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z6313 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z7314 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 32 x s32>) = G_CONCAT_VECTORS [[COPY]](<vscale x 4 x s32>), [[COPY1]](<vscale x 4 x s32>), [[COPY2]](<vscale x 4 x s32>), [[COPY3]](<vscale x 4 x s32>), [[COPY4]](<vscale x 4 x s32>), [[COPY5]](<vscale x 4 x s32>), [[COPY6]](<vscale x 4 x s32>), [[COPY7]](<vscale x 4 x s32>)315 ; CHECK-NEXT: RET_ReallyLR316 ret void317}318 319define void @formal_argument_nxv16i64(<vscale x 16 x i64> %0) {320 ; CHECK-LABEL: name: formal_argument_nxv16i64321 ; CHECK: bb.1 (%ir-block.1):322 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7323 ; CHECK-NEXT: {{ $}}324 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0325 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1326 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z2327 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z3328 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z4329 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z5330 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z6331 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z7332 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>), [[COPY2]](<vscale x 2 x s64>), [[COPY3]](<vscale x 2 x s64>), [[COPY4]](<vscale x 2 x s64>), [[COPY5]](<vscale x 2 x s64>), [[COPY6]](<vscale x 2 x s64>), [[COPY7]](<vscale x 2 x s64>)333 ; CHECK-NEXT: RET_ReallyLR334 ret void335}336 337define void @formal_argument_nxv32f32(<vscale x 32 x float> %0) {338 ; CHECK-LABEL: name: formal_argument_nxv32f32339 ; CHECK: bb.1 (%ir-block.1):340 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7341 ; CHECK-NEXT: {{ $}}342 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z0343 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z1344 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z2345 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z3346 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z4347 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z5348 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z6349 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $z7350 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 32 x s32>) = G_CONCAT_VECTORS [[COPY]](<vscale x 4 x s32>), [[COPY1]](<vscale x 4 x s32>), [[COPY2]](<vscale x 4 x s32>), [[COPY3]](<vscale x 4 x s32>), [[COPY4]](<vscale x 4 x s32>), [[COPY5]](<vscale x 4 x s32>), [[COPY6]](<vscale x 4 x s32>), [[COPY7]](<vscale x 4 x s32>)351 ; CHECK-NEXT: RET_ReallyLR352 ret void353}354 355define void @formal_argument_nxv16f64(<vscale x 16 x double> %0) {356 ; CHECK-LABEL: name: formal_argument_nxv16f64357 ; CHECK: bb.1 (%ir-block.1):358 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7359 ; CHECK-NEXT: {{ $}}360 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0361 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1362 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z2363 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z3364 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z4365 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z5366 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z6367 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z7368 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x s64>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>), [[COPY2]](<vscale x 2 x s64>), [[COPY3]](<vscale x 2 x s64>), [[COPY4]](<vscale x 2 x s64>), [[COPY5]](<vscale x 2 x s64>), [[COPY6]](<vscale x 2 x s64>), [[COPY7]](<vscale x 2 x s64>)369 ; CHECK-NEXT: RET_ReallyLR370 ret void371}372 373define void @formal_argument_nxv16p0(<vscale x 16 x ptr> %0) {374 ; CHECK-LABEL: name: formal_argument_nxv16p0375 ; CHECK: bb.1 (%ir-block.1):376 ; CHECK-NEXT: liveins: $z0, $z1, $z2, $z3, $z4, $z5, $z6, $z7377 ; CHECK-NEXT: {{ $}}378 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z0379 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z1380 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z2381 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z3382 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z4383 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z5384 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z6385 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $z7386 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<vscale x 16 x p0>) = G_CONCAT_VECTORS [[COPY]](<vscale x 2 x s64>), [[COPY1]](<vscale x 2 x s64>), [[COPY2]](<vscale x 2 x s64>), [[COPY3]](<vscale x 2 x s64>), [[COPY4]](<vscale x 2 x s64>), [[COPY5]](<vscale x 2 x s64>), [[COPY6]](<vscale x 2 x s64>), [[COPY7]](<vscale x 2 x s64>)387 ; CHECK-NEXT: RET_ReallyLR388 ret void389}390