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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple aarch64-unknown-unknown -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s3#4# Test widening and narrowing on test bit operations using subregister copies5# or SUBREG_TO_REG.6--- |7 @glob = external dso_local unnamed_addr global i1, align 48 define void @p0_no_copy() { ret void }9 define void @widen_s32_to_s64() { ret void }10 define void @widen_s16_to_s64() { ret void }11 define void @narrow_s64_to_s32() { ret void }12 13...14---15name: p0_no_copy16alignment: 417legalized: true18regBankSelected: true19tracksRegLiveness: true20body: |21 ; CHECK-LABEL: name: p0_no_copy22 ; CHECK: bb.0:23 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)24 ; CHECK-NEXT: {{ $}}25 ; CHECK-NEXT: %glob:gpr64common = MOVaddr target-flags(aarch64-page) @glob, target-flags(aarch64-pageoff, aarch64-nc) @glob26 ; CHECK-NEXT: %load:gpr32 = LDRBBui %glob, 0 :: (dereferenceable load (s8) from @glob, align 4)27 ; CHECK-NEXT: TBNZW %load, 0, %bb.128 ; CHECK-NEXT: B %bb.029 ; CHECK-NEXT: {{ $}}30 ; CHECK-NEXT: bb.1:31 ; CHECK-NEXT: RET_ReallyLR32 bb.0:33 successors: %bb.0, %bb.134 %glob:gpr(p0) = G_GLOBAL_VALUE @glob35 %load:gpr(s32) = G_LOAD %glob(p0) :: (dereferenceable load (s8) from @glob, align 4)36 37 ; Look through G_TRUNC to get the load. The load is into a s8, which will38 ; be selected to a GPR32, so we don't need a copy.39 G_BRCOND %load, %bb.140 G_BR %bb.041 bb.1:42 RET_ReallyLR43...44---45name: widen_s32_to_s6446alignment: 447legalized: true48regBankSelected: true49tracksRegLiveness: true50body: |51 ; CHECK-LABEL: name: widen_s32_to_s6452 ; CHECK: bb.0:53 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)54 ; CHECK-NEXT: liveins: $w055 ; CHECK-NEXT: {{ $}}56 ; CHECK-NEXT: %reg:gpr32all = COPY $w057 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, %reg, %subreg.sub_3258 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY [[SUBREG_TO_REG]]59 ; CHECK-NEXT: TBZX [[COPY]], 33, %bb.160 ; CHECK-NEXT: B %bb.061 ; CHECK-NEXT: {{ $}}62 ; CHECK-NEXT: bb.1:63 ; CHECK-NEXT: RET_ReallyLR64 bb.0:65 successors: %bb.0, %bb.166 liveins: $w067 %reg:gpr(s32) = COPY $w068 %zext:gpr(s64) = G_ZEXT %reg(s32)69 %bit:gpr(s64) = G_CONSTANT i64 858993459270 %zero:gpr(s64) = G_CONSTANT i64 071 %and:gpr(s64) = G_AND %zext, %bit72 %cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero73 74 ; We should widen using a SUBREG_TO_REG here, because we need a TBZX to get75 ; bit 33. The subregister should be sub_32.76 G_BRCOND %cmp, %bb.177 G_BR %bb.078 bb.1:79 RET_ReallyLR80...81---82name: widen_s16_to_s6483alignment: 484legalized: true85regBankSelected: true86tracksRegLiveness: true87body: |88 ; CHECK-LABEL: name: widen_s16_to_s6489 ; CHECK: bb.0:90 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)91 ; CHECK-NEXT: {{ $}}92 ; CHECK-NEXT: %reg:gpr32 = IMPLICIT_DEF93 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, %reg, %subreg.sub_3294 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY [[SUBREG_TO_REG]]95 ; CHECK-NEXT: TBZX [[COPY]], 33, %bb.196 ; CHECK-NEXT: B %bb.097 ; CHECK-NEXT: {{ $}}98 ; CHECK-NEXT: bb.1:99 ; CHECK-NEXT: RET_ReallyLR100 bb.0:101 successors: %bb.0, %bb.1102 %reg:gpr(s16) = G_IMPLICIT_DEF103 %zext:gpr(s64) = G_ZEXT %reg(s16)104 %bit:gpr(s64) = G_CONSTANT i64 8589934592105 %zero:gpr(s64) = G_CONSTANT i64 0106 %and:gpr(s64) = G_AND %zext, %bit107 %cmp:gpr(s32) = G_ICMP intpred(eq), %and(s64), %zero108 109 ; We should widen using a SUBREG_TO_REG here, because we need a TBZX to get110 ; bit 33. The subregister should be sub_32, because s16 will end up on a111 ; GPR32.112 G_BRCOND %cmp, %bb.1113 G_BR %bb.0114 bb.1:115 RET_ReallyLR116...117---118name: narrow_s64_to_s32119alignment: 4120legalized: true121regBankSelected: true122tracksRegLiveness: true123body: |124 ; CHECK-LABEL: name: narrow_s64_to_s32125 ; CHECK: bb.0:126 ; CHECK-NEXT: successors: %bb.0(0x40000000), %bb.1(0x40000000)127 ; CHECK-NEXT: liveins: $x0128 ; CHECK-NEXT: {{ $}}129 ; CHECK-NEXT: %wide:gpr64all = COPY $x0130 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %wide.sub_32131 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]132 ; CHECK-NEXT: TBNZW [[COPY1]], 0, %bb.1133 ; CHECK-NEXT: B %bb.0134 ; CHECK-NEXT: {{ $}}135 ; CHECK-NEXT: bb.1:136 ; CHECK-NEXT: RET_ReallyLR137 bb.0:138 successors: %bb.0, %bb.1139 liveins: $x0140 %wide:gpr(s64) = COPY $x0141 142 ; We should narrow using a subregister copy here.143 %trunc:gpr(s32) = G_TRUNC %wide(s64)144 G_BRCOND %trunc, %bb.1145 G_BR %bb.0146 bb.1:147 RET_ReallyLR148