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1; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | \2; RUN: grep -v "Verify generated machine code" | FileCheck %s3 4; REQUIRES: asserts5 6; CHECK-LABEL: Pass Arguments:7; CHECK-NEXT: Target Library Information8; CHECK-NEXT: Target Pass Configuration9; CHECK-NEXT: Machine Module Information10; CHECK-NEXT: Target Transform Information11; CHECK-NEXT: Assumption Cache Tracker12; CHECK-NEXT: Profile summary info13; CHECK-NEXT: Type-Based Alias Analysis14; CHECK-NEXT: Scoped NoAlias Alias Analysis15; CHECK-NEXT: Create Garbage Collector Module Metadata16; CHECK-NEXT: Machine Branch Probability Analysis17; CHECK-NEXT: Default Regalloc Eviction Advisor18; CHECK-NEXT: Default Regalloc Priority Advisor19; CHECK-NEXT: ModulePass Manager20; CHECK-NEXT: Pre-ISel Intrinsic Lowering21; CHECK-NEXT: FunctionPass Manager22; CHECK-NEXT: Expand large div/rem23; CHECK-NEXT: Expand fp24; CHECK-NEXT: Expand Atomic instructions25; CHECK-NEXT: SVE intrinsics optimizations26; CHECK-NEXT: FunctionPass Manager27; CHECK-NEXT: Dominator Tree Construction28; CHECK-NEXT: FunctionPass Manager29; CHECK-NEXT: Simplify the CFG30; CHECK-NEXT: Dominator Tree Construction31; CHECK-NEXT: Natural Loop Information32; CHECK-NEXT: Canonicalize natural loops33; CHECK-NEXT: Lazy Branch Probability Analysis34; CHECK-NEXT: Lazy Block Frequency Analysis35; CHECK-NEXT: Optimization Remark Emitter36; CHECK-NEXT: Scalar Evolution Analysis37; CHECK-NEXT: Loop Data Prefetch38; CHECK-NEXT: Falkor HW Prefetch Fix39; CHECK-NEXT: Module Verifier40; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)41; CHECK-NEXT: Canonicalize natural loops42; CHECK-NEXT: Loop Pass Manager43; CHECK-NEXT: Canonicalize Freeze Instructions in Loops44; CHECK-NEXT: Induction Variable Users45; CHECK-NEXT: Loop Strength Reduction46; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)47; CHECK-NEXT: Function Alias Analysis Results48; CHECK-NEXT: Merge contiguous icmps into a memcmp49; CHECK-NEXT: Natural Loop Information50; CHECK-NEXT: Lazy Branch Probability Analysis51; CHECK-NEXT: Lazy Block Frequency Analysis52; CHECK-NEXT: Expand memcmp() to load/stores53; CHECK-NEXT: Lower Garbage Collection Instructions54; CHECK-NEXT: Shadow Stack GC Lowering55; CHECK-NEXT: Remove unreachable blocks from the CFG56; CHECK-NEXT: Natural Loop Information57; CHECK-NEXT: Post-Dominator Tree Construction58; CHECK-NEXT: Branch Probability Analysis59; CHECK-NEXT: Block Frequency Analysis60; CHECK-NEXT: Constant Hoisting61; CHECK-NEXT: Replace intrinsics with calls to vector library62; CHECK-NEXT: Lazy Branch Probability Analysis63; CHECK-NEXT: Lazy Block Frequency Analysis64; CHECK-NEXT: Optimization Remark Emitter65; CHECK-NEXT: Partially inline calls to library functions66; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)67; CHECK-NEXT: Scalarize Masked Memory Intrinsics68; CHECK-NEXT: Expand reduction intrinsics69; CHECK-NEXT: Natural Loop Information70; CHECK-NEXT: Post-Dominator Tree Construction71; CHECK-NEXT: Branch Probability Analysis72; CHECK-NEXT: Block Frequency Analysis73; CHECK-NEXT: Lazy Branch Probability Analysis74; CHECK-NEXT: Lazy Block Frequency Analysis75; CHECK-NEXT: Optimization Remark Emitter76; CHECK-NEXT: Optimize selects77; CHECK-NEXT: Stack Safety Analysis78; CHECK-NEXT: FunctionPass Manager79; CHECK-NEXT: Dominator Tree Construction80; CHECK-NEXT: Natural Loop Information81; CHECK-NEXT: Scalar Evolution Analysis82; CHECK-NEXT: Stack Safety Local Analysis83; CHECK-NEXT: FunctionPass Manager84; CHECK-NEXT: Dominator Tree Construction85; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)86; CHECK-NEXT: Function Alias Analysis Results87; CHECK-NEXT: Natural Loop Information88; CHECK-NEXT: Lazy Branch Probability Analysis89; CHECK-NEXT: Lazy Block Frequency Analysis90; CHECK-NEXT: Optimization Remark Emitter91; CHECK-NEXT: AArch64 Stack Tagging92; CHECK-NEXT: Complex Deinterleaving Pass93; CHECK-NEXT: Function Alias Analysis Results94; CHECK-NEXT: Memory SSA95; CHECK-NEXT: Interleaved Load Combine Pass96; CHECK-NEXT: Dominator Tree Construction97; CHECK-NEXT: Interleaved Access Pass98; CHECK-NEXT: SME ABI Pass99; CHECK-NEXT: Dominator Tree Construction100; CHECK-NEXT: Natural Loop Information101; CHECK-NEXT: Type Promotion102; CHECK-NEXT: CodeGen Prepare103; CHECK-NEXT: Dominator Tree Construction104; CHECK-NEXT: Exception handling preparation105; CHECK-NEXT: AArch64 Promote Constant106; CHECK-NEXT: FunctionPass Manager107; CHECK-NEXT: Dominator Tree Construction108; CHECK-NEXT: FunctionPass Manager109; CHECK-NEXT: Merge internal globals110; CHECK-NEXT: Dominator Tree Construction111; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)112; CHECK-NEXT: Function Alias Analysis Results113; CHECK-NEXT: ObjC ARC contraction114; CHECK-NEXT: Prepare callbr115; CHECK-NEXT: Safe Stack instrumentation pass116; CHECK-NEXT: Insert stack protectors117; CHECK-NEXT: Module Verifier118; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)119; CHECK-NEXT: Function Alias Analysis Results120; CHECK-NEXT: Natural Loop Information121; CHECK-NEXT: Post-Dominator Tree Construction122; CHECK-NEXT: Branch Probability Analysis123; CHECK-NEXT: Assignment Tracking Analysis124; CHECK-NEXT: Lazy Branch Probability Analysis125; CHECK-NEXT: Lazy Block Frequency Analysis126; CHECK-NEXT: AArch64 Instruction Selection127; CHECK-NEXT: MachineDominator Tree Construction128; CHECK-NEXT: AArch64 Local Dynamic TLS Access Clean-up129; CHECK-NEXT: Finalize ISel and expand pseudo-instructions130; CHECK-NEXT: SME Peephole Optimization pass131; CHECK-NEXT: Lazy Machine Block Frequency Analysis132; CHECK-NEXT: Early Tail Duplication133; CHECK-NEXT: Optimize machine instruction PHIs134; CHECK-NEXT: Slot index numbering135; CHECK-NEXT: Merge disjoint stack slots136; CHECK-NEXT: Local Stack Slot Allocation137; CHECK-NEXT: Remove dead machine instructions138; CHECK-NEXT: MachineDominator Tree Construction139; CHECK-NEXT: AArch64 Condition Optimizer140; CHECK-NEXT: Machine Natural Loop Construction141; CHECK-NEXT: Machine Trace Metrics142; CHECK-NEXT: AArch64 Conditional Compares143; CHECK-NEXT: Lazy Machine Block Frequency Analysis144; CHECK-NEXT: Machine InstCombiner145; CHECK-NEXT: AArch64 Conditional Branch Tuning146; CHECK-NEXT: Machine Trace Metrics147; CHECK-NEXT: Early If-Conversion148; CHECK-NEXT: AArch64 Store Pair Suppression149; CHECK-NEXT: AArch64 SIMD instructions optimization pass150; CHECK-NEXT: AArch64 Stack Tagging PreRA151; CHECK-NEXT: MachineDominator Tree Construction152; CHECK-NEXT: Machine Natural Loop Construction153; CHECK-NEXT: Machine Block Frequency Analysis154; CHECK-NEXT: Early Machine Loop Invariant Code Motion155; CHECK-NEXT: MachineDominator Tree Construction156; CHECK-NEXT: Machine Block Frequency Analysis157; CHECK-NEXT: Machine Common Subexpression Elimination158; CHECK-NEXT: MachinePostDominator Tree Construction159; CHECK-NEXT: Machine Cycle Info Analysis160; CHECK-NEXT: Machine code sinking161; CHECK-NEXT: Peephole Optimizations162; CHECK-NEXT: Remove dead machine instructions163; CHECK-NEXT: AArch64 MI Peephole Optimization pass164; CHECK-NEXT: AArch64 Dead register definitions165; CHECK-NEXT: Detect Dead Lanes166; CHECK-NEXT: Init Undef Pass167; CHECK-NEXT: Process Implicit Definitions168; CHECK-NEXT: Remove unreachable machine basic blocks169; CHECK-NEXT: Live Variable Analysis170; CHECK-NEXT: Eliminate PHI nodes for register allocation171; CHECK-NEXT: Two-Address instruction pass172; CHECK-NEXT: MachineDominator Tree Construction173; CHECK-NEXT: Slot index numbering174; CHECK-NEXT: Live Interval Analysis175; CHECK-NEXT: Register Coalescer176; CHECK-NEXT: Rename Disconnected Subregister Components177; CHECK-NEXT: Machine Instruction Scheduler178; CHECK-NEXT: AArch64 Post Coalescer pass179; CHECK-NEXT: Machine Block Frequency Analysis180; CHECK-NEXT: Debug Variable Analysis181; CHECK-NEXT: Live Stack Slot Analysis182; CHECK-NEXT: Virtual Register Map183; CHECK-NEXT: Live Register Matrix184; CHECK-NEXT: Bundle Machine CFG Edges185; CHECK-NEXT: Spill Code Placement Analysis186; CHECK-NEXT: Lazy Machine Block Frequency Analysis187; CHECK-NEXT: Machine Optimization Remark Emitter188; CHECK-NEXT: Greedy Register Allocator189; CHECK-NEXT: Virtual Register Rewriter190; CHECK-NEXT: Register Allocation Pass Scoring191; CHECK-NEXT: Stack Slot Coloring192; CHECK-NEXT: Machine Copy Propagation Pass193; CHECK-NEXT: Machine Loop Invariant Code Motion194; CHECK-NEXT: AArch64 Redundant Copy Elimination195; CHECK-NEXT: A57 FP Anti-dependency breaker196; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis197; CHECK-NEXT: Fixup Statepoint Caller Saved198; CHECK-NEXT: PostRA Machine Sink199; CHECK-NEXT: MachineDominator Tree Construction200; CHECK-NEXT: Machine Natural Loop Construction201; CHECK-NEXT: Machine Block Frequency Analysis202; CHECK-NEXT: MachinePostDominator Tree Construction203; CHECK-NEXT: Lazy Machine Block Frequency Analysis204; CHECK-NEXT: Machine Optimization Remark Emitter205; CHECK-NEXT: Shrink Wrapping analysis206; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization207; CHECK-NEXT: Machine Late Instructions Cleanup Pass208; CHECK-NEXT: Control Flow Optimizer209; CHECK-NEXT: Lazy Machine Block Frequency Analysis210; CHECK-NEXT: Tail Duplication211; CHECK-NEXT: Machine Copy Propagation Pass212; CHECK-NEXT: Post-RA pseudo instruction expansion pass213; CHECK-NEXT: AArch64 pseudo instruction expansion pass214; CHECK-NEXT: AArch64 load / store optimization pass215; CHECK-NEXT: Insert KCFI indirect call checks216; CHECK-NEXT: AArch64 speculation hardening pass217; CHECK-NEXT: MachineDominator Tree Construction218; CHECK-NEXT: Machine Natural Loop Construction219; CHECK-NEXT: Falkor HW Prefetch Fix Late Phase220; CHECK-NEXT: PostRA Machine Instruction Scheduler221; CHECK-NEXT: Analyze Machine Code For Garbage Collection222; CHECK-NEXT: Machine Block Frequency Analysis223; CHECK-NEXT: MachinePostDominator Tree Construction224; CHECK-NEXT: Branch Probability Basic Block Placement225; CHECK-NEXT: Insert fentry calls226; CHECK-NEXT: Insert XRay ops227; CHECK-NEXT: Implement the 'patchable-function' attribute228; CHECK-NEXT: AArch64 load / store optimization pass229; CHECK-NEXT: Machine Copy Propagation Pass230; CHECK-NEXT: Workaround A53 erratum 835769 pass231; CHECK-NEXT: Contiguously Lay Out Funclets232; CHECK-NEXT: Remove Loads Into Fake Uses233; CHECK-NEXT: StackMap Liveness Analysis234; CHECK-NEXT: Live DEBUG_VALUE analysis235; CHECK-NEXT: Machine Sanitizer Binary Metadata236; CHECK-NEXT: Machine Outliner237; CHECK-NEXT: FunctionPass Manager238; CHECK-NEXT: AArch64 sls hardening pass239; CHECK-NEXT: AArch64 Pointer Authentication240; CHECK-NEXT: AArch64 Branch Targets241; CHECK-NEXT: Branch relaxation pass242; CHECK-NEXT: AArch64 Compress Jump Tables243; CHECK-NEXT: Insert CFI remember/restore state instructions244; CHECK-NEXT: Lazy Machine Block Frequency Analysis245; CHECK-NEXT: Machine Optimization Remark Emitter246; CHECK-NEXT: Stack Frame Layout Analysis247; CHECK-NEXT: Unpack machine instruction bundles248; CHECK-NEXT: Lazy Machine Block Frequency Analysis249; CHECK-NEXT: Machine Optimization Remark Emitter250; CHECK-NEXT: AArch64 Assembly Printer251; CHECK-NEXT: Free MachineFunction252; CHECK-NEXT: Pass Arguments: -domtree253; CHECK-NEXT: FunctionPass Manager254; CHECK-NEXT: Dominator Tree Construction255; CHECK-NEXT: Pass Arguments: -assumption-cache-tracker -targetlibinfo -domtree -loops -scalar-evolution -stack-safety-local256; CHECK-NEXT: Assumption Cache Tracker257; CHECK-NEXT: Target Library Information258; CHECK-NEXT: FunctionPass Manager259; CHECK-NEXT: Dominator Tree Construction260; CHECK-NEXT: Natural Loop Information261; CHECK-NEXT: Scalar Evolution Analysis262; CHECK-NEXT: Stack Safety Local Analysis263; CHECK-NEXT: Pass Arguments: -domtree264; CHECK-NEXT: FunctionPass Manager265; CHECK-NEXT: Dominator Tree Construction266 267define void @f() {268 ret void269}270