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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64_be--linux-gnu < %s | FileCheck %s3 4@vec_v8i16 = dso_local global <8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>5 6define dso_local void @movi_modimm_t1() nounwind {7; CHECK-LABEL: movi_modimm_t1:8; CHECK: // %bb.0:9; CHECK-NEXT: movi v0.4s, #110; CHECK-NEXT: adrp x8, vec_v8i1611; CHECK-NEXT: add x8, x8, :lo12:vec_v8i1612; CHECK-NEXT: ld1 { v1.8h }, [x8]13; CHECK-NEXT: add v0.8h, v1.8h, v0.8h14; CHECK-NEXT: st1 { v0.8h }, [x8]15; CHECK-NEXT: ret16 %in = load <8 x i16>, ptr @vec_v8i1617 %rv = add <8 x i16> %in, <i16 1, i16 0, i16 1, i16 0, i16 1, i16 0, i16 1, i16 0>18 store <8 x i16> %rv, ptr @vec_v8i1619 ret void20}21 22define dso_local void @movi_modimm_t2() nounwind {23; CHECK-LABEL: movi_modimm_t2:24; CHECK: // %bb.0:25; CHECK-NEXT: movi v0.4s, #1, lsl #826; CHECK-NEXT: adrp x8, vec_v8i1627; CHECK-NEXT: add x8, x8, :lo12:vec_v8i1628; CHECK-NEXT: ld1 { v1.8h }, [x8]29; CHECK-NEXT: add v0.8h, v1.8h, v0.8h30; CHECK-NEXT: st1 { v0.8h }, [x8]31; CHECK-NEXT: ret32 %in = load <8 x i16>, ptr @vec_v8i1633 %rv = add <8 x i16> %in, <i16 256, i16 0, i16 256, i16 0, i16 256, i16 0, i16 256, i16 0>34 store <8 x i16> %rv, ptr @vec_v8i1635 ret void36}37 38define dso_local void @movi_modimm_t3() nounwind {39; CHECK-LABEL: movi_modimm_t3:40; CHECK: // %bb.0:41; CHECK-NEXT: movi v0.4s, #1, lsl #1642; CHECK-NEXT: adrp x8, vec_v8i1643; CHECK-NEXT: add x8, x8, :lo12:vec_v8i1644; CHECK-NEXT: ld1 { v1.8h }, [x8]45; CHECK-NEXT: add v0.8h, v1.8h, v0.8h46; CHECK-NEXT: st1 { v0.8h }, [x8]47; CHECK-NEXT: ret48 %in = load <8 x i16>, ptr @vec_v8i1649 %rv = add <8 x i16> %in, <i16 0, i16 1, i16 0, i16 1, i16 0, i16 1, i16 0, i16 1>50 store <8 x i16> %rv, ptr @vec_v8i1651 ret void52}53 54define dso_local void @movi_modimm_t4() nounwind {55; CHECK-LABEL: movi_modimm_t4:56; CHECK: // %bb.0:57; CHECK-NEXT: movi v0.4s, #1, lsl #2458; CHECK-NEXT: adrp x8, vec_v8i1659; CHECK-NEXT: add x8, x8, :lo12:vec_v8i1660; CHECK-NEXT: ld1 { v1.8h }, [x8]61; CHECK-NEXT: add v0.8h, v1.8h, v0.8h62; CHECK-NEXT: st1 { v0.8h }, [x8]63; CHECK-NEXT: ret64 %in = load <8 x i16>, ptr @vec_v8i1665 %rv = add <8 x i16> %in, <i16 0, i16 256, i16 0, i16 256, i16 0, i16 256, i16 0, i16 256>66 store <8 x i16> %rv, ptr @vec_v8i1667 ret void68}69 70define dso_local void @movi_modimm_t5() nounwind {71; CHECK-LABEL: movi_modimm_t5:72; CHECK: // %bb.0:73; CHECK-NEXT: movi v0.8h, #174; CHECK-NEXT: adrp x8, vec_v8i1675; CHECK-NEXT: add x8, x8, :lo12:vec_v8i1676; CHECK-NEXT: ld1 { v1.8h }, [x8]77; CHECK-NEXT: add v0.8h, v1.8h, v0.8h78; CHECK-NEXT: st1 { v0.8h }, [x8]79; CHECK-NEXT: ret80 %in = load <8 x i16>, ptr @vec_v8i1681 %rv = add <8 x i16> %in, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>82 store <8 x i16> %rv, ptr @vec_v8i1683 ret void84}85 86define dso_local void @movi_modimm_t6() nounwind {87; CHECK-LABEL: movi_modimm_t6:88; CHECK: // %bb.0:89; CHECK-NEXT: movi v0.8h, #1, lsl #890; CHECK-NEXT: adrp x8, vec_v8i1691; CHECK-NEXT: add x8, x8, :lo12:vec_v8i1692; CHECK-NEXT: ld1 { v1.8h }, [x8]93; CHECK-NEXT: add v0.8h, v1.8h, v0.8h94; CHECK-NEXT: st1 { v0.8h }, [x8]95; CHECK-NEXT: ret96 %in = load <8 x i16>, ptr @vec_v8i1697 %rv = add <8 x i16> %in, <i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256>98 store <8 x i16> %rv, ptr @vec_v8i1699 ret void100}101 102define dso_local void @movi_modimm_t7() nounwind {103; CHECK-LABEL: movi_modimm_t7:104; CHECK: // %bb.0:105; CHECK-NEXT: movi v0.4s, #1, msl #8106; CHECK-NEXT: adrp x8, vec_v8i16107; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16108; CHECK-NEXT: ld1 { v1.8h }, [x8]109; CHECK-NEXT: add v0.8h, v1.8h, v0.8h110; CHECK-NEXT: st1 { v0.8h }, [x8]111; CHECK-NEXT: ret112 %in = load <8 x i16>, ptr @vec_v8i16113 %rv = add <8 x i16> %in, <i16 511, i16 0, i16 511, i16 0, i16 511, i16 0, i16 511, i16 0>114 store <8 x i16> %rv, ptr @vec_v8i16115 ret void116}117 118define dso_local void @movi_modimm_t8() nounwind {119; CHECK-LABEL: movi_modimm_t8:120; CHECK: // %bb.0:121; CHECK-NEXT: movi v0.4s, #1, msl #16122; CHECK-NEXT: adrp x8, vec_v8i16123; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16124; CHECK-NEXT: ld1 { v1.8h }, [x8]125; CHECK-NEXT: add v0.8h, v1.8h, v0.8h126; CHECK-NEXT: st1 { v0.8h }, [x8]127; CHECK-NEXT: ret128 %in = load <8 x i16>, ptr @vec_v8i16129 %rv = add <8 x i16> %in, <i16 65535, i16 1, i16 65535, i16 1, i16 65535, i16 1, i16 65535, i16 1>130 store <8 x i16> %rv, ptr @vec_v8i16131 ret void132}133 134define dso_local void @movi_modimm_t9() nounwind {135; CHECK-LABEL: movi_modimm_t9:136; CHECK: // %bb.0:137; CHECK-NEXT: movi v0.16b, #1138; CHECK-NEXT: adrp x8, vec_v8i16139; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16140; CHECK-NEXT: ld1 { v1.8h }, [x8]141; CHECK-NEXT: add v0.8h, v1.8h, v0.8h142; CHECK-NEXT: st1 { v0.8h }, [x8]143; CHECK-NEXT: ret144 %in = load <8 x i16>, ptr @vec_v8i16145 %rv = add <8 x i16> %in, <i16 257, i16 257, i16 257, i16 257, i16 257, i16 257, i16 257, i16 257>146 store <8 x i16> %rv, ptr @vec_v8i16147 ret void148}149 150define dso_local void @movi_modimm_t10() nounwind {151; CHECK-LABEL: movi_modimm_t10:152; CHECK: // %bb.0:153; CHECK-NEXT: movi v0.2d, #0x00ffff0000ffff154; CHECK-NEXT: adrp x8, vec_v8i16155; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16156; CHECK-NEXT: ld1 { v1.8h }, [x8]157; CHECK-NEXT: add v0.8h, v1.8h, v0.8h158; CHECK-NEXT: st1 { v0.8h }, [x8]159; CHECK-NEXT: ret160 %in = load <8 x i16>, ptr @vec_v8i16161 %rv = add <8 x i16> %in, <i16 -1, i16 0, i16 -1, i16 0, i16 -1, i16 0, i16 -1, i16 0>162 store <8 x i16> %rv, ptr @vec_v8i16163 ret void164}165 166define dso_local void @fmov_modimm_t11() nounwind {167; CHECK-LABEL: fmov_modimm_t11:168; CHECK: // %bb.0:169; CHECK-NEXT: fmov v0.4s, #3.00000000170; CHECK-NEXT: adrp x8, vec_v8i16171; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16172; CHECK-NEXT: ld1 { v1.8h }, [x8]173; CHECK-NEXT: add v0.8h, v1.8h, v0.8h174; CHECK-NEXT: st1 { v0.8h }, [x8]175; CHECK-NEXT: ret176 %in = load <8 x i16>, ptr @vec_v8i16177 %rv = add <8 x i16> %in, <i16 0, i16 16448, i16 0, i16 16448, i16 0, i16 16448, i16 0, i16 16448>178 store <8 x i16> %rv, ptr @vec_v8i16179 ret void180}181 182define dso_local void @fmov_modimm_t12() nounwind {183; CHECK-LABEL: fmov_modimm_t12:184; CHECK: // %bb.0:185; CHECK-NEXT: fmov v0.2d, #0.17968750186; CHECK-NEXT: adrp x8, vec_v8i16187; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16188; CHECK-NEXT: ld1 { v1.8h }, [x8]189; CHECK-NEXT: add v0.8h, v1.8h, v0.8h190; CHECK-NEXT: st1 { v0.8h }, [x8]191; CHECK-NEXT: ret192 %in = load <8 x i16>, ptr @vec_v8i16193 %rv = add <8 x i16> %in, <i16 0, i16 0, i16 0, i16 16327, i16 0, i16 0, i16 0, i16 16327>194 store <8 x i16> %rv, ptr @vec_v8i16195 ret void196}197 198define dso_local void @mvni_modimm_t1() nounwind {199; CHECK-LABEL: mvni_modimm_t1:200; CHECK: // %bb.0:201; CHECK-NEXT: adrp x8, vec_v8i16202; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16203; CHECK-NEXT: mvni v1.4s, #1204; CHECK-NEXT: ld1 { v0.8h }, [x8]205; CHECK-NEXT: add v0.8h, v0.8h, v1.8h206; CHECK-NEXT: st1 { v0.8h }, [x8]207; CHECK-NEXT: ret208 %in = load <8 x i16>, ptr @vec_v8i16209 %rv = add <8 x i16> %in, <i16 65534, i16 65535, i16 65534, i16 65535, i16 65534, i16 65535, i16 65534, i16 65535>210 store <8 x i16> %rv, ptr @vec_v8i16211 ret void212}213 214define dso_local void @mvni_modimm_t2() nounwind {215; CHECK-LABEL: mvni_modimm_t2:216; CHECK: // %bb.0:217; CHECK-NEXT: adrp x8, vec_v8i16218; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16219; CHECK-NEXT: mvni v1.4s, #1, lsl #8220; CHECK-NEXT: ld1 { v0.8h }, [x8]221; CHECK-NEXT: add v0.8h, v0.8h, v1.8h222; CHECK-NEXT: st1 { v0.8h }, [x8]223; CHECK-NEXT: ret224 %in = load <8 x i16>, ptr @vec_v8i16225 %rv = add <8 x i16> %in, <i16 65279, i16 65535, i16 65279, i16 65535, i16 65279, i16 65535, i16 65279, i16 65535>226 store <8 x i16> %rv, ptr @vec_v8i16227 ret void228}229 230define dso_local void @mvni_modimm_t3() nounwind {231; CHECK-LABEL: mvni_modimm_t3:232; CHECK: // %bb.0:233; CHECK-NEXT: adrp x8, vec_v8i16234; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16235; CHECK-NEXT: mvni v1.4s, #1, lsl #16236; CHECK-NEXT: ld1 { v0.8h }, [x8]237; CHECK-NEXT: add v0.8h, v0.8h, v1.8h238; CHECK-NEXT: st1 { v0.8h }, [x8]239; CHECK-NEXT: ret240 %in = load <8 x i16>, ptr @vec_v8i16241 %rv = add <8 x i16> %in, <i16 65535, i16 65534, i16 65535, i16 65534, i16 65535, i16 65534, i16 65535, i16 65534>242 store <8 x i16> %rv, ptr @vec_v8i16243 ret void244}245 246define dso_local void @mvni_modimm_t4() nounwind {247; CHECK-LABEL: mvni_modimm_t4:248; CHECK: // %bb.0:249; CHECK-NEXT: adrp x8, vec_v8i16250; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16251; CHECK-NEXT: mvni v1.4s, #1, lsl #24252; CHECK-NEXT: ld1 { v0.8h }, [x8]253; CHECK-NEXT: add v0.8h, v0.8h, v1.8h254; CHECK-NEXT: st1 { v0.8h }, [x8]255; CHECK-NEXT: ret256 %in = load <8 x i16>, ptr @vec_v8i16257 %rv = add <8 x i16> %in, <i16 65535, i16 65279, i16 65535, i16 65279, i16 65535, i16 65279, i16 65535, i16 65279>258 store <8 x i16> %rv, ptr @vec_v8i16259 ret void260}261 262define dso_local void @mvni_modimm_t5() nounwind {263; CHECK-LABEL: mvni_modimm_t5:264; CHECK: // %bb.0:265; CHECK-NEXT: adrp x8, vec_v8i16266; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16267; CHECK-NEXT: mvni v1.8h, #1268; CHECK-NEXT: ld1 { v0.8h }, [x8]269; CHECK-NEXT: add v0.8h, v0.8h, v1.8h270; CHECK-NEXT: st1 { v0.8h }, [x8]271; CHECK-NEXT: ret272 %in = load <8 x i16>, ptr @vec_v8i16273 %rv = add <8 x i16> %in, <i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534>274 store <8 x i16> %rv, ptr @vec_v8i16275 ret void276}277 278define dso_local void @mvni_modimm_t6() nounwind {279; CHECK-LABEL: mvni_modimm_t6:280; CHECK: // %bb.0:281; CHECK-NEXT: adrp x8, vec_v8i16282; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16283; CHECK-NEXT: mvni v1.8h, #1, lsl #8284; CHECK-NEXT: ld1 { v0.8h }, [x8]285; CHECK-NEXT: add v0.8h, v0.8h, v1.8h286; CHECK-NEXT: st1 { v0.8h }, [x8]287; CHECK-NEXT: ret288 %in = load <8 x i16>, ptr @vec_v8i16289 %rv = add <8 x i16> %in, <i16 65279, i16 65279, i16 65279, i16 65279, i16 65279, i16 65279, i16 65279, i16 65279>290 store <8 x i16> %rv, ptr @vec_v8i16291 ret void292}293 294define dso_local void @mvni_modimm_t7() nounwind {295; CHECK-LABEL: mvni_modimm_t7:296; CHECK: // %bb.0:297; CHECK-NEXT: adrp x8, vec_v8i16298; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16299; CHECK-NEXT: mvni v1.4s, #1, msl #8300; CHECK-NEXT: ld1 { v0.8h }, [x8]301; CHECK-NEXT: add v0.8h, v0.8h, v1.8h302; CHECK-NEXT: st1 { v0.8h }, [x8]303; CHECK-NEXT: ret304 %in = load <8 x i16>, ptr @vec_v8i16305 %rv = add <8 x i16> %in, <i16 65024, i16 65535, i16 65024, i16 65535, i16 65024, i16 65535, i16 65024, i16 65535>306 store <8 x i16> %rv, ptr @vec_v8i16307 ret void308}309 310define dso_local void @mvni_modimm_t8() nounwind {311; CHECK-LABEL: mvni_modimm_t8:312; CHECK: // %bb.0:313; CHECK-NEXT: adrp x8, vec_v8i16314; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16315; CHECK-NEXT: mvni v1.4s, #1, msl #16316; CHECK-NEXT: ld1 { v0.8h }, [x8]317; CHECK-NEXT: add v0.8h, v0.8h, v1.8h318; CHECK-NEXT: st1 { v0.8h }, [x8]319; CHECK-NEXT: ret320 %in = load <8 x i16>, ptr @vec_v8i16321 %rv = add <8 x i16> %in, <i16 0, i16 65534, i16 0, i16 65534, i16 0, i16 65534, i16 0, i16 65534>322 store <8 x i16> %rv, ptr @vec_v8i16323 ret void324}325 326define dso_local void @bic_modimm_t1() nounwind {327; CHECK-LABEL: bic_modimm_t1:328; CHECK: // %bb.0:329; CHECK-NEXT: adrp x8, vec_v8i16330; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16331; CHECK-NEXT: ld1 { v0.8h }, [x8]332; CHECK-NEXT: bic v0.4s, #1333; CHECK-NEXT: st1 { v0.8h }, [x8]334; CHECK-NEXT: ret335 %in = load <8 x i16>, ptr @vec_v8i16336 %rv = and <8 x i16> %in, <i16 65534, i16 65535, i16 65534, i16 65535, i16 65534, i16 65535, i16 65534, i16 65535>337 store <8 x i16> %rv, ptr @vec_v8i16338 ret void339}340 341define dso_local void @bic_modimm_t2() nounwind {342; CHECK-LABEL: bic_modimm_t2:343; CHECK: // %bb.0:344; CHECK-NEXT: adrp x8, vec_v8i16345; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16346; CHECK-NEXT: ld1 { v0.8h }, [x8]347; CHECK-NEXT: bic v0.4s, #1, lsl #8348; CHECK-NEXT: st1 { v0.8h }, [x8]349; CHECK-NEXT: ret350 %in = load <8 x i16>, ptr @vec_v8i16351 %rv = and <8 x i16> %in, <i16 65279, i16 65535, i16 65279, i16 65535, i16 65279, i16 65535, i16 65279, i16 65535>352 store <8 x i16> %rv, ptr @vec_v8i16353 ret void354}355 356define dso_local void @bic_modimm_t3() nounwind {357; CHECK-LABEL: bic_modimm_t3:358; CHECK: // %bb.0:359; CHECK-NEXT: adrp x8, vec_v8i16360; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16361; CHECK-NEXT: ld1 { v0.8h }, [x8]362; CHECK-NEXT: bic v0.4s, #1, lsl #16363; CHECK-NEXT: st1 { v0.8h }, [x8]364; CHECK-NEXT: ret365 %in = load <8 x i16>, ptr @vec_v8i16366 %rv = and <8 x i16> %in, <i16 65535, i16 65534, i16 65535, i16 65534, i16 65535, i16 65534, i16 65535, i16 65534>367 store <8 x i16> %rv, ptr @vec_v8i16368 ret void369}370 371define dso_local void @bic_modimm_t4() nounwind {372; CHECK-LABEL: bic_modimm_t4:373; CHECK: // %bb.0:374; CHECK-NEXT: adrp x8, vec_v8i16375; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16376; CHECK-NEXT: ld1 { v0.8h }, [x8]377; CHECK-NEXT: bic v0.4s, #1, lsl #24378; CHECK-NEXT: st1 { v0.8h }, [x8]379; CHECK-NEXT: ret380 %in = load <8 x i16>, ptr @vec_v8i16381 %rv = and <8 x i16> %in, <i16 65535, i16 65279, i16 65535, i16 65279, i16 65535, i16 65279, i16 65535, i16 65279>382 store <8 x i16> %rv, ptr @vec_v8i16383 ret void384}385 386define dso_local void @bic_modimm_t5() nounwind {387; CHECK-LABEL: bic_modimm_t5:388; CHECK: // %bb.0:389; CHECK-NEXT: adrp x8, vec_v8i16390; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16391; CHECK-NEXT: ld1 { v0.8h }, [x8]392; CHECK-NEXT: bic v0.8h, #1393; CHECK-NEXT: st1 { v0.8h }, [x8]394; CHECK-NEXT: ret395 %in = load <8 x i16>, ptr @vec_v8i16396 %rv = and <8 x i16> %in, <i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534, i16 65534>397 store <8 x i16> %rv, ptr @vec_v8i16398 ret void399}400 401define dso_local void @bic_modimm_t6() nounwind {402; CHECK-LABEL: bic_modimm_t6:403; CHECK: // %bb.0:404; CHECK-NEXT: adrp x8, vec_v8i16405; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16406; CHECK-NEXT: ld1 { v0.8h }, [x8]407; CHECK-NEXT: bic v0.8h, #1, lsl #8408; CHECK-NEXT: st1 { v0.8h }, [x8]409; CHECK-NEXT: ret410 %in = load <8 x i16>, ptr @vec_v8i16411 %rv = and <8 x i16> %in, <i16 65279, i16 65279, i16 65279, i16 65279, i16 65279, i16 65279, i16 65279, i16 65279>412 store <8 x i16> %rv, ptr @vec_v8i16413 ret void414}415 416define dso_local void @orr_modimm_t1() nounwind {417; CHECK-LABEL: orr_modimm_t1:418; CHECK: // %bb.0:419; CHECK-NEXT: adrp x8, vec_v8i16420; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16421; CHECK-NEXT: ld1 { v0.8h }, [x8]422; CHECK-NEXT: orr v0.4s, #1423; CHECK-NEXT: st1 { v0.8h }, [x8]424; CHECK-NEXT: ret425 %in = load <8 x i16>, ptr @vec_v8i16426 %rv = or <8 x i16> %in, <i16 1, i16 0, i16 1, i16 0, i16 1, i16 0, i16 1, i16 0>427 store <8 x i16> %rv, ptr @vec_v8i16428 ret void429}430 431define dso_local void @orr_modimm_t2() nounwind {432; CHECK-LABEL: orr_modimm_t2:433; CHECK: // %bb.0:434; CHECK-NEXT: adrp x8, vec_v8i16435; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16436; CHECK-NEXT: ld1 { v0.8h }, [x8]437; CHECK-NEXT: orr v0.4s, #1, lsl #8438; CHECK-NEXT: st1 { v0.8h }, [x8]439; CHECK-NEXT: ret440 %in = load <8 x i16>, ptr @vec_v8i16441 %rv = or <8 x i16> %in, <i16 256, i16 0, i16 256, i16 0, i16 256, i16 0, i16 256, i16 0>442 store <8 x i16> %rv, ptr @vec_v8i16443 ret void444}445 446define dso_local void @orr_modimm_t3() nounwind {447; CHECK-LABEL: orr_modimm_t3:448; CHECK: // %bb.0:449; CHECK-NEXT: adrp x8, vec_v8i16450; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16451; CHECK-NEXT: ld1 { v0.8h }, [x8]452; CHECK-NEXT: orr v0.4s, #1, lsl #16453; CHECK-NEXT: st1 { v0.8h }, [x8]454; CHECK-NEXT: ret455 %in = load <8 x i16>, ptr @vec_v8i16456 %rv = or <8 x i16> %in, <i16 0, i16 1, i16 0, i16 1, i16 0, i16 1, i16 0, i16 1>457 store <8 x i16> %rv, ptr @vec_v8i16458 ret void459}460 461define dso_local void @orr_modimm_t4() nounwind {462; CHECK-LABEL: orr_modimm_t4:463; CHECK: // %bb.0:464; CHECK-NEXT: adrp x8, vec_v8i16465; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16466; CHECK-NEXT: ld1 { v0.8h }, [x8]467; CHECK-NEXT: orr v0.4s, #1, lsl #24468; CHECK-NEXT: st1 { v0.8h }, [x8]469; CHECK-NEXT: ret470 %in = load <8 x i16>, ptr @vec_v8i16471 %rv = or <8 x i16> %in, <i16 0, i16 256, i16 0, i16 256, i16 0, i16 256, i16 0, i16 256>472 store <8 x i16> %rv, ptr @vec_v8i16473 ret void474}475 476define dso_local void @orr_modimm_t5() nounwind {477; CHECK-LABEL: orr_modimm_t5:478; CHECK: // %bb.0:479; CHECK-NEXT: adrp x8, vec_v8i16480; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16481; CHECK-NEXT: ld1 { v0.8h }, [x8]482; CHECK-NEXT: orr v0.8h, #1483; CHECK-NEXT: st1 { v0.8h }, [x8]484; CHECK-NEXT: ret485 %in = load <8 x i16>, ptr @vec_v8i16486 %rv = or <8 x i16> %in, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>487 store <8 x i16> %rv, ptr @vec_v8i16488 ret void489}490 491define dso_local void @orr_modimm_t6() nounwind {492; CHECK-LABEL: orr_modimm_t6:493; CHECK: // %bb.0:494; CHECK-NEXT: adrp x8, vec_v8i16495; CHECK-NEXT: add x8, x8, :lo12:vec_v8i16496; CHECK-NEXT: ld1 { v0.8h }, [x8]497; CHECK-NEXT: orr v0.8h, #1, lsl #8498; CHECK-NEXT: st1 { v0.8h }, [x8]499; CHECK-NEXT: ret500 %in = load <8 x i16>, ptr @vec_v8i16501 %rv = or <8 x i16> %in, <i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256, i16 256>502 store <8 x i16> %rv, ptr @vec_v8i16503 ret void504}505 506declare i8 @f_v8i8(<8 x i8> %arg)507declare i16 @f_v4i16(<4 x i16> %arg)508declare i32 @f_v2i32(<2 x i32> %arg)509declare i64 @f_v1i64(<1 x i64> %arg)510declare i8 @f_v16i8(<16 x i8> %arg)511declare i16 @f_v8i16(<8 x i16> %arg)512declare i32 @f_v4i32(<4 x i32> %arg)513declare i64 @f_v2i64(<2 x i64> %arg)514 515define dso_local void @modimm_t1_call() {516; CHECK-LABEL: modimm_t1_call:517; CHECK: // %bb.0:518; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill519; CHECK-NEXT: .cfi_def_cfa_offset 16520; CHECK-NEXT: .cfi_offset w30, -16521; CHECK-NEXT: movi v0.2s, #8522; CHECK-NEXT: rev64 v0.8b, v0.8b523; CHECK-NEXT: bl f_v8i8524; CHECK-NEXT: movi v0.2s, #7525; CHECK-NEXT: rev64 v0.4h, v0.4h526; CHECK-NEXT: bl f_v4i16527; CHECK-NEXT: movi v0.2s, #6528; CHECK-NEXT: rev64 v0.2s, v0.2s529; CHECK-NEXT: bl f_v2i32530; CHECK-NEXT: movi v0.2s, #5531; CHECK-NEXT: bl f_v1i64532; CHECK-NEXT: movi v0.4s, #5533; CHECK-NEXT: rev64 v0.16b, v0.16b534; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8535; CHECK-NEXT: bl f_v16i8536; CHECK-NEXT: movi v0.4s, #4537; CHECK-NEXT: rev64 v0.8h, v0.8h538; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8539; CHECK-NEXT: bl f_v8i16540; CHECK-NEXT: movi v0.4s, #3541; CHECK-NEXT: rev64 v0.4s, v0.4s542; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8543; CHECK-NEXT: bl f_v4i32544; CHECK-NEXT: movi v0.4s, #2545; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8546; CHECK-NEXT: bl f_v2i64547; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload548; CHECK-NEXT: ret549 call i8 @f_v8i8(<8 x i8> <i8 8, i8 0, i8 0, i8 0, i8 8, i8 0, i8 0, i8 0>)550 call i16 @f_v4i16(<4 x i16> <i16 7, i16 0, i16 7, i16 0>)551 call i32 @f_v2i32(<2 x i32> <i32 6, i32 6>)552 call i64 @f_v1i64(<1 x i64> <i64 21474836485>)553 call i8 @f_v16i8(<16 x i8> <i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0>)554 call i16 @f_v8i16(<8 x i16> <i16 4, i16 0, i16 4, i16 0, i16 4, i16 0, i16 4, i16 0>)555 call i32 @f_v4i32(<4 x i32> <i32 3, i32 3, i32 3, i32 3>)556 call i64 @f_v2i64(<2 x i64> <i64 8589934594, i64 8589934594>)557 558 ret void559}560 561define dso_local void @modimm_t2_call() {562; CHECK-LABEL: modimm_t2_call:563; CHECK: // %bb.0:564; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill565; CHECK-NEXT: .cfi_def_cfa_offset 16566; CHECK-NEXT: .cfi_offset w30, -16567; CHECK-NEXT: movi v0.2s, #8, lsl #8568; CHECK-NEXT: rev64 v0.8b, v0.8b569; CHECK-NEXT: bl f_v8i8570; CHECK-NEXT: movi v0.2s, #7, lsl #8571; CHECK-NEXT: rev64 v0.4h, v0.4h572; CHECK-NEXT: bl f_v4i16573; CHECK-NEXT: movi v0.2s, #6, lsl #8574; CHECK-NEXT: rev64 v0.2s, v0.2s575; CHECK-NEXT: bl f_v2i32576; CHECK-NEXT: movi v0.2s, #5, lsl #8577; CHECK-NEXT: bl f_v1i64578; CHECK-NEXT: movi v0.4s, #5, lsl #8579; CHECK-NEXT: rev64 v0.16b, v0.16b580; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8581; CHECK-NEXT: bl f_v16i8582; CHECK-NEXT: movi v0.4s, #4, lsl #8583; CHECK-NEXT: rev64 v0.8h, v0.8h584; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8585; CHECK-NEXT: bl f_v8i16586; CHECK-NEXT: movi v0.4s, #3, lsl #8587; CHECK-NEXT: rev64 v0.4s, v0.4s588; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8589; CHECK-NEXT: bl f_v4i32590; CHECK-NEXT: movi v0.4s, #2, lsl #8591; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8592; CHECK-NEXT: bl f_v2i64593; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload594; CHECK-NEXT: ret595 call i8 @f_v8i8(<8 x i8> <i8 0, i8 8, i8 0, i8 0, i8 0, i8 8, i8 0, i8 0>)596 call i16 @f_v4i16(<4 x i16> <i16 1792, i16 0, i16 1792, i16 0>)597 call i32 @f_v2i32(<2 x i32> <i32 1536, i32 1536>)598 call i64 @f_v1i64(<1 x i64> <i64 5497558140160>)599 call i8 @f_v16i8(<16 x i8> <i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0>)600 call i16 @f_v8i16(<8 x i16> <i16 1024, i16 0, i16 1024, i16 0, i16 1024, i16 0, i16 1024, i16 0>)601 call i32 @f_v4i32(<4 x i32> <i32 768, i32 768, i32 768, i32 768>)602 call i64 @f_v2i64(<2 x i64> <i64 2199023256064, i64 2199023256064>)603 604 ret void605}606 607define dso_local void @modimm_t3_call() {608; CHECK-LABEL: modimm_t3_call:609; CHECK: // %bb.0:610; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill611; CHECK-NEXT: .cfi_def_cfa_offset 16612; CHECK-NEXT: .cfi_offset w30, -16613; CHECK-NEXT: movi v0.2s, #8, lsl #16614; CHECK-NEXT: rev64 v0.8b, v0.8b615; CHECK-NEXT: bl f_v8i8616; CHECK-NEXT: movi v0.2s, #7, lsl #16617; CHECK-NEXT: rev64 v0.4h, v0.4h618; CHECK-NEXT: bl f_v4i16619; CHECK-NEXT: movi v0.2s, #6, lsl #16620; CHECK-NEXT: rev64 v0.2s, v0.2s621; CHECK-NEXT: bl f_v2i32622; CHECK-NEXT: movi v0.2s, #5, lsl #16623; CHECK-NEXT: bl f_v1i64624; CHECK-NEXT: movi v0.4s, #5, lsl #16625; CHECK-NEXT: rev64 v0.16b, v0.16b626; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8627; CHECK-NEXT: bl f_v16i8628; CHECK-NEXT: movi v0.4s, #4, lsl #16629; CHECK-NEXT: rev64 v0.8h, v0.8h630; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8631; CHECK-NEXT: bl f_v8i16632; CHECK-NEXT: movi v0.4s, #3, lsl #16633; CHECK-NEXT: rev64 v0.4s, v0.4s634; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8635; CHECK-NEXT: bl f_v4i32636; CHECK-NEXT: movi v0.4s, #2, lsl #16637; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8638; CHECK-NEXT: bl f_v2i64639; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload640; CHECK-NEXT: ret641 call i8 @f_v8i8(<8 x i8> <i8 0, i8 0, i8 8, i8 0, i8 0, i8 0, i8 8, i8 0>)642 call i16 @f_v4i16(<4 x i16> <i16 0, i16 7, i16 0, i16 7>)643 call i32 @f_v2i32(<2 x i32> <i32 393216, i32 393216>)644 call i64 @f_v1i64(<1 x i64> <i64 1407374883880960>)645 call i8 @f_v16i8(<16 x i8> <i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0>)646 call i16 @f_v8i16(<8 x i16> <i16 0, i16 4, i16 0, i16 4, i16 0, i16 4, i16 0, i16 4>)647 call i32 @f_v4i32(<4 x i32> <i32 196608, i32 196608, i32 196608, i32 196608>)648 call i64 @f_v2i64(<2 x i64> <i64 562949953552384, i64 562949953552384>)649 650 ret void651}652 653define dso_local void @modimm_t4_call() {654; CHECK-LABEL: modimm_t4_call:655; CHECK: // %bb.0:656; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill657; CHECK-NEXT: .cfi_def_cfa_offset 16658; CHECK-NEXT: .cfi_offset w30, -16659; CHECK-NEXT: movi v0.2s, #8, lsl #24660; CHECK-NEXT: rev64 v0.8b, v0.8b661; CHECK-NEXT: bl f_v8i8662; CHECK-NEXT: movi v0.2s, #7, lsl #24663; CHECK-NEXT: rev64 v0.4h, v0.4h664; CHECK-NEXT: bl f_v4i16665; CHECK-NEXT: movi v0.2s, #6, lsl #24666; CHECK-NEXT: rev64 v0.2s, v0.2s667; CHECK-NEXT: bl f_v2i32668; CHECK-NEXT: movi v0.2s, #5, lsl #24669; CHECK-NEXT: bl f_v1i64670; CHECK-NEXT: movi v0.4s, #5, lsl #24671; CHECK-NEXT: rev64 v0.16b, v0.16b672; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8673; CHECK-NEXT: bl f_v16i8674; CHECK-NEXT: movi v0.4s, #4, lsl #24675; CHECK-NEXT: rev64 v0.8h, v0.8h676; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8677; CHECK-NEXT: bl f_v8i16678; CHECK-NEXT: movi v0.4s, #3, lsl #24679; CHECK-NEXT: rev64 v0.4s, v0.4s680; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8681; CHECK-NEXT: bl f_v4i32682; CHECK-NEXT: movi v0.4s, #2, lsl #24683; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8684; CHECK-NEXT: bl f_v2i64685; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload686; CHECK-NEXT: ret687 call i8 @f_v8i8(<8 x i8> <i8 0, i8 0, i8 0, i8 8, i8 0, i8 0, i8 0, i8 8>)688 call i16 @f_v4i16(<4 x i16> <i16 0, i16 1792, i16 0, i16 1792>)689 call i32 @f_v2i32(<2 x i32> <i32 100663296, i32 100663296>)690 call i64 @f_v1i64(<1 x i64> <i64 360287970273525760>)691 call i8 @f_v16i8(<16 x i8> <i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5, i8 0, i8 0, i8 0, i8 5>)692 call i16 @f_v8i16(<8 x i16> <i16 0, i16 1024, i16 0, i16 1024, i16 0, i16 1024, i16 0, i16 1024>)693 call i32 @f_v4i32(<4 x i32> <i32 50331648, i32 50331648, i32 50331648, i32 50331648>)694 call i64 @f_v2i64(<2 x i64> <i64 144115188109410304, i64 144115188109410304>)695 696 ret void697}698 699define dso_local void @modimm_t5_call() {700; CHECK-LABEL: modimm_t5_call:701; CHECK: // %bb.0:702; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill703; CHECK-NEXT: .cfi_def_cfa_offset 16704; CHECK-NEXT: .cfi_offset w30, -16705; CHECK-NEXT: movi v0.4h, #8706; CHECK-NEXT: rev64 v0.8b, v0.8b707; CHECK-NEXT: bl f_v8i8708; CHECK-NEXT: movi v0.4h, #7709; CHECK-NEXT: rev64 v0.4h, v0.4h710; CHECK-NEXT: bl f_v4i16711; CHECK-NEXT: movi v0.4h, #6712; CHECK-NEXT: rev64 v0.2s, v0.2s713; CHECK-NEXT: bl f_v2i32714; CHECK-NEXT: movi v0.4h, #5715; CHECK-NEXT: bl f_v1i64716; CHECK-NEXT: movi v0.8h, #5717; CHECK-NEXT: rev64 v0.16b, v0.16b718; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8719; CHECK-NEXT: bl f_v16i8720; CHECK-NEXT: movi v0.8h, #4721; CHECK-NEXT: rev64 v0.8h, v0.8h722; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8723; CHECK-NEXT: bl f_v8i16724; CHECK-NEXT: movi v0.8h, #3725; CHECK-NEXT: rev64 v0.4s, v0.4s726; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8727; CHECK-NEXT: bl f_v4i32728; CHECK-NEXT: movi v0.8h, #2729; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8730; CHECK-NEXT: bl f_v2i64731; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload732; CHECK-NEXT: ret733 call i8 @f_v8i8(<8 x i8> <i8 8, i8 0, i8 8, i8 0, i8 8, i8 0, i8 8, i8 0>)734 call i16 @f_v4i16(<4 x i16> <i16 7, i16 7, i16 7, i16 7>)735 call i32 @f_v2i32(<2 x i32> <i32 393222, i32 393222>)736 call i64 @f_v1i64(<1 x i64> <i64 1407396358717445>)737 call i8 @f_v16i8(<16 x i8> <i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0>)738 call i16 @f_v8i16(<8 x i16> <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>)739 call i32 @f_v4i32(<4 x i32> <i32 196611, i32 196611, i32 196611, i32 196611>)740 call i64 @f_v2i64(<2 x i64> <i64 562958543486978, i64 562958543486978>)741 742 ret void743}744 745define dso_local void @modimm_t6_call() {746; CHECK-LABEL: modimm_t6_call:747; CHECK: // %bb.0:748; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill749; CHECK-NEXT: .cfi_def_cfa_offset 16750; CHECK-NEXT: .cfi_offset w30, -16751; CHECK-NEXT: movi v0.4h, #8, lsl #8752; CHECK-NEXT: rev64 v0.8b, v0.8b753; CHECK-NEXT: bl f_v8i8754; CHECK-NEXT: movi v0.4h, #7, lsl #8755; CHECK-NEXT: rev64 v0.4h, v0.4h756; CHECK-NEXT: bl f_v4i16757; CHECK-NEXT: movi v0.4h, #6, lsl #8758; CHECK-NEXT: rev64 v0.2s, v0.2s759; CHECK-NEXT: bl f_v2i32760; CHECK-NEXT: movi v0.4h, #5, lsl #8761; CHECK-NEXT: bl f_v1i64762; CHECK-NEXT: movi v0.8h, #5, lsl #8763; CHECK-NEXT: rev64 v0.16b, v0.16b764; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8765; CHECK-NEXT: bl f_v16i8766; CHECK-NEXT: movi v0.8h, #4, lsl #8767; CHECK-NEXT: rev64 v0.8h, v0.8h768; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8769; CHECK-NEXT: bl f_v8i16770; CHECK-NEXT: movi v0.8h, #3, lsl #8771; CHECK-NEXT: rev64 v0.4s, v0.4s772; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8773; CHECK-NEXT: bl f_v4i32774; CHECK-NEXT: movi v0.8h, #2, lsl #8775; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8776; CHECK-NEXT: bl f_v2i64777; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload778; CHECK-NEXT: ret779 call i8 @f_v8i8(<8 x i8> <i8 0, i8 8, i8 0, i8 8, i8 0, i8 8, i8 0, i8 8>)780 call i16 @f_v4i16(<4 x i16> <i16 1792, i16 1792, i16 1792, i16 1792>)781 call i32 @f_v2i32(<2 x i32> <i32 100664832, i32 100664832>)782 call i64 @f_v1i64(<1 x i64> <i64 360293467831665920>)783 call i8 @f_v16i8(<16 x i8> <i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5, i8 0, i8 5>)784 call i16 @f_v8i16(<8 x i16> <i16 1024, i16 1024, i16 1024, i16 1024, i16 1024, i16 1024, i16 1024, i16 1024>)785 call i32 @f_v4i32(<4 x i32> <i32 50332416, i32 50332416, i32 50332416, i32 50332416>)786 call i64 @f_v2i64(<2 x i64> <i64 144117387132666368, i64 144117387132666368>)787 788 ret void789}790 791define dso_local void @modimm_t7_call() {792; CHECK-LABEL: modimm_t7_call:793; CHECK: // %bb.0:794; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill795; CHECK-NEXT: .cfi_def_cfa_offset 16796; CHECK-NEXT: .cfi_offset w30, -16797; CHECK-NEXT: movi v0.2s, #8, msl #8798; CHECK-NEXT: rev64 v0.8b, v0.8b799; CHECK-NEXT: bl f_v8i8800; CHECK-NEXT: movi v0.2s, #7, msl #8801; CHECK-NEXT: rev64 v0.4h, v0.4h802; CHECK-NEXT: bl f_v4i16803; CHECK-NEXT: movi v0.2s, #6, msl #8804; CHECK-NEXT: rev64 v0.2s, v0.2s805; CHECK-NEXT: bl f_v2i32806; CHECK-NEXT: movi v0.2s, #5, msl #8807; CHECK-NEXT: bl f_v1i64808; CHECK-NEXT: movi v0.4s, #5, msl #8809; CHECK-NEXT: rev64 v0.16b, v0.16b810; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8811; CHECK-NEXT: bl f_v16i8812; CHECK-NEXT: movi v0.4s, #4, msl #8813; CHECK-NEXT: rev64 v0.8h, v0.8h814; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8815; CHECK-NEXT: bl f_v8i16816; CHECK-NEXT: movi v0.4s, #3, msl #8817; CHECK-NEXT: rev64 v0.4s, v0.4s818; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8819; CHECK-NEXT: bl f_v4i32820; CHECK-NEXT: movi v0.4s, #2, msl #8821; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8822; CHECK-NEXT: bl f_v2i64823; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload824; CHECK-NEXT: ret825 call i8 @f_v8i8(<8 x i8> <i8 255, i8 8, i8 0, i8 0, i8 255, i8 8, i8 0, i8 0>)826 call i16 @f_v4i16(<4 x i16> <i16 2047, i16 0, i16 2047, i16 0>)827 call i32 @f_v2i32(<2 x i32> <i32 1791, i32 1791>)828 call i64 @f_v1i64(<1 x i64> <i64 6592774800895>)829 call i8 @f_v16i8(<16 x i8> <i8 255, i8 5, i8 0, i8 0, i8 255, i8 5, i8 0, i8 0, i8 255, i8 5, i8 0, i8 0, i8 255, i8 5, i8 0, i8 0>)830 call i16 @f_v8i16(<8 x i16> <i16 1279, i16 0, i16 1279, i16 0, i16 1279, i16 0, i16 1279, i16 0>)831 call i32 @f_v4i32(<4 x i32> <i32 1023, i32 1023, i32 1023, i32 1023>)832 call i64 @f_v2i64(<2 x i64> <i64 3294239916799, i64 3294239916799>)833 834 ret void835}836 837define dso_local void @modimm_t8_call() {838; CHECK-LABEL: modimm_t8_call:839; CHECK: // %bb.0:840; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill841; CHECK-NEXT: .cfi_def_cfa_offset 16842; CHECK-NEXT: .cfi_offset w30, -16843; CHECK-NEXT: movi v0.2s, #8, msl #16844; CHECK-NEXT: rev64 v0.8b, v0.8b845; CHECK-NEXT: bl f_v8i8846; CHECK-NEXT: movi v0.2s, #7, msl #16847; CHECK-NEXT: rev64 v0.4h, v0.4h848; CHECK-NEXT: bl f_v4i16849; CHECK-NEXT: movi v0.2s, #6, msl #16850; CHECK-NEXT: rev64 v0.2s, v0.2s851; CHECK-NEXT: bl f_v2i32852; CHECK-NEXT: movi v0.2s, #5, msl #16853; CHECK-NEXT: bl f_v1i64854; CHECK-NEXT: movi v0.4s, #5, msl #16855; CHECK-NEXT: rev64 v0.16b, v0.16b856; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8857; CHECK-NEXT: bl f_v16i8858; CHECK-NEXT: movi v0.4s, #4, msl #16859; CHECK-NEXT: rev64 v0.8h, v0.8h860; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8861; CHECK-NEXT: bl f_v8i16862; CHECK-NEXT: movi v0.4s, #3, msl #16863; CHECK-NEXT: rev64 v0.4s, v0.4s864; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8865; CHECK-NEXT: bl f_v4i32866; CHECK-NEXT: movi v0.4s, #2, msl #16867; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8868; CHECK-NEXT: bl f_v2i64869; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload870; CHECK-NEXT: ret871 call i8 @f_v8i8(<8 x i8> <i8 255, i8 255, i8 8, i8 0, i8 255, i8 255, i8 8, i8 0>)872 call i16 @f_v4i16(<4 x i16> <i16 65535, i16 7, i16 65535, i16 7>)873 call i32 @f_v2i32(<2 x i32> <i32 458751, i32 458751>)874 call i64 @f_v1i64(<1 x i64> <i64 1688845565689855>)875 call i8 @f_v16i8(<16 x i8> <i8 255, i8 255, i8 5, i8 0, i8 255, i8 255, i8 5, i8 0, i8 255, i8 255, i8 5, i8 0, i8 255, i8 255, i8 5, i8 0>)876 call i16 @f_v8i16(<8 x i16> <i16 65535, i16 4, i16 65535, i16 4, i16 65535, i16 4, i16 65535, i16 4>)877 call i32 @f_v4i32(<4 x i32> <i32 262143, i32 262143, i32 262143, i32 262143>)878 call i64 @f_v2i64(<2 x i64> <i64 844420635361279, i64 844420635361279>)879 880 ret void881}882 883define dso_local void @modimm_t9_call() {884; CHECK-LABEL: modimm_t9_call:885; CHECK: // %bb.0:886; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill887; CHECK-NEXT: .cfi_def_cfa_offset 16888; CHECK-NEXT: .cfi_offset w30, -16889; CHECK-NEXT: movi v0.8b, #8890; CHECK-NEXT: rev64 v0.8b, v0.8b891; CHECK-NEXT: bl f_v8i8892; CHECK-NEXT: movi v0.8b, #7893; CHECK-NEXT: rev64 v0.4h, v0.4h894; CHECK-NEXT: bl f_v4i16895; CHECK-NEXT: movi v0.8b, #6896; CHECK-NEXT: rev64 v0.2s, v0.2s897; CHECK-NEXT: bl f_v2i32898; CHECK-NEXT: movi v0.16b, #5899; CHECK-NEXT: rev64 v0.16b, v0.16b900; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8901; CHECK-NEXT: bl f_v16i8902; CHECK-NEXT: movi v0.16b, #4903; CHECK-NEXT: rev64 v0.8h, v0.8h904; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8905; CHECK-NEXT: bl f_v8i16906; CHECK-NEXT: movi v0.16b, #3907; CHECK-NEXT: rev64 v0.4s, v0.4s908; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8909; CHECK-NEXT: bl f_v4i32910; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload911; CHECK-NEXT: ret912 call i8 @f_v8i8(<8 x i8> <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>)913 call i16 @f_v4i16(<4 x i16> <i16 1799, i16 1799, i16 1799, i16 1799>)914 call i32 @f_v2i32(<2 x i32> <i32 101058054, i32 101058054>)915 call i8 @f_v16i8(<16 x i8> <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>)916 call i16 @f_v8i16(<8 x i16> <i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028>)917 call i32 @f_v4i32(<4 x i32> <i32 50529027, i32 50529027, i32 50529027, i32 50529027>)918 919 ret void920}921 922define dso_local void @modimm_t10_call() {923; CHECK-LABEL: modimm_t10_call:924; CHECK: // %bb.0:925; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill926; CHECK-NEXT: .cfi_def_cfa_offset 16927; CHECK-NEXT: .cfi_offset w30, -16928; CHECK-NEXT: movi d0, #0x0000ff000000ff929; CHECK-NEXT: rev64 v0.8b, v0.8b930; CHECK-NEXT: bl f_v8i8931; CHECK-NEXT: movi d0, #0x00ffff0000ffff932; CHECK-NEXT: rev64 v0.4h, v0.4h933; CHECK-NEXT: bl f_v4i16934; CHECK-NEXT: movi v0.2d, #0xffffffffffffffff935; CHECK-NEXT: rev64 v0.2s, v0.2s936; CHECK-NEXT: bl f_v2i32937; CHECK-NEXT: movi v0.2d, #0xffffff00ffffff938; CHECK-NEXT: rev64 v0.16b, v0.16b939; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8940; CHECK-NEXT: bl f_v16i8941; CHECK-NEXT: movi v0.2d, #0xffffffffffff0000942; CHECK-NEXT: rev64 v0.8h, v0.8h943; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8944; CHECK-NEXT: bl f_v8i16945; CHECK-NEXT: movi v0.2d, #0xffffffff00000000946; CHECK-NEXT: rev64 v0.4s, v0.4s947; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8948; CHECK-NEXT: bl f_v4i32949; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload950; CHECK-NEXT: ret951 call i8 @f_v8i8(<8 x i8> <i8 -1, i8 0, i8 0, i8 0, i8 -1, i8 0, i8 0, i8 0>)952 call i16 @f_v4i16(<4 x i16> <i16 -1, i16 0, i16 -1, i16 0>)953 call i32 @f_v2i32(<2 x i32> <i32 -1, i32 -1>)954 call i8 @f_v16i8(<16 x i8> <i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0>)955 call i16 @f_v8i16(<8 x i16> <i16 0, i16 -1, i16 -1, i16 -1, i16 0, i16 -1, i16 -1, i16 -1>)956 call i32 @f_v4i32(<4 x i32> <i32 0, i32 -1, i32 0, i32 -1>)957 958 ret void959}960 961define dso_local void @modimm_t11_call() {962; CHECK-LABEL: modimm_t11_call:963; CHECK: // %bb.0:964; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill965; CHECK-NEXT: .cfi_def_cfa_offset 16966; CHECK-NEXT: .cfi_offset w30, -16967; CHECK-NEXT: fmov v0.2s, #4.00000000968; CHECK-NEXT: rev64 v0.8b, v0.8b969; CHECK-NEXT: bl f_v8i8970; CHECK-NEXT: fmov v0.2s, #3.75000000971; CHECK-NEXT: rev64 v0.4h, v0.4h972; CHECK-NEXT: bl f_v4i16973; CHECK-NEXT: fmov v0.2s, #3.50000000974; CHECK-NEXT: rev64 v0.2s, v0.2s975; CHECK-NEXT: bl f_v2i32976; CHECK-NEXT: fmov v0.2s, #0.39062500977; CHECK-NEXT: bl f_v1i64978; CHECK-NEXT: fmov v0.4s, #3.25000000979; CHECK-NEXT: rev64 v0.16b, v0.16b980; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8981; CHECK-NEXT: bl f_v16i8982; CHECK-NEXT: fmov v0.4s, #3.00000000983; CHECK-NEXT: rev64 v0.8h, v0.8h984; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8985; CHECK-NEXT: bl f_v8i16986; CHECK-NEXT: fmov v0.4s, #2.75000000987; CHECK-NEXT: rev64 v0.4s, v0.4s988; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8989; CHECK-NEXT: bl f_v4i32990; CHECK-NEXT: fmov v0.4s, #2.50000000991; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8992; CHECK-NEXT: bl f_v2i64993; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload994; CHECK-NEXT: ret995 call i8 @f_v8i8(<8 x i8> <i8 0, i8 0, i8 128, i8 64, i8 0, i8 0, i8 128, i8 64>)996 call i16 @f_v4i16(<4 x i16> <i16 0, i16 16496, i16 0, i16 16496>)997 call i32 @f_v2i32(<2 x i32> <i32 1080033280, i32 1080033280>)998 call i64 @f_v1i64(<1 x i64> <i64 4523865826746957824>)999 call i8 @f_v16i8(<16 x i8> <i8 0, i8 0, i8 80, i8 64, i8 0, i8 0, i8 80, i8 64, i8 0, i8 0, i8 80, i8 64, i8 0, i8 0, i8 80, i8 64>)1000 call i16 @f_v8i16(<8 x i16> <i16 0, i16 16448, i16 0, i16 16448, i16 0, i16 16448, i16 0, i16 16448>)1001 call i32 @f_v4i32(<4 x i32> <i32 1076887552, i32 1076887552, i32 1076887552, i32 1076887552>)1002 call i64 @f_v2i64(<2 x i64> <i64 4620693218757967872, i64 4620693218757967872>)1003 1004 ret void1005}1006 1007define dso_local void @modimm_t12_call() {1008; CHECK-LABEL: modimm_t12_call:1009; CHECK: // %bb.0:1010; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill1011; CHECK-NEXT: .cfi_def_cfa_offset 161012; CHECK-NEXT: .cfi_offset w30, -161013; CHECK-NEXT: fmov v0.2d, #0.187500001014; CHECK-NEXT: rev64 v0.16b, v0.16b1015; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #81016; CHECK-NEXT: bl f_v16i81017; CHECK-NEXT: fmov v0.2d, #0.179687501018; CHECK-NEXT: rev64 v0.8h, v0.8h1019; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #81020; CHECK-NEXT: bl f_v8i161021; CHECK-NEXT: fmov v0.2d, #0.171875001022; CHECK-NEXT: rev64 v0.4s, v0.4s1023; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #81024; CHECK-NEXT: bl f_v4i321025; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload1026; CHECK-NEXT: ret1027 call i8 @f_v16i8(<16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 200, i8 63, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 200, i8 63>)1028 call i16 @f_v8i16(<8 x i16> <i16 0, i16 0, i16 0, i16 16327, i16 0, i16 0, i16 0, i16 16327>)1029 call i32 @f_v4i32(<4 x i32> <i32 0, i32 1069940736, i32 0, i32 1069940736>)1030 1031 ret void1032}1033 1034define <2 x double> @test_v1f64(<1 x double> %0, ptr %1) {1035; CHECK-LABEL: test_v1f64:1036; CHECK: // %bb.0:1037; CHECK-NEXT: mvni v1.2s, #31, msl #161038; CHECK-NEXT: // kill: def $d0 killed $d0 def $q01039; CHECK-NEXT: mov v1.d[1], v0.d[0]1040; CHECK-NEXT: ext v0.16b, v1.16b, v1.16b, #81041; CHECK-NEXT: ret1042 %vec = shufflevector <1 x double> <double 0xFFE00000FFE00000>, <1 x double> %0, <2 x i32> <i32 0, i32 1>1043 ret <2 x double> %vec1044}1045