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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple aarch64 -mattr=+bf16 %s -o - | FileCheck %s3 4define <2 x float> @test_vbfdot_f32(<2 x float> %r, <4 x bfloat> %a, <4 x bfloat> %b) {5; CHECK-LABEL: test_vbfdot_f32:6; CHECK: // %bb.0: // %entry7; CHECK-NEXT: bfdot v0.2s, v1.4h, v2.4h8; CHECK-NEXT: ret9entry:10 %vbfdot3.i = call <2 x float> @llvm.aarch64.neon.bfdot.v2f32.v4bf16(<2 x float> %r, <4 x bfloat> %a, <4 x bfloat> %b)11 ret <2 x float> %vbfdot3.i12}13 14define <4 x float> @test_vbfdotq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {15; CHECK-LABEL: test_vbfdotq_f32:16; CHECK: // %bb.0: // %entry17; CHECK-NEXT: bfdot v0.4s, v1.8h, v2.8h18; CHECK-NEXT: ret19entry:20 %vbfdot3.i = call <4 x float> @llvm.aarch64.neon.bfdot.v4f32.v8bf16(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b)21 ret <4 x float> %vbfdot3.i22}23 24define <2 x float> @test_vbfdot_lane_f32(<2 x float> %r, <4 x bfloat> %a, <4 x bfloat> %b) {25; CHECK-LABEL: test_vbfdot_lane_f32:26; CHECK: // %bb.0: // %entry27; CHECK-NEXT: // kill: def $d2 killed $d2 def $q228; CHECK-NEXT: bfdot v0.2s, v1.4h, v2.2h[0]29; CHECK-NEXT: ret30entry:31 %.cast = bitcast <4 x bfloat> %b to <2 x float>32 %lane = shufflevector <2 x float> %.cast, <2 x float> undef, <2 x i32> zeroinitializer33 %.cast1 = bitcast <2 x float> %lane to <4 x bfloat>34 %vbfdot3.i = call <2 x float> @llvm.aarch64.neon.bfdot.v2f32.v4bf16(<2 x float> %r, <4 x bfloat> %a, <4 x bfloat> %.cast1)35 ret <2 x float> %vbfdot3.i36}37 38define <4 x float> @test_vbfdotq_laneq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {39; CHECK-LABEL: test_vbfdotq_laneq_f32:40; CHECK: // %bb.0: // %entry41; CHECK-NEXT: bfdot v0.4s, v1.8h, v2.2h[3]42; CHECK-NEXT: ret43entry:44 %.cast = bitcast <8 x bfloat> %b to <4 x float>45 %lane = shufflevector <4 x float> %.cast, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>46 %.cast1 = bitcast <4 x float> %lane to <8 x bfloat>47 %vbfdot3.i = call <4 x float> @llvm.aarch64.neon.bfdot.v4f32.v8bf16(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %.cast1)48 ret <4 x float> %vbfdot3.i49}50 51define <2 x float> @test_vbfdot_laneq_f32(<2 x float> %r, <4 x bfloat> %a, <8 x bfloat> %b) {52; CHECK-LABEL: test_vbfdot_laneq_f32:53; CHECK: // %bb.0: // %entry54; CHECK-NEXT: bfdot v0.2s, v1.4h, v2.2h[3]55; CHECK-NEXT: ret56entry:57 %.cast = bitcast <8 x bfloat> %b to <4 x float>58 %lane = shufflevector <4 x float> %.cast, <4 x float> undef, <2 x i32> <i32 3, i32 3>59 %.cast1 = bitcast <2 x float> %lane to <4 x bfloat>60 %vbfdot3.i = call <2 x float> @llvm.aarch64.neon.bfdot.v2f32.v4bf16(<2 x float> %r, <4 x bfloat> %a, <4 x bfloat> %.cast1)61 ret <2 x float> %vbfdot3.i62}63 64define <4 x float> @test_vbfdotq_lane_f32(<4 x float> %r, <8 x bfloat> %a, <4 x bfloat> %b) {65; CHECK-LABEL: test_vbfdotq_lane_f32:66; CHECK: // %bb.0: // %entry67; CHECK-NEXT: // kill: def $d2 killed $d2 def $q268; CHECK-NEXT: bfdot v0.4s, v1.8h, v2.2h[0]69; CHECK-NEXT: ret70entry:71 %.cast = bitcast <4 x bfloat> %b to <2 x float>72 %lane = shufflevector <2 x float> %.cast, <2 x float> undef, <4 x i32> zeroinitializer73 %.cast1 = bitcast <4 x float> %lane to <8 x bfloat>74 %vbfdot3.i = call <4 x float> @llvm.aarch64.neon.bfdot.v4f32.v8bf16(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %.cast1)75 ret <4 x float> %vbfdot3.i76}77 78define <4 x float> @test_vbfmmlaq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {79; CHECK-LABEL: test_vbfmmlaq_f32:80; CHECK: // %bb.0: // %entry81; CHECK-NEXT: bfmmla v0.4s, v1.8h, v2.8h82; CHECK-NEXT: ret83entry:84 %vbfmmlaq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmmla(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b)85 ret <4 x float> %vbfmmlaq_v3.i86}87 88define <4 x float> @test_vbfmlalbq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {89; CHECK-LABEL: test_vbfmlalbq_f32:90; CHECK: // %bb.0: // %entry91; CHECK-NEXT: bfmlalb v0.4s, v1.8h, v2.8h92; CHECK-NEXT: ret93entry:94 %vbfmlalbq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalb(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b)95 ret <4 x float> %vbfmlalbq_v3.i96}97 98define <4 x float> @test_vbfmlaltq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {99; CHECK-LABEL: test_vbfmlaltq_f32:100; CHECK: // %bb.0: // %entry101; CHECK-NEXT: bfmlalt v0.4s, v1.8h, v2.8h102; CHECK-NEXT: ret103entry:104 %vbfmlaltq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b)105 ret <4 x float> %vbfmlaltq_v3.i106}107 108define <4 x float> @test_vbfmlalbq_lane_f32(<4 x float> %r, <8 x bfloat> %a, <4 x bfloat> %b) {109; CHECK-LABEL: test_vbfmlalbq_lane_f32:110; CHECK: // %bb.0: // %entry111; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2112; CHECK-NEXT: bfmlalb v0.4s, v1.8h, v2.h[0]113; CHECK-NEXT: ret114entry:115 %vecinit35 = shufflevector <4 x bfloat> %b, <4 x bfloat> undef, <8 x i32> zeroinitializer116 %vbfmlalbq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalb(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %vecinit35)117 ret <4 x float> %vbfmlalbq_v3.i118}119 120define <4 x float> @test_vbfmlalbq_laneq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {121; CHECK-LABEL: test_vbfmlalbq_laneq_f32:122; CHECK: // %bb.0: // %entry123; CHECK-NEXT: bfmlalb v0.4s, v1.8h, v2.h[3]124; CHECK-NEXT: ret125entry:126 %vecinit35 = shufflevector <8 x bfloat> %b, <8 x bfloat> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>127 %vbfmlalbq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalb(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %vecinit35)128 ret <4 x float> %vbfmlalbq_v3.i129}130 131define <4 x float> @test_vbfmlaltq_lane_f32(<4 x float> %r, <8 x bfloat> %a, <4 x bfloat> %b) {132; CHECK-LABEL: test_vbfmlaltq_lane_f32:133; CHECK: // %bb.0: // %entry134; CHECK-NEXT: // kill: def $d2 killed $d2 def $q2135; CHECK-NEXT: bfmlalt v0.4s, v1.8h, v2.h[0]136; CHECK-NEXT: ret137entry:138 %vecinit35 = shufflevector <4 x bfloat> %b, <4 x bfloat> undef, <8 x i32> zeroinitializer139 %vbfmlaltq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %vecinit35)140 ret <4 x float> %vbfmlaltq_v3.i141}142 143define <4 x float> @test_vbfmlaltq_laneq_f32(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %b) {144; CHECK-LABEL: test_vbfmlaltq_laneq_f32:145; CHECK: // %bb.0: // %entry146; CHECK-NEXT: bfmlalt v0.4s, v1.8h, v2.h[3]147; CHECK-NEXT: ret148entry:149 %vecinit35 = shufflevector <8 x bfloat> %b, <8 x bfloat> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>150 %vbfmlaltq_v3.i = call <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float> %r, <8 x bfloat> %a, <8 x bfloat> %vecinit35)151 ret <4 x float> %vbfmlaltq_v3.i152}153 154declare <2 x float> @llvm.aarch64.neon.bfdot.v2f32.v4bf16(<2 x float>, <4 x bfloat>, <4 x bfloat>)155declare <4 x float> @llvm.aarch64.neon.bfdot.v4f32.v8bf16(<4 x float>, <8 x bfloat>, <8 x bfloat>)156declare <4 x float> @llvm.aarch64.neon.bfmmla(<4 x float>, <8 x bfloat>, <8 x bfloat>)157declare <4 x float> @llvm.aarch64.neon.bfmlalb(<4 x float>, <8 x bfloat>, <8 x bfloat>)158declare <4 x float> @llvm.aarch64.neon.bfmlalt(<4 x float>, <8 x bfloat>, <8 x bfloat>)159