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1; RUN: llc -mtriple aarch64 -asm-verbose=1 -mattr=+bf16 %s -o - | FileCheck %s2 3%struct.bfloat16x4x2_t = type { [2 x <4 x bfloat>] }4%struct.bfloat16x8x2_t = type { [2 x <8 x bfloat>] }5%struct.bfloat16x4x3_t = type { [3 x <4 x bfloat>] }6%struct.bfloat16x8x3_t = type { [3 x <8 x bfloat>] }7%struct.bfloat16x4x4_t = type { [4 x <4 x bfloat>] }8%struct.bfloat16x8x4_t = type { [4 x <8 x bfloat>] }9 10define <4 x bfloat> @test_vld1_bf16(ptr nocapture readonly %ptr) local_unnamed_addr nounwind {11; CHECK-LABEL: test_vld1_bf16:12; CHECK: // %bb.0: // %entry13; CHECK-NEXT: ldr d0, [x0]14; CHECK-NEXT: ret15entry:16 %0 = load <4 x bfloat>, ptr %ptr, align 217 ret <4 x bfloat> %018}19 20define <8 x bfloat> @test_vld1q_bf16(ptr nocapture readonly %ptr) local_unnamed_addr nounwind {21; CHECK-LABEL: test_vld1q_bf16:22; CHECK: // %bb.0: // %entry23; CHECK-NEXT: ldr q0, [x0]24; CHECK-NEXT: ret25entry:26 %0 = load <8 x bfloat>, ptr %ptr, align 227 ret <8 x bfloat> %028}29 30define <4 x bfloat> @test_vld1_lane_bf16(ptr nocapture readonly %ptr, <4 x bfloat> %src) local_unnamed_addr nounwind {31; CHECK-LABEL: test_vld1_lane_bf16:32; CHECK: // %bb.0: // %entry33; CHECK: ld1 { v0.h }[0], [x0]34; CHECK: ret35entry:36 %0 = load bfloat, ptr %ptr, align 237 %vld1_lane = insertelement <4 x bfloat> %src, bfloat %0, i32 038 ret <4 x bfloat> %vld1_lane39}40 41define <8 x bfloat> @test_vld1q_lane_bf16(ptr nocapture readonly %ptr, <8 x bfloat> %src) local_unnamed_addr nounwind {42; CHECK-LABEL: test_vld1q_lane_bf16:43; CHECK: // %bb.0: // %entry44; CHECK-NEXT: ld1 { v0.h }[7], [x0]45; CHECK-NEXT: ret46entry:47 %0 = load bfloat, ptr %ptr, align 248 %vld1_lane = insertelement <8 x bfloat> %src, bfloat %0, i32 749 ret <8 x bfloat> %vld1_lane50}51 52define <4 x bfloat> @test_vld1_dup_bf16(ptr nocapture readonly %ptr) local_unnamed_addr nounwind {53; CHECK-LABEL: test_vld1_dup_bf16:54; CHECK: // %bb.0: // %entry55; CHECK-NEXT: ld1r { v0.4h }, [x0]56; CHECK-NEXT: ret57entry:58 %0 = load bfloat, ptr %ptr, align 259 %1 = insertelement <4 x bfloat> undef, bfloat %0, i32 060 %lane = shufflevector <4 x bfloat> %1, <4 x bfloat> undef, <4 x i32> zeroinitializer61 ret <4 x bfloat> %lane62}63 64define %struct.bfloat16x4x2_t @test_vld1_bf16_x2(ptr %ptr) local_unnamed_addr nounwind {65; CHECK-LABEL: test_vld1_bf16_x2:66; CHECK: // %bb.0: // %entry67; CHECK-NEXT: ld1 { v0.4h, v1.4h }, [x0]68; CHECK-NEXT: ret69entry:70 %vld1xN = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x2.v4bf16.p0(ptr %ptr)71 %vld1xN.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld1xN, 072 %vld1xN.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld1xN, 173 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x2_t undef, <4 x bfloat> %vld1xN.fca.0.extract, 0, 074 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x2_t %.fca.0.0.insert, <4 x bfloat> %vld1xN.fca.1.extract, 0, 175 ret %struct.bfloat16x4x2_t %.fca.0.1.insert76}77 78declare { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x2.v4bf16.p0(ptr) nounwind79 80define %struct.bfloat16x8x2_t @test_vld1q_bf16_x2(ptr %ptr) local_unnamed_addr nounwind {81; CHECK-LABEL: test_vld1q_bf16_x2:82; CHECK: // %bb.0: // %entry83; CHECK-NEXT: ld1 { v0.8h, v1.8h }, [x0]84; CHECK-NEXT: ret85entry:86 %vld1xN = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x2.v8bf16.p0(ptr %ptr)87 %vld1xN.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld1xN, 088 %vld1xN.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld1xN, 189 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x2_t undef, <8 x bfloat> %vld1xN.fca.0.extract, 0, 090 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x2_t %.fca.0.0.insert, <8 x bfloat> %vld1xN.fca.1.extract, 0, 191 ret %struct.bfloat16x8x2_t %.fca.0.1.insert92}93 94; Function Attrs: argmemonly nounwind readonly95declare { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x2.v8bf16.p0(ptr) nounwind96 97define %struct.bfloat16x4x3_t @test_vld1_bf16_x3(ptr %ptr) local_unnamed_addr nounwind {98; CHECK-LABEL: test_vld1_bf16_x3:99; CHECK: // %bb.0: // %entry100; CHECK-NEXT: ld1 { v0.4h, v1.4h, v2.4h }, [x0]101; CHECK-NEXT: ret102entry:103 %vld1xN = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x3.v4bf16.p0(ptr %ptr)104 %vld1xN.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 0105 %vld1xN.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 1106 %vld1xN.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 2107 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x3_t undef, <4 x bfloat> %vld1xN.fca.0.extract, 0, 0108 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.0.insert, <4 x bfloat> %vld1xN.fca.1.extract, 0, 1109 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.1.insert, <4 x bfloat> %vld1xN.fca.2.extract, 0, 2110 ret %struct.bfloat16x4x3_t %.fca.0.2.insert111}112 113; Function Attrs: argmemonly nounwind readonly114declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x3.v4bf16.p0(ptr) nounwind115 116define %struct.bfloat16x8x3_t @test_vld1q_bf16_x3(ptr %ptr) local_unnamed_addr nounwind {117; CHECK-LABEL: test_vld1q_bf16_x3:118; CHECK: // %bb.0: // %entry119; CHECK-NEXT: ld1 { v0.8h, v1.8h, v2.8h }, [x0]120; CHECK-NEXT: ret121entry:122 %vld1xN = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x3.v8bf16.p0(ptr %ptr)123 %vld1xN.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 0124 %vld1xN.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 1125 %vld1xN.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 2126 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x3_t undef, <8 x bfloat> %vld1xN.fca.0.extract, 0, 0127 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.0.insert, <8 x bfloat> %vld1xN.fca.1.extract, 0, 1128 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.1.insert, <8 x bfloat> %vld1xN.fca.2.extract, 0, 2129 ret %struct.bfloat16x8x3_t %.fca.0.2.insert130}131 132; Function Attrs: argmemonly nounwind readonly133declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x3.v8bf16.p0(ptr) nounwind134 135define %struct.bfloat16x4x4_t @test_vld1_bf16_x4(ptr %ptr) local_unnamed_addr nounwind {136; CHECK-LABEL: test_vld1_bf16_x4:137; CHECK: // %bb.0: // %entry138; CHECK-NEXT: ld1 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]139; CHECK-NEXT: ret140entry:141 %vld1xN = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x4.v4bf16.p0(ptr %ptr)142 %vld1xN.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 0143 %vld1xN.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 1144 %vld1xN.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 2145 %vld1xN.fca.3.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld1xN, 3146 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x4_t undef, <4 x bfloat> %vld1xN.fca.0.extract, 0, 0147 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.0.insert, <4 x bfloat> %vld1xN.fca.1.extract, 0, 1148 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.1.insert, <4 x bfloat> %vld1xN.fca.2.extract, 0, 2149 %.fca.0.3.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.2.insert, <4 x bfloat> %vld1xN.fca.3.extract, 0, 3150 ret %struct.bfloat16x4x4_t %.fca.0.3.insert151}152 153; Function Attrs: argmemonly nounwind readonly154declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x4.v4bf16.p0(ptr) nounwind155 156define %struct.bfloat16x8x4_t @test_vld1q_bf16_x4(ptr %ptr) local_unnamed_addr nounwind {157; CHECK-LABEL: test_vld1q_bf16_x4:158; CHECK: // %bb.0: // %entry159; CHECK-NEXT: ld1 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]160; CHECK-NEXT: ret161entry:162 %vld1xN = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x4.v8bf16.p0(ptr %ptr)163 %vld1xN.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 0164 %vld1xN.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 1165 %vld1xN.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 2166 %vld1xN.fca.3.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld1xN, 3167 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x4_t undef, <8 x bfloat> %vld1xN.fca.0.extract, 0, 0168 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.0.insert, <8 x bfloat> %vld1xN.fca.1.extract, 0, 1169 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.1.insert, <8 x bfloat> %vld1xN.fca.2.extract, 0, 2170 %.fca.0.3.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.2.insert, <8 x bfloat> %vld1xN.fca.3.extract, 0, 3171 ret %struct.bfloat16x8x4_t %.fca.0.3.insert172}173 174; Function Attrs: argmemonly nounwind readonly175declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x4.v8bf16.p0(ptr) nounwind176 177define <8 x bfloat> @test_vld1q_dup_bf16(ptr nocapture readonly %ptr) local_unnamed_addr nounwind {178; CHECK-LABEL: test_vld1q_dup_bf16:179; CHECK: // %bb.0: // %entry180; CHECK-NEXT: ld1r { v0.8h }, [x0]181; CHECK-NEXT: ret182entry:183 %0 = load bfloat, ptr %ptr, align 2184 %1 = insertelement <8 x bfloat> undef, bfloat %0, i32 0185 %lane = shufflevector <8 x bfloat> %1, <8 x bfloat> undef, <8 x i32> zeroinitializer186 ret <8 x bfloat> %lane187}188 189define %struct.bfloat16x4x2_t @test_vld2_bf16(ptr %ptr) local_unnamed_addr nounwind {190; CHECK-LABEL: test_vld2_bf16:191; CHECK: // %bb.0: // %entry192; CHECK-NEXT: ld2 { v0.4h, v1.4h }, [x0]193; CHECK-NEXT: ret194entry:195 %vld2 = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2.v4bf16.p0(ptr %ptr)196 %vld2.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld2, 0197 %vld2.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld2, 1198 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x2_t undef, <4 x bfloat> %vld2.fca.0.extract, 0, 0199 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x2_t %.fca.0.0.insert, <4 x bfloat> %vld2.fca.1.extract, 0, 1200 ret %struct.bfloat16x4x2_t %.fca.0.1.insert201}202 203; Function Attrs: argmemonly nounwind readonly204declare { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2.v4bf16.p0(ptr) nounwind205 206define %struct.bfloat16x8x2_t @test_vld2q_bf16(ptr %ptr) local_unnamed_addr nounwind {207; CHECK-LABEL: test_vld2q_bf16:208; CHECK: // %bb.0: // %entry209; CHECK-NEXT: ld2 { v0.8h, v1.8h }, [x0]210; CHECK-NEXT: ret211entry:212 %vld2 = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2.v8bf16.p0(ptr %ptr)213 %vld2.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld2, 0214 %vld2.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld2, 1215 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x2_t undef, <8 x bfloat> %vld2.fca.0.extract, 0, 0216 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x2_t %.fca.0.0.insert, <8 x bfloat> %vld2.fca.1.extract, 0, 1217 ret %struct.bfloat16x8x2_t %.fca.0.1.insert218}219 220; Function Attrs: argmemonly nounwind readonly221declare { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2.v8bf16.p0(ptr) nounwind222define %struct.bfloat16x4x2_t @test_vld2_lane_bf16(ptr %ptr, [2 x <4 x bfloat>] %src.coerce) local_unnamed_addr nounwind {223; CHECK-LABEL: test_vld2_lane_bf16:224; CHECK: // %bb.0: // %entry225; CHECK: ld2 { v0.h, v1.h }[1], [x0]226; CHECK: ret227entry:228 %src.coerce.fca.0.extract = extractvalue [2 x <4 x bfloat>] %src.coerce, 0229 %src.coerce.fca.1.extract = extractvalue [2 x <4 x bfloat>] %src.coerce, 1230 %vld2_lane = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2lane.v4bf16.p0(<4 x bfloat> %src.coerce.fca.0.extract, <4 x bfloat> %src.coerce.fca.1.extract, i64 1, ptr %ptr)231 %vld2_lane.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld2_lane, 0232 %vld2_lane.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld2_lane, 1233 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x2_t undef, <4 x bfloat> %vld2_lane.fca.0.extract, 0, 0234 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x2_t %.fca.0.0.insert, <4 x bfloat> %vld2_lane.fca.1.extract, 0, 1235 ret %struct.bfloat16x4x2_t %.fca.0.1.insert236}237 238; Function Attrs: argmemonly nounwind readonly239declare { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2lane.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, i64, ptr) nounwind240 241define %struct.bfloat16x8x2_t @test_vld2q_lane_bf16(ptr %ptr, [2 x <8 x bfloat>] %src.coerce) local_unnamed_addr nounwind {242; CHECK-LABEL: test_vld2q_lane_bf16:243; CHECK: // %bb.0: // %entry244; CHECK: ld2 { v0.h, v1.h }[7], [x0]245; CHECK: ret246entry:247 %src.coerce.fca.0.extract = extractvalue [2 x <8 x bfloat>] %src.coerce, 0248 %src.coerce.fca.1.extract = extractvalue [2 x <8 x bfloat>] %src.coerce, 1249 %vld2_lane = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0(<8 x bfloat> %src.coerce.fca.0.extract, <8 x bfloat> %src.coerce.fca.1.extract, i64 7, ptr %ptr)250 %vld2_lane.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld2_lane, 0251 %vld2_lane.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld2_lane, 1252 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x2_t undef, <8 x bfloat> %vld2_lane.fca.0.extract, 0, 0253 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x2_t %.fca.0.0.insert, <8 x bfloat> %vld2_lane.fca.1.extract, 0, 1254 ret %struct.bfloat16x8x2_t %.fca.0.1.insert255}256 257; Function Attrs: argmemonly nounwind readonly258declare { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, i64, ptr) nounwind259 260define %struct.bfloat16x4x3_t @test_vld3_bf16(ptr %ptr) local_unnamed_addr nounwind {261; CHECK-LABEL: test_vld3_bf16:262; CHECK: // %bb.0: // %entry263; CHECK-NEXT: ld3 { v0.4h, v1.4h, v2.4h }, [x0]264; CHECK-NEXT: ret265entry:266 %vld3 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3.v4bf16.p0(ptr %ptr)267 %vld3.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3, 0268 %vld3.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3, 1269 %vld3.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3, 2270 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x3_t undef, <4 x bfloat> %vld3.fca.0.extract, 0, 0271 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.0.insert, <4 x bfloat> %vld3.fca.1.extract, 0, 1272 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.1.insert, <4 x bfloat> %vld3.fca.2.extract, 0, 2273 ret %struct.bfloat16x4x3_t %.fca.0.2.insert274}275 276; Function Attrs: argmemonly nounwind readonly277declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3.v4bf16.p0(ptr) nounwind278 279define %struct.bfloat16x8x3_t @test_vld3q_bf16(ptr %ptr) local_unnamed_addr nounwind {280; CHECK-LABEL: test_vld3q_bf16:281; CHECK: // %bb.0: // %entry282; CHECK-NEXT: ld3 { v0.8h, v1.8h, v2.8h }, [x0]283; CHECK-NEXT: ret284entry:285 %vld3 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3.v8bf16.p0(ptr %ptr)286 %vld3.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3, 0287 %vld3.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3, 1288 %vld3.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3, 2289 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x3_t undef, <8 x bfloat> %vld3.fca.0.extract, 0, 0290 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.0.insert, <8 x bfloat> %vld3.fca.1.extract, 0, 1291 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.1.insert, <8 x bfloat> %vld3.fca.2.extract, 0, 2292 ret %struct.bfloat16x8x3_t %.fca.0.2.insert293}294 295; Function Attrs: argmemonly nounwind readonly296declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3.v8bf16.p0(ptr) nounwind297 298define %struct.bfloat16x4x3_t @test_vld3_lane_bf16(ptr %ptr, [3 x <4 x bfloat>] %src.coerce) local_unnamed_addr nounwind {299; CHECK-LABEL: test_vld3_lane_bf16:300; CHECK: // %bb.0: // %entry301; CHECK: ld3 { v0.h, v1.h, v2.h }[1], [x0]302; CHECK: ret303entry:304 %src.coerce.fca.0.extract = extractvalue [3 x <4 x bfloat>] %src.coerce, 0305 %src.coerce.fca.1.extract = extractvalue [3 x <4 x bfloat>] %src.coerce, 1306 %src.coerce.fca.2.extract = extractvalue [3 x <4 x bfloat>] %src.coerce, 2307 %vld3_lane = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3lane.v4bf16.p0(<4 x bfloat> %src.coerce.fca.0.extract, <4 x bfloat> %src.coerce.fca.1.extract, <4 x bfloat> %src.coerce.fca.2.extract, i64 1, ptr %ptr)308 %vld3_lane.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3_lane, 0309 %vld3_lane.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3_lane, 1310 %vld3_lane.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3_lane, 2311 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x3_t undef, <4 x bfloat> %vld3_lane.fca.0.extract, 0, 0312 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.0.insert, <4 x bfloat> %vld3_lane.fca.1.extract, 0, 1313 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.1.insert, <4 x bfloat> %vld3_lane.fca.2.extract, 0, 2314 ret %struct.bfloat16x4x3_t %.fca.0.2.insert315}316 317; Function Attrs: argmemonly nounwind readonly318declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3lane.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, i64, ptr) nounwind319 320define %struct.bfloat16x8x3_t @test_vld3q_lane_bf16(ptr %ptr, [3 x <8 x bfloat>] %src.coerce) local_unnamed_addr nounwind {321; CHECK-LABEL: test_vld3q_lane_bf16:322; CHECK: // %bb.0: // %entry323; CHECKT: ld3 { v0.h, v1.h, v2.h }[7], [x0]324; CHECKT: ret325entry:326 %src.coerce.fca.0.extract = extractvalue [3 x <8 x bfloat>] %src.coerce, 0327 %src.coerce.fca.1.extract = extractvalue [3 x <8 x bfloat>] %src.coerce, 1328 %src.coerce.fca.2.extract = extractvalue [3 x <8 x bfloat>] %src.coerce, 2329 %vld3_lane = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3lane.v8bf16.p0(<8 x bfloat> %src.coerce.fca.0.extract, <8 x bfloat> %src.coerce.fca.1.extract, <8 x bfloat> %src.coerce.fca.2.extract, i64 7, ptr %ptr)330 %vld3_lane.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3_lane, 0331 %vld3_lane.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3_lane, 1332 %vld3_lane.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3_lane, 2333 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x3_t undef, <8 x bfloat> %vld3_lane.fca.0.extract, 0, 0334 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.0.insert, <8 x bfloat> %vld3_lane.fca.1.extract, 0, 1335 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.1.insert, <8 x bfloat> %vld3_lane.fca.2.extract, 0, 2336 ret %struct.bfloat16x8x3_t %.fca.0.2.insert337}338 339; Function Attrs: argmemonly nounwind readonly340declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3lane.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, i64, ptr) nounwind341 342define %struct.bfloat16x4x4_t @test_vld4_bf16(ptr %ptr) local_unnamed_addr nounwind {343; CHECK-LABEL: test_vld4_bf16:344; CHECK: // %bb.0: // %entry345; CHECK-NEXT: ld4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]346; CHECK-NEXT: ret347entry:348 %vld4 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4.v4bf16.p0(ptr %ptr)349 %vld4.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 0350 %vld4.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 1351 %vld4.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 2352 %vld4.fca.3.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 3353 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x4_t undef, <4 x bfloat> %vld4.fca.0.extract, 0, 0354 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.0.insert, <4 x bfloat> %vld4.fca.1.extract, 0, 1355 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.1.insert, <4 x bfloat> %vld4.fca.2.extract, 0, 2356 %.fca.0.3.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.2.insert, <4 x bfloat> %vld4.fca.3.extract, 0, 3357 ret %struct.bfloat16x4x4_t %.fca.0.3.insert358}359 360; Function Attrs: argmemonly nounwind readonly361declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4.v4bf16.p0(ptr) nounwind362 363define %struct.bfloat16x8x4_t @test_vld4q_bf16(ptr %ptr) local_unnamed_addr nounwind {364; CHECK-LABEL: test_vld4q_bf16:365; CHECK: // %bb.0: // %entry366; CHECK-NEXT: ld4 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]367; CHECK-NEXT: ret368entry:369 %vld4 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4.v8bf16.p0(ptr %ptr)370 %vld4.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 0371 %vld4.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 1372 %vld4.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 2373 %vld4.fca.3.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 3374 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x4_t undef, <8 x bfloat> %vld4.fca.0.extract, 0, 0375 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.0.insert, <8 x bfloat> %vld4.fca.1.extract, 0, 1376 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.1.insert, <8 x bfloat> %vld4.fca.2.extract, 0, 2377 %.fca.0.3.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.2.insert, <8 x bfloat> %vld4.fca.3.extract, 0, 3378 ret %struct.bfloat16x8x4_t %.fca.0.3.insert379}380 381; Function Attrs: argmemonly nounwind readonly382declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4.v8bf16.p0(ptr) nounwind383 384define %struct.bfloat16x4x4_t @test_vld4_lane_bf16(ptr %ptr, [4 x <4 x bfloat>] %src.coerce) local_unnamed_addr nounwind {385; CHECK-LABEL: test_vld4_lane_bf16:386; CHECK: // %bb.0: // %entry387; CHECK: ld4 { v0.h, v1.h, v2.h, v3.h }[1], [x0]388; CHECK: ret389entry:390 %src.coerce.fca.0.extract = extractvalue [4 x <4 x bfloat>] %src.coerce, 0391 %src.coerce.fca.1.extract = extractvalue [4 x <4 x bfloat>] %src.coerce, 1392 %src.coerce.fca.2.extract = extractvalue [4 x <4 x bfloat>] %src.coerce, 2393 %src.coerce.fca.3.extract = extractvalue [4 x <4 x bfloat>] %src.coerce, 3394 %vld4_lane = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4lane.v4bf16.p0(<4 x bfloat> %src.coerce.fca.0.extract, <4 x bfloat> %src.coerce.fca.1.extract, <4 x bfloat> %src.coerce.fca.2.extract, <4 x bfloat> %src.coerce.fca.3.extract, i64 1, ptr %ptr)395 %vld4_lane.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4_lane, 0396 %vld4_lane.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4_lane, 1397 %vld4_lane.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4_lane, 2398 %vld4_lane.fca.3.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4_lane, 3399 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x4_t undef, <4 x bfloat> %vld4_lane.fca.0.extract, 0, 0400 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.0.insert, <4 x bfloat> %vld4_lane.fca.1.extract, 0, 1401 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.1.insert, <4 x bfloat> %vld4_lane.fca.2.extract, 0, 2402 %.fca.0.3.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.2.insert, <4 x bfloat> %vld4_lane.fca.3.extract, 0, 3403 ret %struct.bfloat16x4x4_t %.fca.0.3.insert404}405 406; Function Attrs: argmemonly nounwind readonly407declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4lane.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, i64, ptr) nounwind408 409define %struct.bfloat16x8x4_t @test_vld4q_lane_bf16(ptr %ptr, [4 x <8 x bfloat>] %src.coerce) local_unnamed_addr nounwind {410; CHECK-LABEL: test_vld4q_lane_bf16:411; CHECK: // %bb.0: // %entry412; CHECK: ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0]413; CHECK: ret414entry:415 %src.coerce.fca.0.extract = extractvalue [4 x <8 x bfloat>] %src.coerce, 0416 %src.coerce.fca.1.extract = extractvalue [4 x <8 x bfloat>] %src.coerce, 1417 %src.coerce.fca.2.extract = extractvalue [4 x <8 x bfloat>] %src.coerce, 2418 %src.coerce.fca.3.extract = extractvalue [4 x <8 x bfloat>] %src.coerce, 3419 %vld4_lane = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4lane.v8bf16.p0(<8 x bfloat> %src.coerce.fca.0.extract, <8 x bfloat> %src.coerce.fca.1.extract, <8 x bfloat> %src.coerce.fca.2.extract, <8 x bfloat> %src.coerce.fca.3.extract, i64 7, ptr %ptr)420 %vld4_lane.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4_lane, 0421 %vld4_lane.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4_lane, 1422 %vld4_lane.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4_lane, 2423 %vld4_lane.fca.3.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4_lane, 3424 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x4_t undef, <8 x bfloat> %vld4_lane.fca.0.extract, 0, 0425 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.0.insert, <8 x bfloat> %vld4_lane.fca.1.extract, 0, 1426 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.1.insert, <8 x bfloat> %vld4_lane.fca.2.extract, 0, 2427 %.fca.0.3.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.2.insert, <8 x bfloat> %vld4_lane.fca.3.extract, 0, 3428 ret %struct.bfloat16x8x4_t %.fca.0.3.insert429}430 431; Function Attrs: argmemonly nounwind readonly432declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4lane.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, i64, ptr) nounwind433 434define %struct.bfloat16x4x2_t @test_vld2_dup_bf16(ptr %ptr) local_unnamed_addr nounwind {435; CHECK-LABEL: test_vld2_dup_bf16:436; CHECK: // %bb.0: // %entry437; CHECK-NEXT: ld2r { v0.4h, v1.4h }, [x0]438; CHECK-NEXT: ret439entry:440 %vld2 = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2r.v4bf16.p0(ptr %ptr)441 %vld2.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld2, 0442 %vld2.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat> } %vld2, 1443 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x2_t undef, <4 x bfloat> %vld2.fca.0.extract, 0, 0444 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x2_t %.fca.0.0.insert, <4 x bfloat> %vld2.fca.1.extract, 0, 1445 ret %struct.bfloat16x4x2_t %.fca.0.1.insert446}447 448; Function Attrs: argmemonly nounwind readonly449declare { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2r.v4bf16.p0(ptr) nounwind450 451define %struct.bfloat16x8x2_t @test_vld2q_dup_bf16(ptr %ptr) local_unnamed_addr nounwind {452; CHECK-LABEL: test_vld2q_dup_bf16:453; CHECK: // %bb.0: // %entry454; CHECK-NEXT: ld2r { v0.8h, v1.8h }, [x0]455; CHECK-NEXT: ret456entry:457 %vld2 = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2r.v8bf16.p0(ptr %ptr)458 %vld2.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld2, 0459 %vld2.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat> } %vld2, 1460 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x2_t undef, <8 x bfloat> %vld2.fca.0.extract, 0, 0461 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x2_t %.fca.0.0.insert, <8 x bfloat> %vld2.fca.1.extract, 0, 1462 ret %struct.bfloat16x8x2_t %.fca.0.1.insert463}464 465; Function Attrs: argmemonly nounwind readonly466declare { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2r.v8bf16.p0(ptr) nounwind467 468define %struct.bfloat16x4x3_t @test_vld3_dup_bf16(ptr %ptr) local_unnamed_addr nounwind {469; CHECK-LABEL: test_vld3_dup_bf16:470; CHECK: // %bb.0: // %entry471; CHECK-NEXT: ld3r { v0.4h, v1.4h, v2.4h }, [x0]472; CHECK-NEXT: ret473entry:474 %vld3 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3r.v4bf16.p0(ptr %ptr)475 %vld3.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3, 0476 %vld3.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3, 1477 %vld3.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld3, 2478 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x3_t undef, <4 x bfloat> %vld3.fca.0.extract, 0, 0479 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.0.insert, <4 x bfloat> %vld3.fca.1.extract, 0, 1480 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x3_t %.fca.0.1.insert, <4 x bfloat> %vld3.fca.2.extract, 0, 2481 ret %struct.bfloat16x4x3_t %.fca.0.2.insert482}483 484; Function Attrs: argmemonly nounwind readonly485declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3r.v4bf16.p0(ptr) nounwind486 487define %struct.bfloat16x8x3_t @test_vld3q_dup_bf16(ptr %ptr) local_unnamed_addr nounwind {488; CHECK-LABEL: test_vld3q_dup_bf16:489; CHECK: // %bb.0: // %entry490; CHECK-NEXT: ld3r { v0.8h, v1.8h, v2.8h }, [x0]491; CHECK-NEXT: ret492entry:493 %vld3 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3r.v8bf16.p0(ptr %ptr)494 %vld3.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3, 0495 %vld3.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3, 1496 %vld3.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld3, 2497 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x3_t undef, <8 x bfloat> %vld3.fca.0.extract, 0, 0498 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.0.insert, <8 x bfloat> %vld3.fca.1.extract, 0, 1499 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x3_t %.fca.0.1.insert, <8 x bfloat> %vld3.fca.2.extract, 0, 2500 ret %struct.bfloat16x8x3_t %.fca.0.2.insert501}502 503; Function Attrs: argmemonly nounwind readonly504declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3r.v8bf16.p0(ptr) nounwind505 506define %struct.bfloat16x4x4_t @test_vld4_dup_bf16(ptr %ptr) local_unnamed_addr nounwind {507; CHECK-LABEL: test_vld4_dup_bf16:508; CHECK: // %bb.0: // %entry509; CHECK-NEXT: ld4r { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]510; CHECK-NEXT: ret511entry:512 %vld4 = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4r.v4bf16.p0(ptr %ptr)513 %vld4.fca.0.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 0514 %vld4.fca.1.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 1515 %vld4.fca.2.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 2516 %vld4.fca.3.extract = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } %vld4, 3517 %.fca.0.0.insert = insertvalue %struct.bfloat16x4x4_t undef, <4 x bfloat> %vld4.fca.0.extract, 0, 0518 %.fca.0.1.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.0.insert, <4 x bfloat> %vld4.fca.1.extract, 0, 1519 %.fca.0.2.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.1.insert, <4 x bfloat> %vld4.fca.2.extract, 0, 2520 %.fca.0.3.insert = insertvalue %struct.bfloat16x4x4_t %.fca.0.2.insert, <4 x bfloat> %vld4.fca.3.extract, 0, 3521 ret %struct.bfloat16x4x4_t %.fca.0.3.insert522}523 524; Function Attrs: argmemonly nounwind readonly525declare { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4r.v4bf16.p0(ptr) nounwind526 527define %struct.bfloat16x8x4_t @test_vld4q_dup_bf16(ptr %ptr) local_unnamed_addr nounwind {528; CHECK-LABEL: test_vld4q_dup_bf16:529; CHECK: // %bb.0: // %entry530; CHECK-NEXT: ld4r { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]531; CHECK-NEXT: ret532entry:533 %vld4 = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4r.v8bf16.p0(ptr %ptr)534 %vld4.fca.0.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 0535 %vld4.fca.1.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 1536 %vld4.fca.2.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 2537 %vld4.fca.3.extract = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } %vld4, 3538 %.fca.0.0.insert = insertvalue %struct.bfloat16x8x4_t undef, <8 x bfloat> %vld4.fca.0.extract, 0, 0539 %.fca.0.1.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.0.insert, <8 x bfloat> %vld4.fca.1.extract, 0, 1540 %.fca.0.2.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.1.insert, <8 x bfloat> %vld4.fca.2.extract, 0, 2541 %.fca.0.3.insert = insertvalue %struct.bfloat16x8x4_t %.fca.0.2.insert, <8 x bfloat> %vld4.fca.3.extract, 0, 3542 ret %struct.bfloat16x8x4_t %.fca.0.3.insert543}544 545; Function Attrs: argmemonly nounwind readonly546declare { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4r.v8bf16.p0(ptr) nounwind547 548define void @test_vst1_bf16(ptr nocapture %ptr, <4 x bfloat> %val) local_unnamed_addr nounwind {549; CHECK-LABEL: test_vst1_bf16:550; CHECK: // %bb.0: // %entry551; CHECK-NEXT: str d0, [x0]552; CHECK-NEXT: ret553entry:554 store <4 x bfloat> %val, ptr %ptr, align 8555 ret void556}557 558define void @test_vst1q_bf16(ptr nocapture %ptr, <8 x bfloat> %val) local_unnamed_addr nounwind {559; CHECK-LABEL: test_vst1q_bf16:560; CHECK: // %bb.0: // %entry561; CHECK-NEXT: str q0, [x0]562; CHECK-NEXT: ret563entry:564 store <8 x bfloat> %val, ptr %ptr, align 16565 ret void566}567 568define void @test_vst1_lane_bf16(ptr nocapture %ptr, <4 x bfloat> %val) local_unnamed_addr nounwind {569; CHECK-LABEL: test_vst1_lane_bf16:570; CHECK: // %bb.0: // %entry571; CHECK: st1 { v0.h }[1], [x0]572; CHECK: ret573entry:574 %0 = extractelement <4 x bfloat> %val, i32 1575 store bfloat %0, ptr %ptr, align 2576 ret void577}578 579define void @test_vst1q_lane_bf16(ptr nocapture %ptr, <8 x bfloat> %val) local_unnamed_addr nounwind {580; CHECK-LABEL: test_vst1q_lane_bf16:581; CHECK: // %bb.0: // %entry582; CHECK-NEXT: st1 { v0.h }[7], [x0]583; CHECK-NEXT: ret584entry:585 %0 = extractelement <8 x bfloat> %val, i32 7586 store bfloat %0, ptr %ptr, align 2587 ret void588}589 590define void @test_vst1_bf16_x2(ptr nocapture %ptr, [2 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {591; CHECK-LABEL: test_vst1_bf16_x2:592; CHECK: // %bb.0: // %entry593; CHECK: st1 { v0.4h, v1.4h }, [x0]594; CHECK: ret595entry:596 %val.coerce.fca.0.extract = extractvalue [2 x <4 x bfloat>] %val.coerce, 0597 %val.coerce.fca.1.extract = extractvalue [2 x <4 x bfloat>] %val.coerce, 1598 tail call void @llvm.aarch64.neon.st1x2.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, ptr %ptr)599 ret void600}601 602; Function Attrs: argmemonly nounwind603declare void @llvm.aarch64.neon.st1x2.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, ptr nocapture) nounwind604 605define void @test_vst1q_bf16_x2(ptr nocapture %ptr, [2 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {606; CHECK-LABEL: test_vst1q_bf16_x2:607; CHECK: // %bb.0: // %entry608; CHECK: st1 { v0.8h, v1.8h }, [x0]609; CHECK: ret610entry:611 %val.coerce.fca.0.extract = extractvalue [2 x <8 x bfloat>] %val.coerce, 0612 %val.coerce.fca.1.extract = extractvalue [2 x <8 x bfloat>] %val.coerce, 1613 tail call void @llvm.aarch64.neon.st1x2.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, ptr %ptr)614 ret void615}616 617; Function Attrs: argmemonly nounwind618declare void @llvm.aarch64.neon.st1x2.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, ptr nocapture) nounwind619 620define void @test_vst1_bf16_x3(ptr nocapture %ptr, [3 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {621; CHECK-LABEL: test_vst1_bf16_x3:622; CHECK: // %bb.0: // %entry623; CHECK: st1 { v0.4h, v1.4h, v2.4h }, [x0]624; CHECK: ret625entry:626 %val.coerce.fca.0.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 0627 %val.coerce.fca.1.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 1628 %val.coerce.fca.2.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 2629 tail call void @llvm.aarch64.neon.st1x3.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, ptr %ptr)630 ret void631}632 633; Function Attrs: argmemonly nounwind634declare void @llvm.aarch64.neon.st1x3.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, ptr nocapture) nounwind635 636define void @test_vst1q_bf16_x3(ptr nocapture %ptr, [3 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {637; CHECK-LABEL: test_vst1q_bf16_x3:638; CHECK: // %bb.0: // %entry639; CHECK: st1 { v0.8h, v1.8h, v2.8h }, [x0]640; CHECK: ret641entry:642 %val.coerce.fca.0.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 0643 %val.coerce.fca.1.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 1644 %val.coerce.fca.2.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 2645 tail call void @llvm.aarch64.neon.st1x3.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, ptr %ptr)646 ret void647}648 649; Function Attrs: argmemonly nounwind650declare void @llvm.aarch64.neon.st1x3.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, ptr nocapture) nounwind651 652; Function Attrs: nounwind653define void @test_vst1_bf16_x4(ptr nocapture %ptr, [4 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {654; CHECK-LABEL: test_vst1_bf16_x4:655; CHECK: // %bb.0: // %entry656; CHECK: st1 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]657; CHECK: ret658entry:659 %val.coerce.fca.0.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 0660 %val.coerce.fca.1.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 1661 %val.coerce.fca.2.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 2662 %val.coerce.fca.3.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 3663 tail call void @llvm.aarch64.neon.st1x4.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, <4 x bfloat> %val.coerce.fca.3.extract, ptr %ptr)664 ret void665}666 667; Function Attrs: argmemonly nounwind668declare void @llvm.aarch64.neon.st1x4.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, ptr nocapture) nounwind669 670define void @test_vst1q_bf16_x4(ptr nocapture %ptr, [4 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {671; CHECK-LABEL: test_vst1q_bf16_x4:672; CHECK: // %bb.0: // %entry673; CHECK: st1 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]674; CHECK: ret675entry:676 %val.coerce.fca.0.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 0677 %val.coerce.fca.1.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 1678 %val.coerce.fca.2.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 2679 %val.coerce.fca.3.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 3680 tail call void @llvm.aarch64.neon.st1x4.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, <8 x bfloat> %val.coerce.fca.3.extract, ptr %ptr)681 ret void682}683 684; Function Attrs: argmemonly nounwind685declare void @llvm.aarch64.neon.st1x4.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, ptr nocapture) nounwind686 687define void @test_vst2_bf16(ptr nocapture %ptr, [2 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {688; CHECK-LABEL: test_vst2_bf16:689; CHECK: // %bb.0: // %entry690; CHECK: st2 { v0.4h, v1.4h }, [x0]691; CHECK: ret692entry:693 %val.coerce.fca.0.extract = extractvalue [2 x <4 x bfloat>] %val.coerce, 0694 %val.coerce.fca.1.extract = extractvalue [2 x <4 x bfloat>] %val.coerce, 1695 tail call void @llvm.aarch64.neon.st2.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, ptr %ptr)696 ret void697}698 699; Function Attrs: argmemonly nounwind700declare void @llvm.aarch64.neon.st2.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, ptr nocapture) nounwind701 702define void @test_vst2q_bf16(ptr nocapture %ptr, [2 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {703; CHECK-LABEL: test_vst2q_bf16:704; CHECK: // %bb.0: // %entry705; CHECK: st2 { v0.8h, v1.8h }, [x0]706; CHECK: ret707entry:708 %val.coerce.fca.0.extract = extractvalue [2 x <8 x bfloat>] %val.coerce, 0709 %val.coerce.fca.1.extract = extractvalue [2 x <8 x bfloat>] %val.coerce, 1710 tail call void @llvm.aarch64.neon.st2.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, ptr %ptr)711 ret void712}713 714; Function Attrs: argmemonly nounwind715declare void @llvm.aarch64.neon.st2.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, ptr nocapture) nounwind716 717define void @test_vst2_lane_bf16(ptr nocapture %ptr, [2 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {718; CHECK-LABEL: test_vst2_lane_bf16:719; CHECK: // %bb.0: // %entry720; CHECK: st2 { v0.h, v1.h }[1], [x0]721; CHECK: ret722entry:723 %val.coerce.fca.0.extract = extractvalue [2 x <4 x bfloat>] %val.coerce, 0724 %val.coerce.fca.1.extract = extractvalue [2 x <4 x bfloat>] %val.coerce, 1725 tail call void @llvm.aarch64.neon.st2lane.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, i64 1, ptr %ptr)726 ret void727}728 729; Function Attrs: argmemonly nounwind730declare void @llvm.aarch64.neon.st2lane.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, i64, ptr nocapture) nounwind731 732; Function Attrs: nounwind733define void @test_vst2q_lane_bf16(ptr nocapture %ptr, [2 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {734; CHECK-LABEL: test_vst2q_lane_bf16:735; CHECK: // %bb.0: // %entry736; CHECK: st2 { v0.h, v1.h }[7], [x0]737; CHECK: ret738entry:739 %val.coerce.fca.0.extract = extractvalue [2 x <8 x bfloat>] %val.coerce, 0740 %val.coerce.fca.1.extract = extractvalue [2 x <8 x bfloat>] %val.coerce, 1741 tail call void @llvm.aarch64.neon.st2lane.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, i64 7, ptr %ptr)742 ret void743}744 745; Function Attrs: argmemonly nounwind746declare void @llvm.aarch64.neon.st2lane.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, i64, ptr nocapture) nounwind747 748; Function Attrs: nounwind749define void @test_vst3_bf16(ptr nocapture %ptr, [3 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {750; CHECK-LABEL: test_vst3_bf16:751; CHECK: // %bb.0: // %entry752; CHECK: st3 { v0.4h, v1.4h, v2.4h }, [x0]753; CHECK: ret754entry:755 %val.coerce.fca.0.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 0756 %val.coerce.fca.1.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 1757 %val.coerce.fca.2.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 2758 tail call void @llvm.aarch64.neon.st3.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, ptr %ptr)759 ret void760}761 762; Function Attrs: argmemonly nounwind763declare void @llvm.aarch64.neon.st3.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, ptr nocapture) nounwind764 765; Function Attrs: nounwind766define void @test_vst3q_bf16(ptr nocapture %ptr, [3 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {767; CHECK-LABEL: test_vst3q_bf16:768; CHECK: // %bb.0: // %entry769; CHECK: st3 { v0.8h, v1.8h, v2.8h }, [x0]770; CHECK: ret771entry:772 %val.coerce.fca.0.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 0773 %val.coerce.fca.1.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 1774 %val.coerce.fca.2.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 2775 tail call void @llvm.aarch64.neon.st3.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, ptr %ptr)776 ret void777}778 779; Function Attrs: argmemonly nounwind780declare void @llvm.aarch64.neon.st3.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, ptr nocapture) nounwind781 782; Function Attrs: nounwind783define void @test_vst3_lane_bf16(ptr nocapture %ptr, [3 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {784; CHECK-LABEL: test_vst3_lane_bf16:785; CHECK: // %bb.0: // %entry786; CHECK: st3 { v0.h, v1.h, v2.h }[1], [x0]787; CHECK: ret788entry:789 %val.coerce.fca.0.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 0790 %val.coerce.fca.1.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 1791 %val.coerce.fca.2.extract = extractvalue [3 x <4 x bfloat>] %val.coerce, 2792 tail call void @llvm.aarch64.neon.st3lane.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, i64 1, ptr %ptr)793 ret void794}795 796; Function Attrs: argmemonly nounwind797declare void @llvm.aarch64.neon.st3lane.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, i64, ptr nocapture) nounwind798 799; Function Attrs: nounwind800define void @test_vst3q_lane_bf16(ptr nocapture %ptr, [3 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {801; CHECK-LABEL: test_vst3q_lane_bf16:802; CHECK: // %bb.0: // %entry803; CHECK: st3 { v0.h, v1.h, v2.h }[7], [x0]804; CHECK: ret805entry:806 %val.coerce.fca.0.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 0807 %val.coerce.fca.1.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 1808 %val.coerce.fca.2.extract = extractvalue [3 x <8 x bfloat>] %val.coerce, 2809 tail call void @llvm.aarch64.neon.st3lane.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, i64 7, ptr %ptr)810 ret void811}812 813; Function Attrs: argmemonly nounwind814declare void @llvm.aarch64.neon.st3lane.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, i64, ptr nocapture) nounwind815 816; Function Attrs: nounwind817define void @test_vst4_bf16(ptr nocapture %ptr, [4 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {818; CHECK-LABEL: test_vst4_bf16:819; CHECK: // %bb.0: // %entry820; CHECK: st4 { v0.4h, v1.4h, v2.4h, v3.4h }, [x0]821; CHECK: ret822entry:823 %val.coerce.fca.0.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 0824 %val.coerce.fca.1.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 1825 %val.coerce.fca.2.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 2826 %val.coerce.fca.3.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 3827 tail call void @llvm.aarch64.neon.st4.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, <4 x bfloat> %val.coerce.fca.3.extract, ptr %ptr)828 ret void829}830 831; Function Attrs: argmemonly nounwind832declare void @llvm.aarch64.neon.st4.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, ptr nocapture) nounwind833 834; Function Attrs: nounwind835define void @test_vst4q_bf16(ptr nocapture %ptr, [4 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {836; CHECK-LABEL: test_vst4q_bf16:837; CHECK: // %bb.0: // %entry838; CHECK: st4 { v0.8h, v1.8h, v2.8h, v3.8h }, [x0]839; CHECK: ret840entry:841 %val.coerce.fca.0.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 0842 %val.coerce.fca.1.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 1843 %val.coerce.fca.2.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 2844 %val.coerce.fca.3.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 3845 tail call void @llvm.aarch64.neon.st4.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, <8 x bfloat> %val.coerce.fca.3.extract, ptr %ptr)846 ret void847}848 849; Function Attrs: argmemonly nounwind850declare void @llvm.aarch64.neon.st4.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, ptr nocapture) nounwind851 852; Function Attrs: nounwind853define void @test_vst4_lane_bf16(ptr nocapture %ptr, [4 x <4 x bfloat>] %val.coerce) local_unnamed_addr nounwind {854; CHECK-LABEL: test_vst4_lane_bf16:855; CHECK: // %bb.0: // %entry856; CHECK: st4 { v0.h, v1.h, v2.h, v3.h }[1], [x0]857; CHECK: ret858entry:859 %val.coerce.fca.0.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 0860 %val.coerce.fca.1.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 1861 %val.coerce.fca.2.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 2862 %val.coerce.fca.3.extract = extractvalue [4 x <4 x bfloat>] %val.coerce, 3863 tail call void @llvm.aarch64.neon.st4lane.v4bf16.p0(<4 x bfloat> %val.coerce.fca.0.extract, <4 x bfloat> %val.coerce.fca.1.extract, <4 x bfloat> %val.coerce.fca.2.extract, <4 x bfloat> %val.coerce.fca.3.extract, i64 1, ptr %ptr)864 ret void865}866 867; Function Attrs: argmemonly nounwind868declare void @llvm.aarch64.neon.st4lane.v4bf16.p0(<4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, i64, ptr nocapture) nounwind869 870; Function Attrs: nounwind871define void @test_vst4q_lane_bf16(ptr nocapture %ptr, [4 x <8 x bfloat>] %val.coerce) local_unnamed_addr nounwind {872; CHECK-LABEL: test_vst4q_lane_bf16:873; CHECK: // %bb.0: // %entry874; CHECK: st4 { v0.h, v1.h, v2.h, v3.h }[7], [x0]875; CHECK: ret876entry:877 %val.coerce.fca.0.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 0878 %val.coerce.fca.1.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 1879 %val.coerce.fca.2.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 2880 %val.coerce.fca.3.extract = extractvalue [4 x <8 x bfloat>] %val.coerce, 3881 tail call void @llvm.aarch64.neon.st4lane.v8bf16.p0(<8 x bfloat> %val.coerce.fca.0.extract, <8 x bfloat> %val.coerce.fca.1.extract, <8 x bfloat> %val.coerce.fca.2.extract, <8 x bfloat> %val.coerce.fca.3.extract, i64 7, ptr %ptr)882 ret void883}884 885; Function Attrs: argmemonly nounwind886declare void @llvm.aarch64.neon.st4lane.v8bf16.p0(<8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, i64, ptr nocapture) nounwind887 888 889