198 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-unknown-linux-gnu -global-isel < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; BIF Bitwise Insert if False6;7; 8-bit vectors tests8 9define <1 x i8> @test_bitf_v1i8(<1 x i8> %A, <1 x i8> %B, <1 x i8> %C) {10; CHECK-SD-LABEL: test_bitf_v1i8:11; CHECK-SD: // %bb.0:12; CHECK-SD-NEXT: bif v0.8b, v1.8b, v2.8b13; CHECK-SD-NEXT: ret14;15; CHECK-GI-LABEL: test_bitf_v1i8:16; CHECK-GI: // %bb.0:17; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q018; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q119; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q220; CHECK-GI-NEXT: umov w8, v2.b[0]21; CHECK-GI-NEXT: umov w9, v1.b[0]22; CHECK-GI-NEXT: umov w10, v0.b[0]23; CHECK-GI-NEXT: bic w9, w9, w824; CHECK-GI-NEXT: and w8, w8, w1025; CHECK-GI-NEXT: orr w8, w9, w826; CHECK-GI-NEXT: fmov s0, w827; CHECK-GI-NEXT: ret28 %neg = xor <1 x i8> %C, <i8 -1>29 %and = and <1 x i8> %neg, %B30 %and1 = and <1 x i8> %C, %A31 %or = or <1 x i8> %and, %and132 ret <1 x i8> %or33}34 35; 16-bit vectors tests36 37define <1 x i16> @test_bitf_v1i16(<1 x i16> %A, <1 x i16> %B, <1 x i16> %C) {38; CHECK-SD-LABEL: test_bitf_v1i16:39; CHECK-SD: // %bb.0:40; CHECK-SD-NEXT: bif v0.8b, v1.8b, v2.8b41; CHECK-SD-NEXT: ret42;43; CHECK-GI-LABEL: test_bitf_v1i16:44; CHECK-GI: // %bb.0:45; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q046; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q147; CHECK-GI-NEXT: // kill: def $d2 killed $d2 def $q248; CHECK-GI-NEXT: umov w8, v2.h[0]49; CHECK-GI-NEXT: umov w9, v1.h[0]50; CHECK-GI-NEXT: umov w10, v0.h[0]51; CHECK-GI-NEXT: bic w9, w9, w852; CHECK-GI-NEXT: and w8, w8, w1053; CHECK-GI-NEXT: orr w8, w9, w854; CHECK-GI-NEXT: fmov s0, w855; CHECK-GI-NEXT: ret56 %neg = xor <1 x i16> %C, <i16 -1>57 %and = and <1 x i16> %neg, %B58 %and1 = and <1 x i16> %C, %A59 %or = or <1 x i16> %and, %and160 ret <1 x i16> %or61}62 63; 32-bit vectors tests64 65define <1 x i32> @test_bitf_v1i32(<1 x i32> %A, <1 x i32> %B, <1 x i32> %C) {66; CHECK-SD-LABEL: test_bitf_v1i32:67; CHECK-SD: // %bb.0:68; CHECK-SD-NEXT: bif v0.8b, v1.8b, v2.8b69; CHECK-SD-NEXT: ret70;71; CHECK-GI-LABEL: test_bitf_v1i32:72; CHECK-GI: // %bb.0:73; CHECK-GI-NEXT: fmov w8, s274; CHECK-GI-NEXT: fmov w9, s175; CHECK-GI-NEXT: fmov w10, s076; CHECK-GI-NEXT: bic w9, w9, w877; CHECK-GI-NEXT: and w8, w8, w1078; CHECK-GI-NEXT: orr w8, w9, w879; CHECK-GI-NEXT: fmov s0, w880; CHECK-GI-NEXT: ret81 %neg = xor <1 x i32> %C, <i32 -1>82 %and = and <1 x i32> %neg, %B83 %and1 = and <1 x i32> %C, %A84 %or = or <1 x i32> %and, %and185 ret <1 x i32> %or86}87 88; 64-bit vectors tests89 90define <1 x i64> @test_bitf_v1i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C) {91; CHECK-SD-LABEL: test_bitf_v1i64:92; CHECK-SD: // %bb.0:93; CHECK-SD-NEXT: bif v0.8b, v1.8b, v2.8b94; CHECK-SD-NEXT: ret95;96; CHECK-GI-LABEL: test_bitf_v1i64:97; CHECK-GI: // %bb.0:98; CHECK-GI-NEXT: fmov x8, d299; CHECK-GI-NEXT: fmov x9, d1100; CHECK-GI-NEXT: fmov x10, d0101; CHECK-GI-NEXT: bic x9, x9, x8102; CHECK-GI-NEXT: and x8, x8, x10103; CHECK-GI-NEXT: orr x8, x9, x8104; CHECK-GI-NEXT: fmov d0, x8105; CHECK-GI-NEXT: ret106 %neg = xor <1 x i64> %C, <i64 -1>107 %and = and <1 x i64> %neg, %B108 %and1 = and <1 x i64> %C, %A109 %or = or <1 x i64> %and, %and1110 ret <1 x i64> %or111}112 113define <2 x i32> @test_bitf_v2i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C) {114; CHECK-LABEL: test_bitf_v2i32:115; CHECK: // %bb.0:116; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b117; CHECK-NEXT: ret118 %neg = xor <2 x i32> %C, <i32 -1, i32 -1>119 %and = and <2 x i32> %neg, %B120 %and1 = and <2 x i32> %C, %A121 %or = or <2 x i32> %and, %and1122 ret <2 x i32> %or123}124 125define <4 x i16> @test_bitf_v4i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C) {126; CHECK-LABEL: test_bitf_v4i16:127; CHECK: // %bb.0:128; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b129; CHECK-NEXT: ret130 %neg = xor <4 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1>131 %and = and <4 x i16> %neg, %B132 %and1 = and <4 x i16> %C, %A133 %or = or <4 x i16> %and, %and1134 ret <4 x i16> %or135}136 137define <8 x i8> @test_bitf_v8i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C) {138; CHECK-LABEL: test_bitf_v8i8:139; CHECK: // %bb.0:140; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b141; CHECK-NEXT: ret142 %neg = xor <8 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>143 %and = and <8 x i8> %neg, %B144 %and1 = and <8 x i8> %C, %A145 %or = or <8 x i8> %and, %and1146 ret <8 x i8> %or147}148 149; 128-bit vectors tests150 151define <2 x i64> @test_bitf_v2i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C) {152; CHECK-LABEL: test_bitf_v2i64:153; CHECK: // %bb.0:154; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b155; CHECK-NEXT: ret156 %neg = xor <2 x i64> %C, <i64 -1, i64 -1>157 %and = and <2 x i64> %neg, %B158 %and1 = and <2 x i64> %C, %A159 %or = or <2 x i64> %and, %and1160 ret <2 x i64> %or161}162 163define <4 x i32> @test_bitf_v4i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {164; CHECK-LABEL: test_bitf_v4i32:165; CHECK: // %bb.0:166; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b167; CHECK-NEXT: ret168 %neg = xor <4 x i32> %C, <i32 -1, i32 -1, i32 -1, i32 -1>169 %and = and <4 x i32> %neg, %B170 %and1 = and <4 x i32> %C, %A171 %or = or <4 x i32> %and, %and1172 ret <4 x i32> %or173}174 175define <8 x i16> @test_bitf_v8i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C) {176; CHECK-LABEL: test_bitf_v8i16:177; CHECK: // %bb.0:178; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b179; CHECK-NEXT: ret180 %neg = xor <8 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>181 %and = and <8 x i16> %neg, %B182 %and1 = and <8 x i16> %C, %A183 %or = or <8 x i16> %and, %and1184 ret <8 x i16> %or185}186 187define <16 x i8> @test_bitf_v16i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) {188; CHECK-LABEL: test_bitf_v16i8:189; CHECK: // %bb.0:190; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b191; CHECK-NEXT: ret192 %neg = xor <16 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>193 %and = and <16 x i8> %neg, %B194 %and1 = and <16 x i8> %C, %A195 %or = or <16 x i8> %and, %and1196 ret <16 x i8> %or197}198