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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=aarch64-linux | FileCheck %s3 4define i8 @andnot_add_with_neg_i8(i8 %a0, i8 %a1) {5; CHECK-LABEL: andnot_add_with_neg_i8:6; CHECK: // %bb.0:7; CHECK-NEXT: sub w8, w0, w18; CHECK-NEXT: bic w0, w0, w89; CHECK-NEXT: ret10 %not = xor i8 %a0, -111 %sum = add i8 %not, %a112 %and = and i8 %sum, %a013 ret i8 %and14}15 16define i8 @andnot_sub_with_neg_i8(i8 %a0, i8 %a1) {17; CHECK-LABEL: andnot_sub_with_neg_i8:18; CHECK: // %bb.0:19; CHECK-NEXT: add w8, w0, w120; CHECK-NEXT: bic w0, w0, w821; CHECK-NEXT: ret22 %not = xor i8 %a0, -123 %diff = sub i8 %not, %a124 %and = and i8 %diff, %a025 ret i8 %and26}27 28define i16 @andnot_add_with_neg_i16(i16 %a0, i16 %a1) {29; CHECK-LABEL: andnot_add_with_neg_i16:30; CHECK: // %bb.0:31; CHECK-NEXT: sub w8, w0, w132; CHECK-NEXT: bic w0, w0, w833; CHECK-NEXT: ret34 %not = xor i16 %a0, -135 %sum = add i16 %not, %a136 %and = and i16 %sum, %a037 ret i16 %and38}39 40define i16 @andnot_sub_with_neg_i16(i16 %a0, i16 %a1) {41; CHECK-LABEL: andnot_sub_with_neg_i16:42; CHECK: // %bb.0:43; CHECK-NEXT: add w8, w0, w144; CHECK-NEXT: bic w0, w0, w845; CHECK-NEXT: ret46 %not = xor i16 %a0, -147 %diff = sub i16 %not, %a148 %and = and i16 %diff, %a049 ret i16 %and50}51 52define i32 @andnot_add_with_neg_i32(i32 %a0, i32 %a1) {53; CHECK-LABEL: andnot_add_with_neg_i32:54; CHECK: // %bb.0:55; CHECK-NEXT: sub w8, w0, w156; CHECK-NEXT: bic w0, w0, w857; CHECK-NEXT: ret58 %not = xor i32 %a0, -159 %sum = add i32 %not, %a160 %and = and i32 %sum, %a061 ret i32 %and62}63 64define i32 @andnot_sub_with_neg_i32(i32 %a0, i32 %a1) {65; CHECK-LABEL: andnot_sub_with_neg_i32:66; CHECK: // %bb.0:67; CHECK-NEXT: add w8, w0, w168; CHECK-NEXT: bic w0, w0, w869; CHECK-NEXT: ret70 %not = xor i32 %a0, -171 %diff = sub i32 %not, %a172 %and = and i32 %diff, %a073 ret i32 %and74}75 76define i64 @andnot_add_with_neg_i64(i64 %a0, i64 %a1) {77; CHECK-LABEL: andnot_add_with_neg_i64:78; CHECK: // %bb.0:79; CHECK-NEXT: sub x8, x0, x180; CHECK-NEXT: bic x0, x0, x881; CHECK-NEXT: ret82 %not = xor i64 %a0, -183 %sum = add i64 %not, %a184 %and = and i64 %sum, %a085 ret i64 %and86}87 88define i64 @andnot_sub_with_neg_i64(i64 %a0, i64 %a1) {89; CHECK-LABEL: andnot_sub_with_neg_i64:90; CHECK: // %bb.0:91; CHECK-NEXT: add x8, x0, x192; CHECK-NEXT: bic x0, x0, x893; CHECK-NEXT: ret94 %not = xor i64 %a0, -195 %diff = sub i64 %not, %a196 %and = and i64 %diff, %a097 ret i64 %and98}99 100define i32 @and_not_select_eq(i32 %a, i32 %b, i32 %c) {101; CHECK-LABEL: and_not_select_eq:102; CHECK: // %bb.0:103; CHECK-NEXT: bics wzr, w1, w0104; CHECK-NEXT: csel w0, w0, w2, eq105; CHECK-NEXT: ret106 %or = or i32 %b, %a107 %cmp = icmp eq i32 %or, %a108 %a.c = select i1 %cmp, i32 %a, i32 %c109 ret i32 %a.c110}111 112define i32 @and_not_select_ne(i32 %a, i32 %b, i32 %c) {113; CHECK-LABEL: and_not_select_ne:114; CHECK: // %bb.0:115; CHECK-NEXT: bics wzr, w1, w0116; CHECK-NEXT: csel w0, w0, w2, ne117; CHECK-NEXT: ret118 %or = or i32 %b, %a119 %cmp = icmp ne i32 %or, %a120 %a.c = select i1 %cmp, i32 %a, i32 %c121 ret i32 %a.c122}123 124define i32 @and_not_select_eq_swap(i32 %a, i32 %b, i32 %c) {125; CHECK-LABEL: and_not_select_eq_swap:126; CHECK: // %bb.0:127; CHECK-NEXT: bics wzr, w1, w0128; CHECK-NEXT: csel w0, w0, w2, eq129; CHECK-NEXT: ret130 %or = or i32 %b, %a131 %cmp = icmp eq i32 %a, %or132 %a.c = select i1 %cmp, i32 %a, i32 %c133 ret i32 %a.c134}135 136define i32 @and_not_select_ne_swap(i32 %a, i32 %b, i32 %c) {137; CHECK-LABEL: and_not_select_ne_swap:138; CHECK: // %bb.0:139; CHECK-NEXT: bics wzr, w1, w0140; CHECK-NEXT: csel w0, w0, w2, ne141; CHECK-NEXT: ret142 %or = or i32 %a, %b143 %cmp = icmp ne i32 %a, %or144 %a.c = select i1 %cmp, i32 %a, i32 %c145 ret i32 %a.c146}147