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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple aarch64-none-linux-gnu | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple aarch64-none-linux-gnu -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; Supported combines6 7define <8 x i16> @dupsext_v8i8_v8i16(i8 %src, <8 x i8> %b) {8; CHECK-SD-LABEL: dupsext_v8i8_v8i16:9; CHECK-SD: // %bb.0: // %entry10; CHECK-SD-NEXT: dup v1.8b, w011; CHECK-SD-NEXT: smull v0.8h, v1.8b, v0.8b12; CHECK-SD-NEXT: ret13;14; CHECK-GI-LABEL: dupsext_v8i8_v8i16:15; CHECK-GI: // %bb.0: // %entry16; CHECK-GI-NEXT: lsl w8, w0, #817; CHECK-GI-NEXT: sbfx w8, w8, #8, #818; CHECK-GI-NEXT: dup v1.8h, w819; CHECK-GI-NEXT: xtn v1.8b, v1.8h20; CHECK-GI-NEXT: smull v0.8h, v1.8b, v0.8b21; CHECK-GI-NEXT: ret22entry:23 %in = sext i8 %src to i1624 %ext.b = sext <8 x i8> %b to <8 x i16>25 %broadcast.splatinsert = insertelement <8 x i16> undef, i16 %in, i16 026 %broadcast.splat = shufflevector <8 x i16> %broadcast.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer27 %out = mul nsw <8 x i16> %broadcast.splat, %ext.b28 ret <8 x i16> %out29}30 31define <8 x i16> @dupzext_v8i8_v8i16(i8 %src, <8 x i8> %b) {32; CHECK-SD-LABEL: dupzext_v8i8_v8i16:33; CHECK-SD: // %bb.0: // %entry34; CHECK-SD-NEXT: dup v1.8b, w035; CHECK-SD-NEXT: umull v0.8h, v1.8b, v0.8b36; CHECK-SD-NEXT: ret37;38; CHECK-GI-LABEL: dupzext_v8i8_v8i16:39; CHECK-GI: // %bb.0: // %entry40; CHECK-GI-NEXT: and w8, w0, #0xff41; CHECK-GI-NEXT: dup v1.8h, w842; CHECK-GI-NEXT: xtn v1.8b, v1.8h43; CHECK-GI-NEXT: umull v0.8h, v1.8b, v0.8b44; CHECK-GI-NEXT: ret45entry:46 %in = zext i8 %src to i1647 %ext.b = zext <8 x i8> %b to <8 x i16>48 %broadcast.splatinsert = insertelement <8 x i16> undef, i16 %in, i16 049 %broadcast.splat = shufflevector <8 x i16> %broadcast.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer50 %out = mul nuw <8 x i16> %broadcast.splat, %ext.b51 ret <8 x i16> %out52}53 54define <4 x i32> @dupsext_v4i16_v4i32(i16 %src, <4 x i16> %b) {55; CHECK-SD-LABEL: dupsext_v4i16_v4i32:56; CHECK-SD: // %bb.0: // %entry57; CHECK-SD-NEXT: dup v1.4h, w058; CHECK-SD-NEXT: smull v0.4s, v1.4h, v0.4h59; CHECK-SD-NEXT: ret60;61; CHECK-GI-LABEL: dupsext_v4i16_v4i32:62; CHECK-GI: // %bb.0: // %entry63; CHECK-GI-NEXT: sxth w8, w064; CHECK-GI-NEXT: dup v1.4s, w865; CHECK-GI-NEXT: xtn v1.4h, v1.4s66; CHECK-GI-NEXT: smull v0.4s, v1.4h, v0.4h67; CHECK-GI-NEXT: ret68entry:69 %in = sext i16 %src to i3270 %ext.b = sext <4 x i16> %b to <4 x i32>71 %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %in, i32 072 %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer73 %out = mul nsw <4 x i32> %broadcast.splat, %ext.b74 ret <4 x i32> %out75}76 77define <4 x i32> @dupzext_v4i16_v4i32(i16 %src, <4 x i16> %b) {78; CHECK-SD-LABEL: dupzext_v4i16_v4i32:79; CHECK-SD: // %bb.0: // %entry80; CHECK-SD-NEXT: dup v1.4h, w081; CHECK-SD-NEXT: umull v0.4s, v1.4h, v0.4h82; CHECK-SD-NEXT: ret83;84; CHECK-GI-LABEL: dupzext_v4i16_v4i32:85; CHECK-GI: // %bb.0: // %entry86; CHECK-GI-NEXT: and w8, w0, #0xffff87; CHECK-GI-NEXT: dup v1.4s, w888; CHECK-GI-NEXT: xtn v1.4h, v1.4s89; CHECK-GI-NEXT: umull v0.4s, v1.4h, v0.4h90; CHECK-GI-NEXT: ret91entry:92 %in = zext i16 %src to i3293 %ext.b = zext <4 x i16> %b to <4 x i32>94 %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %in, i32 095 %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer96 %out = mul nuw <4 x i32> %broadcast.splat, %ext.b97 ret <4 x i32> %out98}99 100define <2 x i64> @dupsext_v2i32_v2i64(i32 %src, <2 x i32> %b) {101; CHECK-SD-LABEL: dupsext_v2i32_v2i64:102; CHECK-SD: // %bb.0: // %entry103; CHECK-SD-NEXT: dup v1.2s, w0104; CHECK-SD-NEXT: smull v0.2d, v1.2s, v0.2s105; CHECK-SD-NEXT: ret106;107; CHECK-GI-LABEL: dupsext_v2i32_v2i64:108; CHECK-GI: // %bb.0: // %entry109; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0110; CHECK-GI-NEXT: sxtw x8, w0111; CHECK-GI-NEXT: dup v1.2d, x8112; CHECK-GI-NEXT: xtn v1.2s, v1.2d113; CHECK-GI-NEXT: smull v0.2d, v1.2s, v0.2s114; CHECK-GI-NEXT: ret115entry:116 %in = sext i32 %src to i64117 %ext.b = sext <2 x i32> %b to <2 x i64>118 %broadcast.splatinsert = insertelement <2 x i64> undef, i64 %in, i64 0119 %broadcast.splat = shufflevector <2 x i64> %broadcast.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer120 %out = mul nsw <2 x i64> %broadcast.splat, %ext.b121 ret <2 x i64> %out122}123 124define <2 x i64> @dupzext_v2i32_v2i64(i32 %src, <2 x i32> %b) {125; CHECK-SD-LABEL: dupzext_v2i32_v2i64:126; CHECK-SD: // %bb.0: // %entry127; CHECK-SD-NEXT: dup v1.2s, w0128; CHECK-SD-NEXT: umull v0.2d, v1.2s, v0.2s129; CHECK-SD-NEXT: ret130;131; CHECK-GI-LABEL: dupzext_v2i32_v2i64:132; CHECK-GI: // %bb.0: // %entry133; CHECK-GI-NEXT: mov w8, w0134; CHECK-GI-NEXT: dup v1.2d, x8135; CHECK-GI-NEXT: xtn v1.2s, v1.2d136; CHECK-GI-NEXT: umull v0.2d, v1.2s, v0.2s137; CHECK-GI-NEXT: ret138entry:139 %in = zext i32 %src to i64140 %ext.b = zext <2 x i32> %b to <2 x i64>141 %broadcast.splatinsert = insertelement <2 x i64> undef, i64 %in, i64 0142 %broadcast.splat = shufflevector <2 x i64> %broadcast.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer143 %out = mul nuw <2 x i64> %broadcast.splat, %ext.b144 ret <2 x i64> %out145}146 147define <2 x i32> @dupzext_v2i32_v2i64_trunc(i32 %src, <2 x i32> %b) {148; CHECK-SD-LABEL: dupzext_v2i32_v2i64_trunc:149; CHECK-SD: // %bb.0: // %entry150; CHECK-SD-NEXT: dup v1.2s, w0151; CHECK-SD-NEXT: smull v0.2d, v1.2s, v0.2s152; CHECK-SD-NEXT: xtn v0.2s, v0.2d153; CHECK-SD-NEXT: ret154;155; CHECK-GI-LABEL: dupzext_v2i32_v2i64_trunc:156; CHECK-GI: // %bb.0: // %entry157; CHECK-GI-NEXT: mov w8, w0158; CHECK-GI-NEXT: dup v1.2d, x8159; CHECK-GI-NEXT: xtn v1.2s, v1.2d160; CHECK-GI-NEXT: umull v0.2d, v1.2s, v0.2s161; CHECK-GI-NEXT: xtn v0.2s, v0.2d162; CHECK-GI-NEXT: ret163entry:164 %in = zext i32 %src to i64165 %ext.b = zext <2 x i32> %b to <2 x i64>166 %broadcast.splatinsert = insertelement <2 x i64> poison, i64 %in, i64 0167 %broadcast.splat = shufflevector <2 x i64> %broadcast.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer168 %prod = mul nuw <2 x i64> %broadcast.splat, %ext.b169 %out = trunc <2 x i64> %prod to <2 x i32>170 ret <2 x i32> %out171}172 173; Unsupported combines174 175define <2 x i16> @dupsext_v2i8_v2i16(i8 %src, <2 x i8> %b) {176; CHECK-SD-LABEL: dupsext_v2i8_v2i16:177; CHECK-SD: // %bb.0: // %entry178; CHECK-SD-NEXT: sxtb w8, w0179; CHECK-SD-NEXT: shl v0.2s, v0.2s, #24180; CHECK-SD-NEXT: dup v1.2s, w8181; CHECK-SD-NEXT: sshr v0.2s, v0.2s, #24182; CHECK-SD-NEXT: mul v0.2s, v1.2s, v0.2s183; CHECK-SD-NEXT: ret184;185; CHECK-GI-LABEL: dupsext_v2i8_v2i16:186; CHECK-GI: // %bb.0: // %entry187; CHECK-GI-NEXT: lsl w8, w0, #8188; CHECK-GI-NEXT: shl v0.2s, v0.2s, #24189; CHECK-GI-NEXT: sbfx w8, w8, #8, #8190; CHECK-GI-NEXT: sshr v0.2s, v0.2s, #24191; CHECK-GI-NEXT: dup v1.4h, w8192; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0193; CHECK-GI-NEXT: mul v0.2s, v1.2s, v0.2s194; CHECK-GI-NEXT: ret195entry:196 %in = sext i8 %src to i16197 %ext.b = sext <2 x i8> %b to <2 x i16>198 %broadcast.splatinsert = insertelement <2 x i16> undef, i16 %in, i16 0199 %broadcast.splat = shufflevector <2 x i16> %broadcast.splatinsert, <2 x i16> undef, <2 x i32> zeroinitializer200 %out = mul nsw <2 x i16> %broadcast.splat, %ext.b201 ret <2 x i16> %out202}203 204define <2 x i64> @dupzext_v2i16_v2i64(i16 %src, <2 x i16> %b) {205; CHECK-SD-LABEL: dupzext_v2i16_v2i64:206; CHECK-SD: // %bb.0: // %entry207; CHECK-SD-NEXT: movi d1, #0x00ffff0000ffff208; CHECK-SD-NEXT: and w8, w0, #0xffff209; CHECK-SD-NEXT: dup v2.2s, w8210; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b211; CHECK-SD-NEXT: umull v0.2d, v2.2s, v0.2s212; CHECK-SD-NEXT: ret213;214; CHECK-GI-LABEL: dupzext_v2i16_v2i64:215; CHECK-GI: // %bb.0: // %entry216; CHECK-GI-NEXT: movi v1.2d, #0x0000000000ffff217; CHECK-GI-NEXT: ushll v0.2d, v0.2s, #0218; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0219; CHECK-GI-NEXT: and x8, x0, #0xffff220; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b221; CHECK-GI-NEXT: dup v1.2d, x8222; CHECK-GI-NEXT: xtn v1.2s, v1.2d223; CHECK-GI-NEXT: xtn v0.2s, v0.2d224; CHECK-GI-NEXT: umull v0.2d, v1.2s, v0.2s225; CHECK-GI-NEXT: ret226entry:227 %in = zext i16 %src to i64228 %ext.b = zext <2 x i16> %b to <2 x i64>229 %broadcast.splatinsert = insertelement <2 x i64> undef, i64 %in, i64 0230 %broadcast.splat = shufflevector <2 x i64> %broadcast.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer231 %out = mul nuw <2 x i64> %broadcast.splat, %ext.b232 ret <2 x i64> %out233}234 235; dupsext_v4i8_v4i16236; dupsext_v2i8_v2i32237; dupsext_v4i8_v4i32238; dupsext_v2i8_v2i64239; dupsext_v2i16_v2i32240; dupsext_v2i16_v2i64241; dupzext_v2i8_v2i16242; dupzext_v4i8_v4i16243; dupzext_v2i8_v2i32244; dupzext_v4i8_v4i32245; dupzext_v2i8_v2i64246; dupzext_v2i16_v2i32247; dupzext_v2i16_v2i64248 249; Unsupported states250 251define <8 x i16> @nonsplat_shuffleinsert(i8 %src, <8 x i8> %b) {252; CHECK-SD-LABEL: nonsplat_shuffleinsert:253; CHECK-SD: // %bb.0: // %entry254; CHECK-SD-NEXT: dup v1.8b, w0255; CHECK-SD-NEXT: smull v0.8h, v1.8b, v0.8b256; CHECK-SD-NEXT: ret257;258; CHECK-GI-LABEL: nonsplat_shuffleinsert:259; CHECK-GI: // %bb.0: // %entry260; CHECK-GI-NEXT: lsl w8, w0, #8261; CHECK-GI-NEXT: sshll v0.8h, v0.8b, #0262; CHECK-GI-NEXT: sbfx w8, w8, #8, #8263; CHECK-GI-NEXT: mov v1.h[1], w8264; CHECK-GI-NEXT: ext v1.16b, v1.16b, v1.16b, #4265; CHECK-GI-NEXT: mul v0.8h, v1.8h, v0.8h266; CHECK-GI-NEXT: ret267entry:268 %in = sext i8 %src to i16269 %ext.b = sext <8 x i8> %b to <8 x i16>270 %broadcast.splatinsert = insertelement <8 x i16> undef, i16 %in, i16 1271 %broadcast.splat = shufflevector <8 x i16> %broadcast.splatinsert, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>272 %out = mul nsw <8 x i16> %broadcast.splat, %ext.b273 ret <8 x i16> %out274}275 276define <4 x i32> @nonsplat_shuffleinsert2(<4 x i16> %b, i16 %b0, i16 %b1, i16 %b2, i16 %b3) {277; CHECK-SD-LABEL: nonsplat_shuffleinsert2:278; CHECK-SD: // %bb.0: // %entry279; CHECK-SD-NEXT: fmov s1, w0280; CHECK-SD-NEXT: mov v1.h[1], w1281; CHECK-SD-NEXT: mov v1.h[2], w2282; CHECK-SD-NEXT: mov v1.h[3], w3283; CHECK-SD-NEXT: smull v0.4s, v1.4h, v0.4h284; CHECK-SD-NEXT: ret285;286; CHECK-GI-LABEL: nonsplat_shuffleinsert2:287; CHECK-GI: // %bb.0: // %entry288; CHECK-GI-NEXT: sxth w8, w0289; CHECK-GI-NEXT: sxth w9, w1290; CHECK-GI-NEXT: fmov s1, w8291; CHECK-GI-NEXT: sxth w8, w2292; CHECK-GI-NEXT: mov v1.h[1], w9293; CHECK-GI-NEXT: mov v1.h[2], w8294; CHECK-GI-NEXT: sxth w8, w3295; CHECK-GI-NEXT: mov v1.h[3], w8296; CHECK-GI-NEXT: smull v0.4s, v1.4h, v0.4h297; CHECK-GI-NEXT: ret298entry:299 %s0 = sext i16 %b0 to i32300 %s1 = sext i16 %b1 to i32301 %s2 = sext i16 %b2 to i32302 %s3 = sext i16 %b3 to i32303 %ext.b = sext <4 x i16> %b to <4 x i32>304 %v0 = insertelement <4 x i32> undef, i32 %s0, i32 0305 %v1 = insertelement <4 x i32> %v0, i32 %s1, i32 1306 %v2 = insertelement <4 x i32> %v1, i32 %s2, i32 2307 %v3 = insertelement <4 x i32> %v2, i32 %s3, i32 3308 %out = mul nsw <4 x i32> %v3, %ext.b309 ret <4 x i32> %out310}311 312define void @typei1_orig(i64 %a, ptr %p, ptr %q) {313; CHECK-SD-LABEL: typei1_orig:314; CHECK-SD: // %bb.0:315; CHECK-SD-NEXT: cmp x0, #0316; CHECK-SD-NEXT: ldr q0, [x2]317; CHECK-SD-NEXT: cset w8, gt318; CHECK-SD-NEXT: dup v1.8h, w8319; CHECK-SD-NEXT: cmtst v0.8h, v0.8h, v0.8h320; CHECK-SD-NEXT: cmeq v1.8h, v1.8h, #0321; CHECK-SD-NEXT: bic v0.16b, v0.16b, v1.16b322; CHECK-SD-NEXT: xtn v0.8b, v0.8h323; CHECK-SD-NEXT: str q0, [x1]324; CHECK-SD-NEXT: ret325;326; CHECK-GI-LABEL: typei1_orig:327; CHECK-GI: // %bb.0:328; CHECK-GI-NEXT: ldr q0, [x2]329; CHECK-GI-NEXT: cmp x0, #0330; CHECK-GI-NEXT: cset w8, gt331; CHECK-GI-NEXT: neg v0.8h, v0.8h332; CHECK-GI-NEXT: dup v1.8h, w8333; CHECK-GI-NEXT: mul v0.8h, v0.8h, v1.8h334; CHECK-GI-NEXT: movi v1.2d, #0xffffffffffffffff335; CHECK-GI-NEXT: cmtst v0.8h, v0.8h, v0.8h336; CHECK-GI-NEXT: mvn v1.16b, v1.16b337; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b338; CHECK-GI-NEXT: str q0, [x1]339; CHECK-GI-NEXT: ret340 %tmp = xor <16 x i1> zeroinitializer, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>341 %tmp6 = load <8 x i16>, ptr %q, align 2342 %tmp7 = sub <8 x i16> zeroinitializer, %tmp6343 %tmp8 = shufflevector <8 x i16> %tmp7, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>344 %tmp9 = icmp slt i64 0, %a345 %tmp10 = zext i1 %tmp9 to i16346 %tmp11 = insertelement <16 x i16> undef, i16 %tmp10, i64 0347 %tmp12 = shufflevector <16 x i16> %tmp11, <16 x i16> undef, <16 x i32> zeroinitializer348 %tmp13 = mul nuw <16 x i16> %tmp8, %tmp12349 %tmp14 = icmp ne <16 x i16> %tmp13, zeroinitializer350 %tmp15 = and <16 x i1> %tmp14, %tmp351 %tmp16 = sext <16 x i1> %tmp15 to <16 x i8>352 store <16 x i8> %tmp16, ptr %p, align 1353 ret void354}355 356define <8 x i16> @typei1_v8i1_v8i16(i1 %src, <8 x i1> %b) {357; CHECK-SD-LABEL: typei1_v8i1_v8i16:358; CHECK-SD: // %bb.0: // %entry359; CHECK-SD-NEXT: movi v1.8b, #1360; CHECK-SD-NEXT: and w8, w0, #0x1361; CHECK-SD-NEXT: dup v2.8b, w8362; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b363; CHECK-SD-NEXT: umull v0.8h, v2.8b, v0.8b364; CHECK-SD-NEXT: ret365;366; CHECK-GI-LABEL: typei1_v8i1_v8i16:367; CHECK-GI: // %bb.0: // %entry368; CHECK-GI-NEXT: movi v1.8h, #1369; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0370; CHECK-GI-NEXT: and w8, w0, #0x1371; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b372; CHECK-GI-NEXT: dup v1.8h, w8373; CHECK-GI-NEXT: mul v0.8h, v1.8h, v0.8h374; CHECK-GI-NEXT: ret375entry:376 %in = zext i1 %src to i16377 %ext.b = zext <8 x i1> %b to <8 x i16>378 %broadcast.splatinsert = insertelement <8 x i16> undef, i16 %in, i16 0379 %broadcast.splat = shufflevector <8 x i16> %broadcast.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer380 %out = mul nsw <8 x i16> %broadcast.splat, %ext.b381 ret <8 x i16> %out382}383 384define <8 x i16> @missing_insert(<8 x i8> %b) {385; CHECK-SD-LABEL: missing_insert:386; CHECK-SD: // %bb.0: // %entry387; CHECK-SD-NEXT: ext v1.8b, v0.8b, v0.8b, #2388; CHECK-SD-NEXT: smull v0.8h, v1.8b, v0.8b389; CHECK-SD-NEXT: ret390;391; CHECK-GI-LABEL: missing_insert:392; CHECK-GI: // %bb.0: // %entry393; CHECK-GI-NEXT: sshll v1.8h, v0.8b, #0394; CHECK-GI-NEXT: ext v1.16b, v1.16b, v1.16b, #4395; CHECK-GI-NEXT: xtn v1.8b, v1.8h396; CHECK-GI-NEXT: smull v0.8h, v1.8b, v0.8b397; CHECK-GI-NEXT: ret398entry:399 %ext.b = sext <8 x i8> %b to <8 x i16>400 %broadcast.splat = shufflevector <8 x i16> %ext.b, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>401 %out = mul nsw <8 x i16> %broadcast.splat, %ext.b402 ret <8 x i16> %out403}404 405define <8 x i16> @shufsext_v8i8_v8i16(<8 x i8> %src, <8 x i8> %b) {406; CHECK-SD-LABEL: shufsext_v8i8_v8i16:407; CHECK-SD: // %bb.0: // %entry408; CHECK-SD-NEXT: rev64 v0.8b, v0.8b409; CHECK-SD-NEXT: smull v0.8h, v0.8b, v1.8b410; CHECK-SD-NEXT: ret411;412; CHECK-GI-LABEL: shufsext_v8i8_v8i16:413; CHECK-GI: // %bb.0: // %entry414; CHECK-GI-NEXT: sshll v0.8h, v0.8b, #0415; CHECK-GI-NEXT: rev64 v0.8h, v0.8h416; CHECK-GI-NEXT: ext v0.16b, v0.16b, v0.16b, #8417; CHECK-GI-NEXT: xtn v0.8b, v0.8h418; CHECK-GI-NEXT: smull v0.8h, v0.8b, v1.8b419; CHECK-GI-NEXT: ret420entry:421 %in = sext <8 x i8> %src to <8 x i16>422 %ext.b = sext <8 x i8> %b to <8 x i16>423 %shuf = shufflevector <8 x i16> %in, <8 x i16> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>424 %out = mul nsw <8 x i16> %shuf, %ext.b425 ret <8 x i16> %out426}427 428define <2 x i64> @shufsext_v2i32_v2i64(<2 x i32> %src, <2 x i32> %b) {429; CHECK-SD-LABEL: shufsext_v2i32_v2i64:430; CHECK-SD: // %bb.0: // %entry431; CHECK-SD-NEXT: rev64 v0.2s, v0.2s432; CHECK-SD-NEXT: smull v0.2d, v0.2s, v1.2s433; CHECK-SD-NEXT: ret434;435; CHECK-GI-LABEL: shufsext_v2i32_v2i64:436; CHECK-GI: // %bb.0: // %entry437; CHECK-GI-NEXT: sshll v0.2d, v0.2s, #0438; CHECK-GI-NEXT: ext v0.16b, v0.16b, v0.16b, #8439; CHECK-GI-NEXT: xtn v0.2s, v0.2d440; CHECK-GI-NEXT: smull v0.2d, v0.2s, v1.2s441; CHECK-GI-NEXT: ret442entry:443 %in = sext <2 x i32> %src to <2 x i64>444 %ext.b = sext <2 x i32> %b to <2 x i64>445 %shuf = shufflevector <2 x i64> %in, <2 x i64> undef, <2 x i32> <i32 1, i32 0>446 %out = mul nsw <2 x i64> %shuf, %ext.b447 ret <2 x i64> %out448}449 450define <8 x i16> @shufzext_v8i8_v8i16(<8 x i8> %src, <8 x i8> %b) {451; CHECK-SD-LABEL: shufzext_v8i8_v8i16:452; CHECK-SD: // %bb.0: // %entry453; CHECK-SD-NEXT: rev64 v0.8b, v0.8b454; CHECK-SD-NEXT: umull v0.8h, v0.8b, v1.8b455; CHECK-SD-NEXT: ret456;457; CHECK-GI-LABEL: shufzext_v8i8_v8i16:458; CHECK-GI: // %bb.0: // %entry459; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0460; CHECK-GI-NEXT: rev64 v0.8h, v0.8h461; CHECK-GI-NEXT: ext v0.16b, v0.16b, v0.16b, #8462; CHECK-GI-NEXT: xtn v0.8b, v0.8h463; CHECK-GI-NEXT: umull v0.8h, v0.8b, v1.8b464; CHECK-GI-NEXT: ret465entry:466 %in = zext <8 x i8> %src to <8 x i16>467 %ext.b = zext <8 x i8> %b to <8 x i16>468 %shuf = shufflevector <8 x i16> %in, <8 x i16> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>469 %out = mul nsw <8 x i16> %shuf, %ext.b470 ret <8 x i16> %out471}472 473define <2 x i64> @shufzext_v2i32_v2i64(<2 x i32> %src, <2 x i32> %b) {474; CHECK-SD-LABEL: shufzext_v2i32_v2i64:475; CHECK-SD: // %bb.0: // %entry476; CHECK-SD-NEXT: rev64 v0.2s, v0.2s477; CHECK-SD-NEXT: smull v0.2d, v0.2s, v1.2s478; CHECK-SD-NEXT: ret479;480; CHECK-GI-LABEL: shufzext_v2i32_v2i64:481; CHECK-GI: // %bb.0: // %entry482; CHECK-GI-NEXT: sshll v0.2d, v0.2s, #0483; CHECK-GI-NEXT: ext v0.16b, v0.16b, v0.16b, #8484; CHECK-GI-NEXT: xtn v0.2s, v0.2d485; CHECK-GI-NEXT: smull v0.2d, v0.2s, v1.2s486; CHECK-GI-NEXT: ret487entry:488 %in = sext <2 x i32> %src to <2 x i64>489 %ext.b = sext <2 x i32> %b to <2 x i64>490 %shuf = shufflevector <2 x i64> %in, <2 x i64> undef, <2 x i32> <i32 1, i32 0>491 %out = mul nsw <2 x i64> %shuf, %ext.b492 ret <2 x i64> %out493}494 495define <8 x i16> @shufzext_v8i8_v8i16_twoin(<8 x i8> %src1, <8 x i8> %src2, <8 x i8> %b) {496; CHECK-SD-LABEL: shufzext_v8i8_v8i16_twoin:497; CHECK-SD: // %bb.0: // %entry498; CHECK-SD-NEXT: trn1 v0.8b, v0.8b, v1.8b499; CHECK-SD-NEXT: umull v0.8h, v0.8b, v2.8b500; CHECK-SD-NEXT: ret501;502; CHECK-GI-LABEL: shufzext_v8i8_v8i16_twoin:503; CHECK-GI: // %bb.0: // %entry504; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0505; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0506; CHECK-GI-NEXT: trn1 v0.8h, v0.8h, v1.8h507; CHECK-GI-NEXT: xtn v0.8b, v0.8h508; CHECK-GI-NEXT: umull v0.8h, v0.8b, v2.8b509; CHECK-GI-NEXT: ret510entry:511 %in1 = zext <8 x i8> %src1 to <8 x i16>512 %in2 = zext <8 x i8> %src2 to <8 x i16>513 %ext.b = zext <8 x i8> %b to <8 x i16>514 %shuf = shufflevector <8 x i16> %in1, <8 x i16> %in2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>515 %out = mul nsw <8 x i16> %shuf, %ext.b516 ret <8 x i16> %out517}518 519define <8 x i16> @shufszext_v8i8_v8i16_twoin(<8 x i8> %src1, <8 x i8> %src2, <8 x i8> %b) {520; CHECK-LABEL: shufszext_v8i8_v8i16_twoin:521; CHECK: // %bb.0: // %entry522; CHECK-NEXT: ushll v0.8h, v0.8b, #0523; CHECK-NEXT: sshll v1.8h, v1.8b, #0524; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h525; CHECK-NEXT: ushll v1.8h, v2.8b, #0526; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h527; CHECK-NEXT: ret528entry:529 %in1 = zext <8 x i8> %src1 to <8 x i16>530 %in2 = sext <8 x i8> %src2 to <8 x i16>531 %ext.b = zext <8 x i8> %b to <8 x i16>532 %shuf = shufflevector <8 x i16> %in1, <8 x i16> %in2, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>533 %out = mul nsw <8 x i16> %shuf, %ext.b534 ret <8 x i16> %out535}536 537