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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s --check-prefix CHECK-LE3; RUN: llc -mtriple=aarch64_be-unknown-linux-gnu < %s | FileCheck %s --check-prefix CHECK-BE4 5define <2 x i16> @test0(ptr %i16_ptr, i64 %inc) {6; CHECK-LE-LABEL: test0:7; CHECK-LE: // %bb.0:8; CHECK-LE-NEXT: ld1 { v0.h }[0], [x0]9; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q010; CHECK-LE-NEXT: ret11;12; CHECK-BE-LABEL: test0:13; CHECK-BE: // %bb.0:14; CHECK-BE-NEXT: ld1 { v0.h }[0], [x0]15; CHECK-BE-NEXT: rev64 v0.2s, v0.2s16; CHECK-BE-NEXT: ret17 %i_0 = load i16, ptr %i16_ptr18 %v0 = insertelement <2 x i16> undef, i16 %i_0, i32 019 ret <2 x i16> %v020}21 22define <2 x i16> @test1(ptr %v2i16_ptr) {23; CHECK-LE-LABEL: test1:24; CHECK-LE: // %bb.0:25; CHECK-LE-NEXT: ldr s0, [x0]26; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #027; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q028; CHECK-LE-NEXT: ret29;30; CHECK-BE-LABEL: test1:31; CHECK-BE: // %bb.0:32; CHECK-BE-NEXT: ldr s0, [x0]33; CHECK-BE-NEXT: rev32 v0.4h, v0.4h34; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #035; CHECK-BE-NEXT: rev64 v0.2s, v0.2s36; CHECK-BE-NEXT: ret37 %v2i16 = load <2 x i16>, ptr %v2i16_ptr38 ret <2 x i16> %v2i1639}40 41define <2 x i16> @test2(ptr %i16_ptr, i64 %inc) {42; CHECK-LE-LABEL: test2:43; CHECK-LE: // %bb.0:44; CHECK-LE-NEXT: ld1 { v0.h }[0], [x0]45; CHECK-LE-NEXT: add x8, x0, x1, lsl #146; CHECK-LE-NEXT: ld1 { v0.h }[2], [x8]47; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q048; CHECK-LE-NEXT: ret49;50; CHECK-BE-LABEL: test2:51; CHECK-BE: // %bb.0:52; CHECK-BE-NEXT: ld1 { v0.h }[0], [x0]53; CHECK-BE-NEXT: add x8, x0, x1, lsl #154; CHECK-BE-NEXT: ld1 { v0.h }[2], [x8]55; CHECK-BE-NEXT: rev64 v0.2s, v0.2s56; CHECK-BE-NEXT: ret57 %i_0 = load i16, ptr %i16_ptr58 %i16_ptr_inc = getelementptr i16, ptr %i16_ptr, i64 %inc59 %i_1 = load i16, ptr %i16_ptr_inc60 %v0 = insertelement <2 x i16> undef, i16 %i_0, i32 061 %v1 = insertelement <2 x i16> %v0, i16 %i_1, i32 162 ret <2 x i16> %v163}64 65define <2 x i8> @test3(ptr %v2i8_ptr) {66; CHECK-LE-LABEL: test3:67; CHECK-LE: // %bb.0:68; CHECK-LE-NEXT: ldr h0, [x0]69; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #070; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #071; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q072; CHECK-LE-NEXT: ret73;74; CHECK-BE-LABEL: test3:75; CHECK-BE: // %bb.0:76; CHECK-BE-NEXT: ldr h0, [x0]77; CHECK-BE-NEXT: rev16 v0.8b, v0.8b78; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #079; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #080; CHECK-BE-NEXT: rev64 v0.2s, v0.2s81; CHECK-BE-NEXT: ret82 %v2i8 = load <2 x i8>, ptr %v2i8_ptr83 ret <2 x i8> %v2i884}85 86define <4 x i8> @test4(ptr %v4i8_ptr) {87; CHECK-LE-LABEL: test4:88; CHECK-LE: // %bb.0:89; CHECK-LE-NEXT: ldr s0, [x0]90; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #091; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q092; CHECK-LE-NEXT: ret93;94; CHECK-BE-LABEL: test4:95; CHECK-BE: // %bb.0:96; CHECK-BE-NEXT: ldr s0, [x0]97; CHECK-BE-NEXT: rev32 v0.8b, v0.8b98; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #099; CHECK-BE-NEXT: rev64 v0.4h, v0.4h100; CHECK-BE-NEXT: ret101 %v4i8 = load <4 x i8>, ptr %v4i8_ptr102 ret <4 x i8> %v4i8103}104 105define <2 x i32> @fsext_v2i32(ptr %a) {106; CHECK-LE-LABEL: fsext_v2i32:107; CHECK-LE: // %bb.0:108; CHECK-LE-NEXT: ldr h0, [x0]109; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0110; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0111; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0112; CHECK-LE-NEXT: ret113;114; CHECK-BE-LABEL: fsext_v2i32:115; CHECK-BE: // %bb.0:116; CHECK-BE-NEXT: ldr h0, [x0]117; CHECK-BE-NEXT: rev16 v0.8b, v0.8b118; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0119; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0120; CHECK-BE-NEXT: rev64 v0.2s, v0.2s121; CHECK-BE-NEXT: ret122 %x = load <2 x i8>, ptr %a123 %y = sext <2 x i8> %x to <2 x i32>124 ret <2 x i32> %y125}126 127define <3 x i32> @fsext_v3i32(ptr %a) {128; CHECK-LE-LABEL: fsext_v3i32:129; CHECK-LE: // %bb.0:130; CHECK-LE-NEXT: ldr s0, [x0]131; CHECK-LE-NEXT: zip1 v0.8b, v0.8b, v0.8b132; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0133; CHECK-LE-NEXT: shl v0.4s, v0.4s, #24134; CHECK-LE-NEXT: sshr v0.4s, v0.4s, #24135; CHECK-LE-NEXT: ret136;137; CHECK-BE-LABEL: fsext_v3i32:138; CHECK-BE: // %bb.0:139; CHECK-BE-NEXT: ldr s0, [x0]140; CHECK-BE-NEXT: rev32 v0.8b, v0.8b141; CHECK-BE-NEXT: zip1 v0.8b, v0.8b, v0.8b142; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0143; CHECK-BE-NEXT: shl v0.4s, v0.4s, #24144; CHECK-BE-NEXT: sshr v0.4s, v0.4s, #24145; CHECK-BE-NEXT: rev64 v0.4s, v0.4s146; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8147; CHECK-BE-NEXT: ret148 %x = load <3 x i8>, ptr %a149 %y = sext <3 x i8> %x to <3 x i32>150 ret <3 x i32> %y151}152 153define <4 x i32> @fsext_v4i32(ptr %a) {154; CHECK-LE-LABEL: fsext_v4i32:155; CHECK-LE: // %bb.0:156; CHECK-LE-NEXT: ldr s0, [x0]157; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0158; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0159; CHECK-LE-NEXT: ret160;161; CHECK-BE-LABEL: fsext_v4i32:162; CHECK-BE: // %bb.0:163; CHECK-BE-NEXT: ldr s0, [x0]164; CHECK-BE-NEXT: rev32 v0.8b, v0.8b165; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0166; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0167; CHECK-BE-NEXT: rev64 v0.4s, v0.4s168; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8169; CHECK-BE-NEXT: ret170 %x = load <4 x i8>, ptr %a171 %y = sext <4 x i8> %x to <4 x i32>172 ret <4 x i32> %y173}174 175define <8 x i32> @fsext_v8i32(ptr %a) {176; CHECK-LE-LABEL: fsext_v8i32:177; CHECK-LE: // %bb.0:178; CHECK-LE-NEXT: ldr d0, [x0]179; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0180; CHECK-LE-NEXT: sshll2 v1.4s, v0.8h, #0181; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0182; CHECK-LE-NEXT: ret183;184; CHECK-BE-LABEL: fsext_v8i32:185; CHECK-BE: // %bb.0:186; CHECK-BE-NEXT: ld1 { v0.8b }, [x0]187; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0188; CHECK-BE-NEXT: sshll v1.4s, v0.4h, #0189; CHECK-BE-NEXT: sshll2 v0.4s, v0.8h, #0190; CHECK-BE-NEXT: rev64 v0.4s, v0.4s191; CHECK-BE-NEXT: rev64 v2.4s, v1.4s192; CHECK-BE-NEXT: ext v1.16b, v0.16b, v0.16b, #8193; CHECK-BE-NEXT: ext v0.16b, v2.16b, v2.16b, #8194; CHECK-BE-NEXT: ret195 %x = load <8 x i8>, ptr %a196 %y = sext <8 x i8> %x to <8 x i32>197 ret <8 x i32> %y198}199 200define <4 x i32> @fzext_v4i32(ptr %a) {201; CHECK-LE-LABEL: fzext_v4i32:202; CHECK-LE: // %bb.0:203; CHECK-LE-NEXT: ldr s0, [x0]204; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0205; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0206; CHECK-LE-NEXT: ret207;208; CHECK-BE-LABEL: fzext_v4i32:209; CHECK-BE: // %bb.0:210; CHECK-BE-NEXT: ldr s0, [x0]211; CHECK-BE-NEXT: rev32 v0.8b, v0.8b212; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0213; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0214; CHECK-BE-NEXT: rev64 v0.4s, v0.4s215; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8216; CHECK-BE-NEXT: ret217 %x = load <4 x i8>, ptr %a218 %y = zext <4 x i8> %x to <4 x i32>219 ret <4 x i32> %y220}221 222; TODO: This codegen could just be:223; ldrb w0, [x0]224;225define i32 @loadExti32(ptr %ref) {226; CHECK-LE-LABEL: loadExti32:227; CHECK-LE: // %bb.0:228; CHECK-LE-NEXT: ldr s0, [x0]229; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0230; CHECK-LE-NEXT: umov w8, v0.h[0]231; CHECK-LE-NEXT: and w0, w8, #0xff232; CHECK-LE-NEXT: ret233;234; CHECK-BE-LABEL: loadExti32:235; CHECK-BE: // %bb.0:236; CHECK-BE-NEXT: ldr s0, [x0]237; CHECK-BE-NEXT: rev32 v0.8b, v0.8b238; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0239; CHECK-BE-NEXT: umov w8, v0.h[0]240; CHECK-BE-NEXT: and w0, w8, #0xff241; CHECK-BE-NEXT: ret242 %a = load <4 x i8>, ptr %ref243 %vecext = extractelement <4 x i8> %a, i32 0244 %conv = zext i8 %vecext to i32245 ret i32 %conv246}247 248define <2 x i16> @fsext_v2i16(ptr %a) {249; CHECK-LE-LABEL: fsext_v2i16:250; CHECK-LE: // %bb.0:251; CHECK-LE-NEXT: ldr h0, [x0]252; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0253; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0254; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0255; CHECK-LE-NEXT: ret256;257; CHECK-BE-LABEL: fsext_v2i16:258; CHECK-BE: // %bb.0:259; CHECK-BE-NEXT: ldr h0, [x0]260; CHECK-BE-NEXT: rev16 v0.8b, v0.8b261; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0262; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0263; CHECK-BE-NEXT: rev64 v0.2s, v0.2s264; CHECK-BE-NEXT: ret265 %x = load <2 x i8>, ptr %a266 %y = sext <2 x i8> %x to <2 x i16>267 ret <2 x i16> %y268}269 270define <3 x i16> @fsext_v3i16(ptr %a) {271; CHECK-LE-LABEL: fsext_v3i16:272; CHECK-LE: // %bb.0:273; CHECK-LE-NEXT: ldr s0, [x0]274; CHECK-LE-NEXT: zip1 v0.8b, v0.8b, v0.8b275; CHECK-LE-NEXT: shl v0.4h, v0.4h, #8276; CHECK-LE-NEXT: sshr v0.4h, v0.4h, #8277; CHECK-LE-NEXT: ret278;279; CHECK-BE-LABEL: fsext_v3i16:280; CHECK-BE: // %bb.0:281; CHECK-BE-NEXT: ldr s0, [x0]282; CHECK-BE-NEXT: rev32 v0.8b, v0.8b283; CHECK-BE-NEXT: zip1 v0.8b, v0.8b, v0.8b284; CHECK-BE-NEXT: shl v0.4h, v0.4h, #8285; CHECK-BE-NEXT: sshr v0.4h, v0.4h, #8286; CHECK-BE-NEXT: rev64 v0.4h, v0.4h287; CHECK-BE-NEXT: ret288 %x = load <3 x i8>, ptr %a289 %y = sext <3 x i8> %x to <3 x i16>290 ret <3 x i16> %y291}292 293define <4 x i16> @fsext_v4i16(ptr %a) {294; CHECK-LE-LABEL: fsext_v4i16:295; CHECK-LE: // %bb.0:296; CHECK-LE-NEXT: ldr s0, [x0]297; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0298; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0299; CHECK-LE-NEXT: ret300;301; CHECK-BE-LABEL: fsext_v4i16:302; CHECK-BE: // %bb.0:303; CHECK-BE-NEXT: ldr s0, [x0]304; CHECK-BE-NEXT: rev32 v0.8b, v0.8b305; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0306; CHECK-BE-NEXT: rev64 v0.4h, v0.4h307; CHECK-BE-NEXT: ret308 %x = load <4 x i8>, ptr %a309 %y = sext <4 x i8> %x to <4 x i16>310 ret <4 x i16> %y311}312 313define <8 x i16> @fsext_v8i16(ptr %a) {314; CHECK-LE-LABEL: fsext_v8i16:315; CHECK-LE: // %bb.0:316; CHECK-LE-NEXT: ldr d0, [x0]317; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0318; CHECK-LE-NEXT: ret319;320; CHECK-BE-LABEL: fsext_v8i16:321; CHECK-BE: // %bb.0:322; CHECK-BE-NEXT: ld1 { v0.8b }, [x0]323; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0324; CHECK-BE-NEXT: rev64 v0.8h, v0.8h325; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8326; CHECK-BE-NEXT: ret327 %x = load <8 x i8>, ptr %a328 %y = sext <8 x i8> %x to <8 x i16>329 ret <8 x i16> %y330}331 332define <16 x i16> @fsext_v16i16(ptr %a) {333; CHECK-LE-LABEL: fsext_v16i16:334; CHECK-LE: // %bb.0:335; CHECK-LE-NEXT: ldr q0, [x0]336; CHECK-LE-NEXT: sshll2 v1.8h, v0.16b, #0337; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0338; CHECK-LE-NEXT: ret339;340; CHECK-BE-LABEL: fsext_v16i16:341; CHECK-BE: // %bb.0:342; CHECK-BE-NEXT: ld1 { v0.16b }, [x0]343; CHECK-BE-NEXT: sshll v1.8h, v0.8b, #0344; CHECK-BE-NEXT: sshll2 v0.8h, v0.16b, #0345; CHECK-BE-NEXT: rev64 v0.8h, v0.8h346; CHECK-BE-NEXT: rev64 v2.8h, v1.8h347; CHECK-BE-NEXT: ext v1.16b, v0.16b, v0.16b, #8348; CHECK-BE-NEXT: ext v0.16b, v2.16b, v2.16b, #8349; CHECK-BE-NEXT: ret350 %x = load <16 x i8>, ptr %a351 %y = sext <16 x i8> %x to <16 x i16>352 ret <16 x i16> %y353}354 355define <4 x i16> @fzext_v4i16(ptr %a) {356; CHECK-LE-LABEL: fzext_v4i16:357; CHECK-LE: // %bb.0:358; CHECK-LE-NEXT: ldr s0, [x0]359; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0360; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0361; CHECK-LE-NEXT: ret362;363; CHECK-BE-LABEL: fzext_v4i16:364; CHECK-BE: // %bb.0:365; CHECK-BE-NEXT: ldr s0, [x0]366; CHECK-BE-NEXT: rev32 v0.8b, v0.8b367; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0368; CHECK-BE-NEXT: rev64 v0.4h, v0.4h369; CHECK-BE-NEXT: ret370 %x = load <4 x i8>, ptr %a371 %y = zext <4 x i8> %x to <4 x i16>372 ret <4 x i16> %y373}374 375define <4 x i16> @anyext_v4i16(ptr %a, ptr %b) {376; CHECK-LE-LABEL: anyext_v4i16:377; CHECK-LE: // %bb.0:378; CHECK-LE-NEXT: ldr s0, [x0]379; CHECK-LE-NEXT: ldr s1, [x1]380; CHECK-LE-NEXT: uaddl v0.8h, v0.8b, v1.8b381; CHECK-LE-NEXT: shl v0.4h, v0.4h, #8382; CHECK-LE-NEXT: sshr v0.4h, v0.4h, #8383; CHECK-LE-NEXT: ret384;385; CHECK-BE-LABEL: anyext_v4i16:386; CHECK-BE: // %bb.0:387; CHECK-BE-NEXT: ldr s0, [x0]388; CHECK-BE-NEXT: ldr s1, [x1]389; CHECK-BE-NEXT: rev32 v0.8b, v0.8b390; CHECK-BE-NEXT: rev32 v1.8b, v1.8b391; CHECK-BE-NEXT: uaddl v0.8h, v0.8b, v1.8b392; CHECK-BE-NEXT: shl v0.4h, v0.4h, #8393; CHECK-BE-NEXT: sshr v0.4h, v0.4h, #8394; CHECK-BE-NEXT: rev64 v0.4h, v0.4h395; CHECK-BE-NEXT: ret396 %x = load <4 x i8>, ptr %a, align 4397 %y = load <4 x i8>, ptr %b, align 4398 %z = add <4 x i8> %x, %y399 %s = sext <4 x i8> %z to <4 x i16>400 ret <4 x i16> %s401}402 403define <4 x i32> @anyext_v4i32(ptr %a, ptr %b) {404; CHECK-LE-LABEL: anyext_v4i32:405; CHECK-LE: // %bb.0:406; CHECK-LE-NEXT: ldr s0, [x0]407; CHECK-LE-NEXT: ldr s1, [x1]408; CHECK-LE-NEXT: uaddl v0.8h, v0.8b, v1.8b409; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0410; CHECK-LE-NEXT: shl v0.4s, v0.4s, #24411; CHECK-LE-NEXT: sshr v0.4s, v0.4s, #24412; CHECK-LE-NEXT: ret413;414; CHECK-BE-LABEL: anyext_v4i32:415; CHECK-BE: // %bb.0:416; CHECK-BE-NEXT: ldr s0, [x0]417; CHECK-BE-NEXT: ldr s1, [x1]418; CHECK-BE-NEXT: rev32 v0.8b, v0.8b419; CHECK-BE-NEXT: rev32 v1.8b, v1.8b420; CHECK-BE-NEXT: uaddl v0.8h, v0.8b, v1.8b421; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0422; CHECK-BE-NEXT: shl v0.4s, v0.4s, #24423; CHECK-BE-NEXT: sshr v0.4s, v0.4s, #24424; CHECK-BE-NEXT: rev64 v0.4s, v0.4s425; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8426; CHECK-BE-NEXT: ret427 %x = load <4 x i8>, ptr %a, align 4428 %y = load <4 x i8>, ptr %b, align 4429 %z = add <4 x i8> %x, %y430 %s = sext <4 x i8> %z to <4 x i32>431 ret <4 x i32> %s432}433 434define <4 x i8> @bitcast(i32 %0) {435; CHECK-LE-LABEL: bitcast:436; CHECK-LE: // %bb.0:437; CHECK-LE-NEXT: fmov s0, w0438; CHECK-LE-NEXT: zip1 v0.8b, v0.8b, v0.8b439; CHECK-LE-NEXT: ret440;441; CHECK-BE-LABEL: bitcast:442; CHECK-BE: // %bb.0:443; CHECK-BE-NEXT: fmov s0, w0444; CHECK-BE-NEXT: rev32 v0.8b, v0.8b445; CHECK-BE-NEXT: zip1 v0.8b, v0.8b, v0.8b446; CHECK-BE-NEXT: rev64 v0.4h, v0.4h447; CHECK-BE-NEXT: ret448 %2 = bitcast i32 %0 to <4 x i8>449 ret <4 x i8> %2450}451 452define <4 x i8> @strict_align_aligned(ptr %v4i8_ptr) "target-features"="+strict-align" {453; CHECK-LE-LABEL: strict_align_aligned:454; CHECK-LE: // %bb.0:455; CHECK-LE-NEXT: ldr s0, [x0]456; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0457; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0458; CHECK-LE-NEXT: ret459;460; CHECK-BE-LABEL: strict_align_aligned:461; CHECK-BE: // %bb.0:462; CHECK-BE-NEXT: ldr s0, [x0]463; CHECK-BE-NEXT: rev32 v0.8b, v0.8b464; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0465; CHECK-BE-NEXT: rev64 v0.4h, v0.4h466; CHECK-BE-NEXT: ret467 %v4i8 = load <4 x i8>, ptr %v4i8_ptr, align 4468 ret <4 x i8> %v4i8469}470 471define <4 x i8> @strict_align_unaligned(ptr %v4i8_ptr) "target-features"="+strict-align" {472; CHECK-LE-LABEL: strict_align_unaligned:473; CHECK-LE: // %bb.0:474; CHECK-LE-NEXT: ld1 { v0.b }[0], [x0]475; CHECK-LE-NEXT: add x8, x0, #1476; CHECK-LE-NEXT: ld1 { v0.b }[2], [x8]477; CHECK-LE-NEXT: add x8, x0, #2478; CHECK-LE-NEXT: ld1 { v0.b }[4], [x8]479; CHECK-LE-NEXT: add x8, x0, #3480; CHECK-LE-NEXT: ld1 { v0.b }[6], [x8]481; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0482; CHECK-LE-NEXT: ret483;484; CHECK-BE-LABEL: strict_align_unaligned:485; CHECK-BE: // %bb.0:486; CHECK-BE-NEXT: ld1 { v0.b }[0], [x0]487; CHECK-BE-NEXT: add x8, x0, #1488; CHECK-BE-NEXT: ld1 { v0.b }[2], [x8]489; CHECK-BE-NEXT: add x8, x0, #2490; CHECK-BE-NEXT: ld1 { v0.b }[4], [x8]491; CHECK-BE-NEXT: add x8, x0, #3492; CHECK-BE-NEXT: ld1 { v0.b }[6], [x8]493; CHECK-BE-NEXT: rev64 v0.4h, v0.4h494; CHECK-BE-NEXT: ret495 %v4i8 = load <4 x i8>, ptr %v4i8_ptr, align 1496 ret <4 x i8> %v4i8497}498 499define <2 x i16> @zext_v2i8_v2i16(ptr %a) {500; CHECK-LE-LABEL: zext_v2i8_v2i16:501; CHECK-LE: // %bb.0:502; CHECK-LE-NEXT: ldr h0, [x0]503; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0504; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0505; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0506; CHECK-LE-NEXT: ret507;508; CHECK-BE-LABEL: zext_v2i8_v2i16:509; CHECK-BE: // %bb.0:510; CHECK-BE-NEXT: ldr h0, [x0]511; CHECK-BE-NEXT: rev16 v0.8b, v0.8b512; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0513; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0514; CHECK-BE-NEXT: rev64 v0.2s, v0.2s515; CHECK-BE-NEXT: ret516 %x = load <2 x i8>, ptr %a517 %y = zext <2 x i8> %x to <2 x i16>518 ret <2 x i16> %y519}520 521define <2 x i32> @zext_v2i8_v2i32(ptr %a) {522; CHECK-LE-LABEL: zext_v2i8_v2i32:523; CHECK-LE: // %bb.0:524; CHECK-LE-NEXT: ldr h0, [x0]525; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0526; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0527; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0528; CHECK-LE-NEXT: ret529;530; CHECK-BE-LABEL: zext_v2i8_v2i32:531; CHECK-BE: // %bb.0:532; CHECK-BE-NEXT: ldr h0, [x0]533; CHECK-BE-NEXT: rev16 v0.8b, v0.8b534; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0535; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0536; CHECK-BE-NEXT: rev64 v0.2s, v0.2s537; CHECK-BE-NEXT: ret538 %x = load <2 x i8>, ptr %a539 %y = zext <2 x i8> %x to <2 x i32>540 ret <2 x i32> %y541}542 543define <2 x i64> @zext_v2i8_v2i64(ptr %a) {544; CHECK-LE-LABEL: zext_v2i8_v2i64:545; CHECK-LE: // %bb.0:546; CHECK-LE-NEXT: ldr h0, [x0]547; CHECK-LE-NEXT: ushll v0.8h, v0.8b, #0548; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0549; CHECK-LE-NEXT: ushll v0.2d, v0.2s, #0550; CHECK-LE-NEXT: ret551;552; CHECK-BE-LABEL: zext_v2i8_v2i64:553; CHECK-BE: // %bb.0:554; CHECK-BE-NEXT: ldr h0, [x0]555; CHECK-BE-NEXT: rev16 v0.8b, v0.8b556; CHECK-BE-NEXT: ushll v0.8h, v0.8b, #0557; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0558; CHECK-BE-NEXT: ushll v0.2d, v0.2s, #0559; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8560; CHECK-BE-NEXT: ret561 %x = load <2 x i8>, ptr %a562 %y = zext <2 x i8> %x to <2 x i64>563 ret <2 x i64> %y564}565 566define <2 x i32> @zext_v2i16_v2i32(ptr %a) {567; CHECK-LE-LABEL: zext_v2i16_v2i32:568; CHECK-LE: // %bb.0:569; CHECK-LE-NEXT: ldr s0, [x0]570; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0571; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0572; CHECK-LE-NEXT: ret573;574; CHECK-BE-LABEL: zext_v2i16_v2i32:575; CHECK-BE: // %bb.0:576; CHECK-BE-NEXT: ldr s0, [x0]577; CHECK-BE-NEXT: rev32 v0.4h, v0.4h578; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0579; CHECK-BE-NEXT: rev64 v0.2s, v0.2s580; CHECK-BE-NEXT: ret581 %x = load <2 x i16>, ptr %a582 %y = zext <2 x i16> %x to <2 x i32>583 ret <2 x i32> %y584}585 586define <2 x i64> @zext_v2i16_v2i64(ptr %a) {587; CHECK-LE-LABEL: zext_v2i16_v2i64:588; CHECK-LE: // %bb.0:589; CHECK-LE-NEXT: ldr s0, [x0]590; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0591; CHECK-LE-NEXT: ushll v0.2d, v0.2s, #0592; CHECK-LE-NEXT: ret593;594; CHECK-BE-LABEL: zext_v2i16_v2i64:595; CHECK-BE: // %bb.0:596; CHECK-BE-NEXT: ldr s0, [x0]597; CHECK-BE-NEXT: rev32 v0.4h, v0.4h598; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0599; CHECK-BE-NEXT: ushll v0.2d, v0.2s, #0600; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8601; CHECK-BE-NEXT: ret602 %x = load <2 x i16>, ptr %a603 %y = zext <2 x i16> %x to <2 x i64>604 ret <2 x i64> %y605}606 607define <4 x i32> @zext_v4i16_v4i32(ptr %a) {608; CHECK-LE-LABEL: zext_v4i16_v4i32:609; CHECK-LE: // %bb.0:610; CHECK-LE-NEXT: ldr d0, [x0]611; CHECK-LE-NEXT: ushll v0.4s, v0.4h, #0612; CHECK-LE-NEXT: ret613;614; CHECK-BE-LABEL: zext_v4i16_v4i32:615; CHECK-BE: // %bb.0:616; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]617; CHECK-BE-NEXT: ushll v0.4s, v0.4h, #0618; CHECK-BE-NEXT: rev64 v0.4s, v0.4s619; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8620; CHECK-BE-NEXT: ret621 %x = load <4 x i16>, ptr %a622 %y = zext <4 x i16> %x to <4 x i32>623 ret <4 x i32> %y624}625 626define <2 x i64> @sext_v2i8_v2i64(ptr %a) {627; CHECK-LE-LABEL: sext_v2i8_v2i64:628; CHECK-LE: // %bb.0:629; CHECK-LE-NEXT: ldr h0, [x0]630; CHECK-LE-NEXT: sshll v0.8h, v0.8b, #0631; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0632; CHECK-LE-NEXT: sshll v0.2d, v0.2s, #0633; CHECK-LE-NEXT: ret634;635; CHECK-BE-LABEL: sext_v2i8_v2i64:636; CHECK-BE: // %bb.0:637; CHECK-BE-NEXT: ldr h0, [x0]638; CHECK-BE-NEXT: rev16 v0.8b, v0.8b639; CHECK-BE-NEXT: sshll v0.8h, v0.8b, #0640; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0641; CHECK-BE-NEXT: sshll v0.2d, v0.2s, #0642; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8643; CHECK-BE-NEXT: ret644 %x = load <2 x i8>, ptr %a645 %y = sext <2 x i8> %x to <2 x i64>646 ret <2 x i64> %y647}648 649define <2 x i32> @sext_v2i16_v2i32(ptr %a) {650; CHECK-LE-LABEL: sext_v2i16_v2i32:651; CHECK-LE: // %bb.0:652; CHECK-LE-NEXT: ldr s0, [x0]653; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0654; CHECK-LE-NEXT: // kill: def $d0 killed $d0 killed $q0655; CHECK-LE-NEXT: ret656;657; CHECK-BE-LABEL: sext_v2i16_v2i32:658; CHECK-BE: // %bb.0:659; CHECK-BE-NEXT: ldr s0, [x0]660; CHECK-BE-NEXT: rev32 v0.4h, v0.4h661; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0662; CHECK-BE-NEXT: rev64 v0.2s, v0.2s663; CHECK-BE-NEXT: ret664 %x = load <2 x i16>, ptr %a665 %y = sext <2 x i16> %x to <2 x i32>666 ret <2 x i32> %y667}668 669define <2 x i64> @sext_v2i16_v2i64(ptr %a) {670; CHECK-LE-LABEL: sext_v2i16_v2i64:671; CHECK-LE: // %bb.0:672; CHECK-LE-NEXT: ldr s0, [x0]673; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0674; CHECK-LE-NEXT: sshll v0.2d, v0.2s, #0675; CHECK-LE-NEXT: ret676;677; CHECK-BE-LABEL: sext_v2i16_v2i64:678; CHECK-BE: // %bb.0:679; CHECK-BE-NEXT: ldr s0, [x0]680; CHECK-BE-NEXT: rev32 v0.4h, v0.4h681; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0682; CHECK-BE-NEXT: sshll v0.2d, v0.2s, #0683; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8684; CHECK-BE-NEXT: ret685 %x = load <2 x i16>, ptr %a686 %y = sext <2 x i16> %x to <2 x i64>687 ret <2 x i64> %y688}689 690define <4 x i32> @sext_v4i16_v4i32(ptr %a) {691; CHECK-LE-LABEL: sext_v4i16_v4i32:692; CHECK-LE: // %bb.0:693; CHECK-LE-NEXT: ldr d0, [x0]694; CHECK-LE-NEXT: sshll v0.4s, v0.4h, #0695; CHECK-LE-NEXT: ret696;697; CHECK-BE-LABEL: sext_v4i16_v4i32:698; CHECK-BE: // %bb.0:699; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]700; CHECK-BE-NEXT: sshll v0.4s, v0.4h, #0701; CHECK-BE-NEXT: rev64 v0.4s, v0.4s702; CHECK-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8703; CHECK-BE-NEXT: ret704 %x = load <4 x i16>, ptr %a705 %y = sext <4 x i16> %x to <4 x i32>706 ret <4 x i32> %y707}708